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Sascha Hauer6c7b068502012-03-07 21:01:28 +01001#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
6#include <mach/clock.h>
7
Sascha Hauer2af9e6d2012-03-09 09:11:55 +01008struct clk *imx_clk_pllv1(const char *name, const char *parent,
Sascha Hauer6c7b068502012-03-07 21:01:28 +01009 void __iomem *base);
10
Sascha Hauera547b812012-03-19 12:36:10 +010011struct clk *imx_clk_pllv2(const char *name, const char *parent,
12 void __iomem *base);
13
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080014enum imx_pllv3_type {
15 IMX_PLLV3_GENERIC,
16 IMX_PLLV3_SYS,
17 IMX_PLLV3_USB,
18 IMX_PLLV3_AV,
19 IMX_PLLV3_ENET,
20 IMX_PLLV3_MLB,
21};
22
23struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
24 const char *parent_name, void __iomem *base, u32 gate_mask,
25 u32 div_mask);
26
Sascha Hauerb75c0152011-04-19 08:33:45 +020027struct clk *clk_register_gate2(struct device *dev, const char *name,
28 const char *parent_name, unsigned long flags,
29 void __iomem *reg, u8 bit_idx,
30 u8 clk_gate_flags, spinlock_t *lock);
31
32static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
33 void __iomem *reg, u8 shift)
34{
35 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
36 shift, 0, &imx_ccm_lock);
37}
38
Shawn Guoa10bd672012-04-04 16:07:53 +080039struct clk *imx_clk_pfd(const char *name, const char *parent_name,
40 void __iomem *reg, u8 idx);
41
Sascha Hauer6c7b068502012-03-07 21:01:28 +010042static inline struct clk *imx_clk_fixed(const char *name, int rate)
43{
44 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
45}
46
47static inline struct clk *imx_clk_divider(const char *name, const char *parent,
48 void __iomem *reg, u8 shift, u8 width)
49{
50 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
51 reg, shift, width, 0, &imx_ccm_lock);
52}
53
54static inline struct clk *imx_clk_gate(const char *name, const char *parent,
55 void __iomem *reg, u8 shift)
56{
57 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
58 shift, 0, &imx_ccm_lock);
59}
60
61static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
62 u8 shift, u8 width, const char **parents, int num_parents)
63{
64 return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
65 width, 0, &imx_ccm_lock);
66}
67
68static inline struct clk *imx_clk_fixed_factor(const char *name,
69 const char *parent, unsigned int mult, unsigned int div)
70{
71 return clk_register_fixed_factor(NULL, name, parent,
72 CLK_SET_RATE_PARENT, mult, div);
73}
74
75#endif