blob: 321c9c05dd9e09fc0c745a4543a286b7628f00a4 [file] [log] [blame]
Marc Zyngier8eb99262015-10-19 21:02:46 +01001/*
2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include <linux/compiler.h>
19#include <linux/kvm_host.h>
20
Ard Biesheuvel03336b12016-02-16 13:52:34 +010021#include <asm/debug-monitors.h>
Marc Zyngier9d8415d2015-10-25 19:57:11 +000022#include <asm/kvm_asm.h>
Marc Zyngier13720a52016-01-28 13:44:07 +000023#include <asm/kvm_hyp.h>
Marc Zyngier8eb99262015-10-19 21:02:46 +010024
25#define read_debug(r,n) read_sysreg(r##n##_el1)
26#define write_debug(v,r,n) write_sysreg(v, r##n##_el1)
27
28#define save_debug(ptr,reg,nr) \
29 switch (nr) { \
30 case 15: ptr[15] = read_debug(reg, 15); \
31 case 14: ptr[14] = read_debug(reg, 14); \
32 case 13: ptr[13] = read_debug(reg, 13); \
33 case 12: ptr[12] = read_debug(reg, 12); \
34 case 11: ptr[11] = read_debug(reg, 11); \
35 case 10: ptr[10] = read_debug(reg, 10); \
36 case 9: ptr[9] = read_debug(reg, 9); \
37 case 8: ptr[8] = read_debug(reg, 8); \
38 case 7: ptr[7] = read_debug(reg, 7); \
39 case 6: ptr[6] = read_debug(reg, 6); \
40 case 5: ptr[5] = read_debug(reg, 5); \
41 case 4: ptr[4] = read_debug(reg, 4); \
42 case 3: ptr[3] = read_debug(reg, 3); \
43 case 2: ptr[2] = read_debug(reg, 2); \
44 case 1: ptr[1] = read_debug(reg, 1); \
45 default: ptr[0] = read_debug(reg, 0); \
46 }
47
48#define restore_debug(ptr,reg,nr) \
49 switch (nr) { \
50 case 15: write_debug(ptr[15], reg, 15); \
51 case 14: write_debug(ptr[14], reg, 14); \
52 case 13: write_debug(ptr[13], reg, 13); \
53 case 12: write_debug(ptr[12], reg, 12); \
54 case 11: write_debug(ptr[11], reg, 11); \
55 case 10: write_debug(ptr[10], reg, 10); \
56 case 9: write_debug(ptr[9], reg, 9); \
57 case 8: write_debug(ptr[8], reg, 8); \
58 case 7: write_debug(ptr[7], reg, 7); \
59 case 6: write_debug(ptr[6], reg, 6); \
60 case 5: write_debug(ptr[5], reg, 5); \
61 case 4: write_debug(ptr[4], reg, 4); \
62 case 3: write_debug(ptr[3], reg, 3); \
63 case 2: write_debug(ptr[2], reg, 2); \
64 case 1: write_debug(ptr[1], reg, 1); \
65 default: write_debug(ptr[0], reg, 0); \
66 }
67
Will Deaconf85279b2016-09-22 11:35:43 +010068static void __hyp_text __debug_save_spe_vhe(u64 *pmscr_el1)
69{
70 /* The vcpu can run. but it can't hide. */
71}
72
73static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1)
74{
75 u64 reg;
76
77 /* SPE present on this CPU? */
78 if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1),
79 ID_AA64DFR0_PMSVER_SHIFT))
80 return;
81
82 /* Yes; is it owned by EL3? */
Will Deacona173c392017-09-20 16:48:33 +010083 reg = read_sysreg_s(SYS_PMBIDR_EL1);
84 if (reg & BIT(SYS_PMBIDR_EL1_P_SHIFT))
Will Deaconf85279b2016-09-22 11:35:43 +010085 return;
86
87 /* No; is the host actually using the thing? */
Will Deacona173c392017-09-20 16:48:33 +010088 reg = read_sysreg_s(SYS_PMBLIMITR_EL1);
89 if (!(reg & BIT(SYS_PMBLIMITR_EL1_E_SHIFT)))
Will Deaconf85279b2016-09-22 11:35:43 +010090 return;
91
92 /* Yes; save the control register and disable data generation */
Will Deacona173c392017-09-20 16:48:33 +010093 *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1);
94 write_sysreg_s(0, SYS_PMSCR_EL1);
Will Deaconf85279b2016-09-22 11:35:43 +010095 isb();
96
97 /* Now drain all buffered data to memory */
98 psb_csync();
99 dsb(nsh);
100}
101
102static hyp_alternate_select(__debug_save_spe,
103 __debug_save_spe_nvhe, __debug_save_spe_vhe,
104 ARM64_HAS_VIRT_HOST_EXTN);
105
106static void __hyp_text __debug_restore_spe(u64 pmscr_el1)
107{
108 if (!pmscr_el1)
109 return;
110
111 /* The host page table is installed, but not yet synchronised */
112 isb();
113
114 /* Re-enable data generation */
Will Deacona173c392017-09-20 16:48:33 +0100115 write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1);
Will Deaconf85279b2016-09-22 11:35:43 +0100116}
117
Marc Zyngier8eb99262015-10-19 21:02:46 +0100118void __hyp_text __debug_save_state(struct kvm_vcpu *vcpu,
119 struct kvm_guest_debug_arch *dbg,
120 struct kvm_cpu_context *ctxt)
121{
122 u64 aa64dfr0;
123 int brps, wrps;
124
125 if (!(vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY))
126 return;
127
128 aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
129 brps = (aa64dfr0 >> 12) & 0xf;
130 wrps = (aa64dfr0 >> 20) & 0xf;
131
132 save_debug(dbg->dbg_bcr, dbgbcr, brps);
133 save_debug(dbg->dbg_bvr, dbgbvr, brps);
134 save_debug(dbg->dbg_wcr, dbgwcr, wrps);
135 save_debug(dbg->dbg_wvr, dbgwvr, wrps);
136
137 ctxt->sys_regs[MDCCINT_EL1] = read_sysreg(mdccint_el1);
138}
139
140void __hyp_text __debug_restore_state(struct kvm_vcpu *vcpu,
141 struct kvm_guest_debug_arch *dbg,
142 struct kvm_cpu_context *ctxt)
143{
144 u64 aa64dfr0;
145 int brps, wrps;
146
147 if (!(vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY))
148 return;
149
150 aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
151
152 brps = (aa64dfr0 >> 12) & 0xf;
153 wrps = (aa64dfr0 >> 20) & 0xf;
154
155 restore_debug(dbg->dbg_bcr, dbgbcr, brps);
156 restore_debug(dbg->dbg_bvr, dbgbvr, brps);
157 restore_debug(dbg->dbg_wcr, dbgwcr, wrps);
158 restore_debug(dbg->dbg_wvr, dbgwvr, wrps);
159
160 write_sysreg(ctxt->sys_regs[MDCCINT_EL1], mdccint_el1);
161}
162
163void __hyp_text __debug_cond_save_host_state(struct kvm_vcpu *vcpu)
164{
165 /* If any of KDE, MDE or KVM_ARM64_DEBUG_DIRTY is set, perform
166 * a full save/restore cycle. */
167 if ((vcpu->arch.ctxt.sys_regs[MDSCR_EL1] & DBG_MDSCR_KDE) ||
168 (vcpu->arch.ctxt.sys_regs[MDSCR_EL1] & DBG_MDSCR_MDE))
169 vcpu->arch.debug_flags |= KVM_ARM64_DEBUG_DIRTY;
170
Will Deaconf85279b2016-09-22 11:35:43 +0100171 __debug_save_state(vcpu, &vcpu->arch.host_debug_state.regs,
Marc Zyngier8eb99262015-10-19 21:02:46 +0100172 kern_hyp_va(vcpu->arch.host_cpu_context));
Will Deaconf85279b2016-09-22 11:35:43 +0100173 __debug_save_spe()(&vcpu->arch.host_debug_state.pmscr_el1);
Marc Zyngier8eb99262015-10-19 21:02:46 +0100174}
175
176void __hyp_text __debug_cond_restore_host_state(struct kvm_vcpu *vcpu)
177{
Will Deaconf85279b2016-09-22 11:35:43 +0100178 __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
179 __debug_restore_state(vcpu, &vcpu->arch.host_debug_state.regs,
Marc Zyngier8eb99262015-10-19 21:02:46 +0100180 kern_hyp_va(vcpu->arch.host_cpu_context));
181
182 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
183 vcpu->arch.debug_flags &= ~KVM_ARM64_DEBUG_DIRTY;
184}
185
Christoffer Dallcf0ba182016-09-01 13:16:03 +0200186u32 __hyp_text __kvm_get_mdcr_el2(void)
Marc Zyngier8eb99262015-10-19 21:02:46 +0100187{
188 return read_sysreg(mdcr_el2);
189}