Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * B53 common definitions |
| 3 | * |
| 4 | * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org> |
| 5 | * |
| 6 | * Permission to use, copy, modify, and/or distribute this software for any |
| 7 | * purpose with or without fee is hereby granted, provided that the above |
| 8 | * copyright notice and this permission notice appear in all copies. |
| 9 | * |
| 10 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 11 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 12 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 13 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 14 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 15 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 16 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
| 19 | #ifndef __B53_PRIV_H |
| 20 | #define __B53_PRIV_H |
| 21 | |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/mutex.h> |
| 24 | #include <linux/phy.h> |
| 25 | #include <net/dsa.h> |
| 26 | |
Florian Fainelli | 1da6df8 | 2016-06-09 18:23:55 -0700 | [diff] [blame] | 27 | #include "b53_regs.h" |
| 28 | |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 29 | struct b53_device; |
Florian Fainelli | ff39c2d | 2016-06-09 18:23:56 -0700 | [diff] [blame] | 30 | struct net_device; |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 31 | |
| 32 | struct b53_io_ops { |
| 33 | int (*read8)(struct b53_device *dev, u8 page, u8 reg, u8 *value); |
| 34 | int (*read16)(struct b53_device *dev, u8 page, u8 reg, u16 *value); |
| 35 | int (*read32)(struct b53_device *dev, u8 page, u8 reg, u32 *value); |
| 36 | int (*read48)(struct b53_device *dev, u8 page, u8 reg, u64 *value); |
| 37 | int (*read64)(struct b53_device *dev, u8 page, u8 reg, u64 *value); |
| 38 | int (*write8)(struct b53_device *dev, u8 page, u8 reg, u8 value); |
| 39 | int (*write16)(struct b53_device *dev, u8 page, u8 reg, u16 value); |
| 40 | int (*write32)(struct b53_device *dev, u8 page, u8 reg, u32 value); |
| 41 | int (*write48)(struct b53_device *dev, u8 page, u8 reg, u64 value); |
| 42 | int (*write64)(struct b53_device *dev, u8 page, u8 reg, u64 value); |
| 43 | int (*phy_read16)(struct b53_device *dev, int addr, int reg, u16 *value); |
| 44 | int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value); |
| 45 | }; |
| 46 | |
| 47 | enum { |
| 48 | BCM5325_DEVICE_ID = 0x25, |
| 49 | BCM5365_DEVICE_ID = 0x65, |
| 50 | BCM5395_DEVICE_ID = 0x95, |
| 51 | BCM5397_DEVICE_ID = 0x97, |
| 52 | BCM5398_DEVICE_ID = 0x98, |
| 53 | BCM53115_DEVICE_ID = 0x53115, |
| 54 | BCM53125_DEVICE_ID = 0x53125, |
| 55 | BCM53128_DEVICE_ID = 0x53128, |
| 56 | BCM63XX_DEVICE_ID = 0x6300, |
| 57 | BCM53010_DEVICE_ID = 0x53010, |
| 58 | BCM53011_DEVICE_ID = 0x53011, |
| 59 | BCM53012_DEVICE_ID = 0x53012, |
| 60 | BCM53018_DEVICE_ID = 0x53018, |
| 61 | BCM53019_DEVICE_ID = 0x53019, |
| 62 | }; |
| 63 | |
| 64 | #define B53_N_PORTS 9 |
| 65 | #define B53_N_PORTS_25 6 |
| 66 | |
| 67 | struct b53_port { |
Florian Fainelli | ff39c2d | 2016-06-09 18:23:56 -0700 | [diff] [blame] | 68 | u16 vlan_ctl_mask; |
| 69 | struct net_device *bridge_dev; |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 70 | }; |
| 71 | |
Florian Fainelli | a2482d2 | 2016-06-09 18:23:57 -0700 | [diff] [blame^] | 72 | struct b53_vlan { |
| 73 | u16 members; |
| 74 | u16 untag; |
| 75 | bool valid; |
| 76 | }; |
| 77 | |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 78 | struct b53_device { |
| 79 | struct dsa_switch *ds; |
| 80 | struct b53_platform_data *pdata; |
| 81 | const char *name; |
| 82 | |
| 83 | struct mutex reg_mutex; |
| 84 | struct mutex stats_mutex; |
| 85 | const struct b53_io_ops *ops; |
| 86 | |
| 87 | /* chip specific data */ |
| 88 | u32 chip_id; |
| 89 | u8 core_rev; |
| 90 | u8 vta_regs[3]; |
| 91 | u8 duplex_reg; |
| 92 | u8 jumbo_pm_reg; |
| 93 | u8 jumbo_size_reg; |
| 94 | int reset_gpio; |
Florian Fainelli | 1da6df8 | 2016-06-09 18:23:55 -0700 | [diff] [blame] | 95 | u8 num_arl_entries; |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 96 | |
| 97 | /* used ports mask */ |
| 98 | u16 enabled_ports; |
| 99 | unsigned int cpu_port; |
| 100 | |
| 101 | /* connect specific data */ |
| 102 | u8 current_page; |
| 103 | struct device *dev; |
| 104 | |
| 105 | /* Master MDIO bus we got probed from */ |
| 106 | struct mii_bus *bus; |
| 107 | |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 108 | void *priv; |
| 109 | |
| 110 | /* run time configuration */ |
Florian Fainelli | a2482d2 | 2016-06-09 18:23:57 -0700 | [diff] [blame^] | 111 | bool enable_jumbo; |
| 112 | |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 113 | unsigned int num_vlans; |
Florian Fainelli | a2482d2 | 2016-06-09 18:23:57 -0700 | [diff] [blame^] | 114 | struct b53_vlan *vlans; |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 115 | unsigned int num_ports; |
| 116 | struct b53_port *ports; |
| 117 | }; |
| 118 | |
| 119 | #define b53_for_each_port(dev, i) \ |
| 120 | for (i = 0; i < B53_N_PORTS; i++) \ |
| 121 | if (dev->enabled_ports & BIT(i)) |
| 122 | |
| 123 | |
| 124 | static inline int is5325(struct b53_device *dev) |
| 125 | { |
| 126 | return dev->chip_id == BCM5325_DEVICE_ID; |
| 127 | } |
| 128 | |
| 129 | static inline int is5365(struct b53_device *dev) |
| 130 | { |
| 131 | #ifdef CONFIG_BCM47XX |
| 132 | return dev->chip_id == BCM5365_DEVICE_ID; |
| 133 | #else |
| 134 | return 0; |
| 135 | #endif |
| 136 | } |
| 137 | |
| 138 | static inline int is5397_98(struct b53_device *dev) |
| 139 | { |
| 140 | return dev->chip_id == BCM5397_DEVICE_ID || |
| 141 | dev->chip_id == BCM5398_DEVICE_ID; |
| 142 | } |
| 143 | |
| 144 | static inline int is539x(struct b53_device *dev) |
| 145 | { |
| 146 | return dev->chip_id == BCM5395_DEVICE_ID || |
| 147 | dev->chip_id == BCM5397_DEVICE_ID || |
| 148 | dev->chip_id == BCM5398_DEVICE_ID; |
| 149 | } |
| 150 | |
| 151 | static inline int is531x5(struct b53_device *dev) |
| 152 | { |
| 153 | return dev->chip_id == BCM53115_DEVICE_ID || |
| 154 | dev->chip_id == BCM53125_DEVICE_ID || |
| 155 | dev->chip_id == BCM53128_DEVICE_ID; |
| 156 | } |
| 157 | |
| 158 | static inline int is63xx(struct b53_device *dev) |
| 159 | { |
| 160 | #ifdef CONFIG_BCM63XX |
| 161 | return dev->chip_id == BCM63XX_DEVICE_ID; |
| 162 | #else |
| 163 | return 0; |
| 164 | #endif |
| 165 | } |
| 166 | |
| 167 | static inline int is5301x(struct b53_device *dev) |
| 168 | { |
| 169 | return dev->chip_id == BCM53010_DEVICE_ID || |
| 170 | dev->chip_id == BCM53011_DEVICE_ID || |
| 171 | dev->chip_id == BCM53012_DEVICE_ID || |
| 172 | dev->chip_id == BCM53018_DEVICE_ID || |
| 173 | dev->chip_id == BCM53019_DEVICE_ID; |
| 174 | } |
| 175 | |
| 176 | #define B53_CPU_PORT_25 5 |
| 177 | #define B53_CPU_PORT 8 |
| 178 | |
| 179 | static inline int is_cpu_port(struct b53_device *dev, int port) |
| 180 | { |
| 181 | return dev->cpu_port; |
| 182 | } |
| 183 | |
| 184 | struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops, |
| 185 | void *priv); |
| 186 | |
| 187 | int b53_switch_detect(struct b53_device *dev); |
| 188 | |
| 189 | int b53_switch_register(struct b53_device *dev); |
| 190 | |
| 191 | static inline void b53_switch_remove(struct b53_device *dev) |
| 192 | { |
| 193 | dsa_unregister_switch(dev->ds); |
| 194 | } |
| 195 | |
| 196 | static inline int b53_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val) |
| 197 | { |
| 198 | int ret; |
| 199 | |
| 200 | mutex_lock(&dev->reg_mutex); |
| 201 | ret = dev->ops->read8(dev, page, reg, val); |
| 202 | mutex_unlock(&dev->reg_mutex); |
| 203 | |
| 204 | return ret; |
| 205 | } |
| 206 | |
| 207 | static inline int b53_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val) |
| 208 | { |
| 209 | int ret; |
| 210 | |
| 211 | mutex_lock(&dev->reg_mutex); |
| 212 | ret = dev->ops->read16(dev, page, reg, val); |
| 213 | mutex_unlock(&dev->reg_mutex); |
| 214 | |
| 215 | return ret; |
| 216 | } |
| 217 | |
| 218 | static inline int b53_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val) |
| 219 | { |
| 220 | int ret; |
| 221 | |
| 222 | mutex_lock(&dev->reg_mutex); |
| 223 | ret = dev->ops->read32(dev, page, reg, val); |
| 224 | mutex_unlock(&dev->reg_mutex); |
| 225 | |
| 226 | return ret; |
| 227 | } |
| 228 | |
| 229 | static inline int b53_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val) |
| 230 | { |
| 231 | int ret; |
| 232 | |
| 233 | mutex_lock(&dev->reg_mutex); |
| 234 | ret = dev->ops->read48(dev, page, reg, val); |
| 235 | mutex_unlock(&dev->reg_mutex); |
| 236 | |
| 237 | return ret; |
| 238 | } |
| 239 | |
| 240 | static inline int b53_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val) |
| 241 | { |
| 242 | int ret; |
| 243 | |
| 244 | mutex_lock(&dev->reg_mutex); |
| 245 | ret = dev->ops->read64(dev, page, reg, val); |
| 246 | mutex_unlock(&dev->reg_mutex); |
| 247 | |
| 248 | return ret; |
| 249 | } |
| 250 | |
| 251 | static inline int b53_write8(struct b53_device *dev, u8 page, u8 reg, u8 value) |
| 252 | { |
| 253 | int ret; |
| 254 | |
| 255 | mutex_lock(&dev->reg_mutex); |
| 256 | ret = dev->ops->write8(dev, page, reg, value); |
| 257 | mutex_unlock(&dev->reg_mutex); |
| 258 | |
| 259 | return ret; |
| 260 | } |
| 261 | |
| 262 | static inline int b53_write16(struct b53_device *dev, u8 page, u8 reg, |
| 263 | u16 value) |
| 264 | { |
| 265 | int ret; |
| 266 | |
| 267 | mutex_lock(&dev->reg_mutex); |
| 268 | ret = dev->ops->write16(dev, page, reg, value); |
| 269 | mutex_unlock(&dev->reg_mutex); |
| 270 | |
| 271 | return ret; |
| 272 | } |
| 273 | |
| 274 | static inline int b53_write32(struct b53_device *dev, u8 page, u8 reg, |
| 275 | u32 value) |
| 276 | { |
| 277 | int ret; |
| 278 | |
| 279 | mutex_lock(&dev->reg_mutex); |
| 280 | ret = dev->ops->write32(dev, page, reg, value); |
| 281 | mutex_unlock(&dev->reg_mutex); |
| 282 | |
| 283 | return ret; |
| 284 | } |
| 285 | |
| 286 | static inline int b53_write48(struct b53_device *dev, u8 page, u8 reg, |
| 287 | u64 value) |
| 288 | { |
| 289 | int ret; |
| 290 | |
| 291 | mutex_lock(&dev->reg_mutex); |
| 292 | ret = dev->ops->write48(dev, page, reg, value); |
| 293 | mutex_unlock(&dev->reg_mutex); |
| 294 | |
| 295 | return ret; |
| 296 | } |
| 297 | |
| 298 | static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg, |
| 299 | u64 value) |
| 300 | { |
| 301 | int ret; |
| 302 | |
| 303 | mutex_lock(&dev->reg_mutex); |
| 304 | ret = dev->ops->write64(dev, page, reg, value); |
| 305 | mutex_unlock(&dev->reg_mutex); |
| 306 | |
| 307 | return ret; |
| 308 | } |
| 309 | |
Florian Fainelli | 1da6df8 | 2016-06-09 18:23:55 -0700 | [diff] [blame] | 310 | struct b53_arl_entry { |
| 311 | u8 port; |
| 312 | u8 mac[ETH_ALEN]; |
| 313 | u16 vid; |
| 314 | u8 is_valid:1; |
| 315 | u8 is_age:1; |
| 316 | u8 is_static:1; |
| 317 | }; |
| 318 | |
| 319 | static inline void b53_mac_from_u64(u64 src, u8 *dst) |
| 320 | { |
| 321 | unsigned int i; |
| 322 | |
| 323 | for (i = 0; i < ETH_ALEN; i++) |
| 324 | dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff; |
| 325 | } |
| 326 | |
| 327 | static inline u64 b53_mac_to_u64(const u8 *src) |
| 328 | { |
| 329 | unsigned int i; |
| 330 | u64 dst = 0; |
| 331 | |
| 332 | for (i = 0; i < ETH_ALEN; i++) |
| 333 | dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i); |
| 334 | |
| 335 | return dst; |
| 336 | } |
| 337 | |
| 338 | static inline void b53_arl_to_entry(struct b53_arl_entry *ent, |
| 339 | u64 mac_vid, u32 fwd_entry) |
| 340 | { |
| 341 | memset(ent, 0, sizeof(*ent)); |
| 342 | ent->port = fwd_entry & ARLTBL_DATA_PORT_ID_MASK; |
| 343 | ent->is_valid = !!(fwd_entry & ARLTBL_VALID); |
| 344 | ent->is_age = !!(fwd_entry & ARLTBL_AGE); |
| 345 | ent->is_static = !!(fwd_entry & ARLTBL_STATIC); |
| 346 | b53_mac_from_u64(mac_vid, ent->mac); |
| 347 | ent->vid = mac_vid >> ARLTBL_VID_S; |
| 348 | } |
| 349 | |
| 350 | static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry, |
| 351 | const struct b53_arl_entry *ent) |
| 352 | { |
| 353 | *mac_vid = b53_mac_to_u64(ent->mac); |
| 354 | *mac_vid |= (u64)(ent->vid & ARLTBL_VID_MASK) << ARLTBL_VID_S; |
| 355 | *fwd_entry = ent->port & ARLTBL_DATA_PORT_ID_MASK; |
| 356 | if (ent->is_valid) |
| 357 | *fwd_entry |= ARLTBL_VALID; |
| 358 | if (ent->is_static) |
| 359 | *fwd_entry |= ARLTBL_STATIC; |
| 360 | if (ent->is_age) |
| 361 | *fwd_entry |= ARLTBL_AGE; |
| 362 | } |
| 363 | |
Florian Fainelli | 967dd82 | 2016-06-09 18:23:53 -0700 | [diff] [blame] | 364 | #ifdef CONFIG_BCM47XX |
| 365 | |
| 366 | #include <linux/version.h> |
| 367 | #include <linux/bcm47xx_nvram.h> |
| 368 | #include <bcm47xx_board.h> |
| 369 | static inline int b53_switch_get_reset_gpio(struct b53_device *dev) |
| 370 | { |
| 371 | enum bcm47xx_board board = bcm47xx_board_get(); |
| 372 | |
| 373 | switch (board) { |
| 374 | case BCM47XX_BOARD_LINKSYS_WRT300NV11: |
| 375 | case BCM47XX_BOARD_LINKSYS_WRT310NV1: |
| 376 | return 8; |
| 377 | default: |
| 378 | return bcm47xx_nvram_gpio_pin("robo_reset"); |
| 379 | } |
| 380 | } |
| 381 | #else |
| 382 | static inline int b53_switch_get_reset_gpio(struct b53_device *dev) |
| 383 | { |
| 384 | return -ENOENT; |
| 385 | } |
| 386 | #endif |
| 387 | #endif |