Alex Deucher | aaa36a9 | 2015-04-20 17:31:14 -0400 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2014 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #include <linux/firmware.h> |
| 25 | #include "drmP.h" |
| 26 | #include "amdgpu.h" |
| 27 | #include "iceland_smumgr.h" |
| 28 | |
| 29 | MODULE_FIRMWARE("radeon/topaz_smc.bin"); |
| 30 | |
| 31 | static void iceland_dpm_set_funcs(struct amdgpu_device *adev); |
| 32 | |
| 33 | static int iceland_dpm_early_init(struct amdgpu_device *adev) |
| 34 | { |
| 35 | iceland_dpm_set_funcs(adev); |
| 36 | |
| 37 | return 0; |
| 38 | } |
| 39 | |
| 40 | static int iceland_dpm_init_microcode(struct amdgpu_device *adev) |
| 41 | { |
| 42 | char fw_name[30] = "radeon/topaz_smc.bin"; |
| 43 | int err; |
| 44 | |
| 45 | err = request_firmware(&adev->pm.fw, fw_name, adev->dev); |
| 46 | if (err) |
| 47 | goto out; |
| 48 | err = amdgpu_ucode_validate(adev->pm.fw); |
| 49 | |
| 50 | out: |
| 51 | if (err) { |
| 52 | DRM_ERROR("Failed to load firmware \"%s\"", fw_name); |
| 53 | release_firmware(adev->pm.fw); |
| 54 | adev->pm.fw = NULL; |
| 55 | } |
| 56 | return err; |
| 57 | } |
| 58 | |
| 59 | static int iceland_dpm_sw_init(struct amdgpu_device *adev) |
| 60 | { |
| 61 | int ret; |
| 62 | |
| 63 | ret = iceland_dpm_init_microcode(adev); |
| 64 | if (ret) |
| 65 | return ret; |
| 66 | |
| 67 | return 0; |
| 68 | } |
| 69 | |
| 70 | static int iceland_dpm_sw_fini(struct amdgpu_device *adev) |
| 71 | { |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | static int iceland_dpm_hw_init(struct amdgpu_device *adev) |
| 76 | { |
| 77 | int ret; |
| 78 | |
| 79 | mutex_lock(&adev->pm.mutex); |
| 80 | |
| 81 | ret = iceland_smu_init(adev); |
| 82 | if (ret) { |
| 83 | DRM_ERROR("SMU initialization failed\n"); |
| 84 | goto fail; |
| 85 | } |
| 86 | |
| 87 | ret = iceland_smu_start(adev); |
| 88 | if (ret) { |
| 89 | DRM_ERROR("SMU start failed\n"); |
| 90 | goto fail; |
| 91 | } |
| 92 | |
| 93 | mutex_unlock(&adev->pm.mutex); |
| 94 | return 0; |
| 95 | |
| 96 | fail: |
| 97 | adev->firmware.smu_load = false; |
| 98 | mutex_unlock(&adev->pm.mutex); |
| 99 | return -EINVAL; |
| 100 | } |
| 101 | |
| 102 | static int iceland_dpm_hw_fini(struct amdgpu_device *adev) |
| 103 | { |
| 104 | mutex_lock(&adev->pm.mutex); |
| 105 | iceland_smu_fini(adev); |
| 106 | mutex_unlock(&adev->pm.mutex); |
| 107 | return 0; |
| 108 | } |
| 109 | |
| 110 | static int iceland_dpm_suspend(struct amdgpu_device *adev) |
| 111 | { |
| 112 | iceland_dpm_hw_fini(adev); |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | |
| 117 | static int iceland_dpm_resume(struct amdgpu_device *adev) |
| 118 | { |
| 119 | iceland_dpm_hw_init(adev); |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static int iceland_dpm_set_clockgating_state(struct amdgpu_device *adev, |
| 125 | enum amdgpu_clockgating_state state) |
| 126 | { |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | static int iceland_dpm_set_powergating_state(struct amdgpu_device *adev, |
| 131 | enum amdgpu_powergating_state state) |
| 132 | { |
| 133 | return 0; |
| 134 | } |
| 135 | |
| 136 | const struct amdgpu_ip_funcs iceland_dpm_ip_funcs = { |
| 137 | .early_init = iceland_dpm_early_init, |
| 138 | .late_init = NULL, |
| 139 | .sw_init = iceland_dpm_sw_init, |
| 140 | .sw_fini = iceland_dpm_sw_fini, |
| 141 | .hw_init = iceland_dpm_hw_init, |
| 142 | .hw_fini = iceland_dpm_hw_fini, |
| 143 | .suspend = iceland_dpm_suspend, |
| 144 | .resume = iceland_dpm_resume, |
| 145 | .is_idle = NULL, |
| 146 | .wait_for_idle = NULL, |
| 147 | .soft_reset = NULL, |
| 148 | .print_status = NULL, |
| 149 | .set_clockgating_state = iceland_dpm_set_clockgating_state, |
| 150 | .set_powergating_state = iceland_dpm_set_powergating_state, |
| 151 | }; |
| 152 | |
| 153 | static const struct amdgpu_dpm_funcs iceland_dpm_funcs = { |
| 154 | .get_temperature = NULL, |
| 155 | .pre_set_power_state = NULL, |
| 156 | .set_power_state = NULL, |
| 157 | .post_set_power_state = NULL, |
| 158 | .display_configuration_changed = NULL, |
| 159 | .get_sclk = NULL, |
| 160 | .get_mclk = NULL, |
| 161 | .print_power_state = NULL, |
| 162 | .debugfs_print_current_performance_level = NULL, |
| 163 | .force_performance_level = NULL, |
| 164 | .vblank_too_short = NULL, |
| 165 | .powergate_uvd = NULL, |
| 166 | }; |
| 167 | |
| 168 | static void iceland_dpm_set_funcs(struct amdgpu_device *adev) |
| 169 | { |
| 170 | if (NULL == adev->pm.funcs) |
| 171 | adev->pm.funcs = &iceland_dpm_funcs; |
| 172 | } |