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Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
Changhwan Younb1d69cc2010-07-16 12:18:36 +09002 *
Kukjin Kimd11135c2011-02-14 14:59:52 +09003 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
Changhwan Younb1d69cc2010-07-16 12:18:36 +09005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090012#include <linux/delay.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090013#include <linux/gpio.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090014#include <linux/lcd.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090015#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
Daein Mooncbff3eb2010-10-26 12:51:17 +090017#include <linux/smsc911x.h>
18#include <linux/io.h>
Jassi Brar6f5c11c2010-12-21 09:59:05 +090019#include <linux/i2c.h>
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +090020#include <linux/input.h>
Banajit Goswami8689de72011-07-20 23:45:21 +090021#include <linux/pwm_backlight.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090022
23#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010024#include <asm/hardware/gic.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090025#include <asm/mach-types.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090026
Kukjin Kim42c0d262011-08-18 21:14:28 +090027#include <video/platform_lcd.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090028#include <plat/regs-serial.h>
Kukjin Kim8cf460a2010-11-15 09:18:57 +090029#include <plat/regs-srom.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090030#include <plat/regs-fb-v4.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090031#include <plat/cpu.h>
Changhwan Youncdff6e62010-09-20 15:25:51 +090032#include <plat/devs.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090033#include <plat/fb.h>
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +090034#include <plat/keypad.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090035#include <plat/sdhci.h>
Jassi Brar6f5c11c2010-12-21 09:59:05 +090036#include <plat/iic.h>
Changhwan Yound6d8b482010-12-03 17:15:40 +090037#include <plat/pd.h>
Banajit Goswami8689de72011-07-20 23:45:21 +090038#include <plat/gpio-cfg.h>
39#include <plat/backlight.h>
Sachin Kamat95727e12011-08-12 18:21:27 +090040#include <plat/mfc.h>
Jingoo Han9830f6a2011-09-28 10:33:25 +090041#include <plat/ehci.h>
42#include <plat/clock.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090043
44#include <mach/map.h>
Jingoo Han744f20f2011-12-23 11:20:50 +090045#include <mach/ohci.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090046
Sachin Kamatab25a8d2012-05-12 16:34:06 +090047#include <drm/exynos_drm.h>
Kukjin Kimcc511b82011-12-27 08:18:36 +010048#include "common.h"
49
Changhwan Younb1d69cc2010-07-16 12:18:36 +090050/* Following are default values for UCON, ULCON and UFCON UART registers */
51#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
52 S3C2410_UCON_RXILEVEL | \
53 S3C2410_UCON_TXIRQMODE | \
54 S3C2410_UCON_RXIRQMODE | \
55 S3C2410_UCON_RXFIFO_TOI | \
56 S3C2443_UCON_RXERR_IRQEN)
57
58#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
59
60#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
61 S5PV210_UFCON_TXTRIG4 | \
62 S5PV210_UFCON_RXTRIG4)
63
64static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
65 [0] = {
66 .hwport = 0,
67 .flags = 0,
68 .ucon = SMDKV310_UCON_DEFAULT,
69 .ulcon = SMDKV310_ULCON_DEFAULT,
70 .ufcon = SMDKV310_UFCON_DEFAULT,
71 },
72 [1] = {
73 .hwport = 1,
74 .flags = 0,
75 .ucon = SMDKV310_UCON_DEFAULT,
76 .ulcon = SMDKV310_ULCON_DEFAULT,
77 .ufcon = SMDKV310_UFCON_DEFAULT,
78 },
79 [2] = {
80 .hwport = 2,
81 .flags = 0,
82 .ucon = SMDKV310_UCON_DEFAULT,
83 .ulcon = SMDKV310_ULCON_DEFAULT,
84 .ufcon = SMDKV310_UFCON_DEFAULT,
85 },
86 [3] = {
87 .hwport = 3,
88 .flags = 0,
89 .ucon = SMDKV310_UCON_DEFAULT,
90 .ulcon = SMDKV310_ULCON_DEFAULT,
91 .ufcon = SMDKV310_UFCON_DEFAULT,
92 },
93};
94
Hyuk Lee2b111482010-10-06 14:50:20 +090095static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
Thomas Abrahama0d8efe2011-06-16 16:12:35 +090096 .cd_type = S3C_SDHCI_CD_INTERNAL,
Jeongbae Seo28c80aa2010-10-08 18:03:27 +090097 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
Kukjin Kimd11135c2011-02-14 14:59:52 +090098#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
Hyuk Lee2b111482010-10-06 14:50:20 +090099 .max_width = 8,
100 .host_caps = MMC_CAP_8_BIT_DATA,
101#endif
102};
103
104static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
105 .cd_type = S3C_SDHCI_CD_GPIO,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900106 .ext_cd_gpio = EXYNOS4_GPK0(2),
Hyuk Lee2b111482010-10-06 14:50:20 +0900107 .ext_cd_gpio_invert = 1,
Jeongbae Seo28c80aa2010-10-08 18:03:27 +0900108 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
Hyuk Lee2b111482010-10-06 14:50:20 +0900109};
110
111static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
Thomas Abrahama0d8efe2011-06-16 16:12:35 +0900112 .cd_type = S3C_SDHCI_CD_INTERNAL,
Jeongbae Seo28c80aa2010-10-08 18:03:27 +0900113 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900114#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
Hyuk Lee2b111482010-10-06 14:50:20 +0900115 .max_width = 8,
116 .host_caps = MMC_CAP_8_BIT_DATA,
117#endif
118};
119
120static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
121 .cd_type = S3C_SDHCI_CD_GPIO,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900122 .ext_cd_gpio = EXYNOS4_GPK2(2),
Hyuk Lee2b111482010-10-06 14:50:20 +0900123 .ext_cd_gpio_invert = 1,
Jeongbae Seo28c80aa2010-10-08 18:03:27 +0900124 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
Hyuk Lee2b111482010-10-06 14:50:20 +0900125};
126
Kukjin Kim42c0d262011-08-18 21:14:28 +0900127static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
128 unsigned int power)
129{
130 if (power) {
131#if !defined(CONFIG_BACKLIGHT_PWM)
132 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
133 gpio_free(EXYNOS4_GPD0(1));
134#endif
135 /* fire nRESET on power up */
Jingoo Han321655e2011-12-24 11:58:32 +0900136 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
Kukjin Kim42c0d262011-08-18 21:14:28 +0900137 mdelay(100);
138
139 gpio_set_value(EXYNOS4_GPX0(6), 0);
140 mdelay(10);
141
142 gpio_set_value(EXYNOS4_GPX0(6), 1);
143 mdelay(10);
144
145 gpio_free(EXYNOS4_GPX0(6));
146 } else {
147#if !defined(CONFIG_BACKLIGHT_PWM)
148 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
149 gpio_free(EXYNOS4_GPD0(1));
150#endif
151 }
152}
153
154static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
155 .set_power = lcd_lte480wv_set_power,
156};
157
158static struct platform_device smdkv310_lcd_lte480wv = {
159 .name = "platform-lcd",
160 .dev.parent = &s5p_device_fimd0.dev,
161 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
162};
163
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900164#ifdef CONFIG_DRM_EXYNOS
165static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
166 .panel = {
167 .timing = {
168 .left_margin = 13,
169 .right_margin = 8,
170 .upper_margin = 7,
171 .lower_margin = 5,
172 .hsync_len = 3,
173 .vsync_len = 1,
174 .xres = 800,
175 .yres = 480,
176 },
177 },
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180 .default_win = 0,
181 .bpp = 32,
182};
183#else
Kukjin Kim42c0d262011-08-18 21:14:28 +0900184static struct s3c_fb_pd_win smdkv310_fb_win0 = {
185 .win_mode = {
186 .left_margin = 13,
187 .right_margin = 8,
188 .upper_margin = 7,
189 .lower_margin = 5,
190 .hsync_len = 3,
191 .vsync_len = 1,
192 .xres = 800,
193 .yres = 480,
194 },
195 .max_bpp = 32,
196 .default_bpp = 24,
197};
198
199static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
200 .win[0] = &smdkv310_fb_win0,
201 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
202 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
203 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
204};
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900205#endif
Kukjin Kim42c0d262011-08-18 21:14:28 +0900206
Daein Mooncbff3eb2010-10-26 12:51:17 +0900207static struct resource smdkv310_smsc911x_resources[] = {
208 [0] = {
Kukjin Kimd11135c2011-02-14 14:59:52 +0900209 .start = EXYNOS4_PA_SROM_BANK(1),
210 .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
Daein Mooncbff3eb2010-10-26 12:51:17 +0900211 .flags = IORESOURCE_MEM,
212 },
213 [1] = {
214 .start = IRQ_EINT(5),
215 .end = IRQ_EINT(5),
216 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
217 },
218};
219
220static struct smsc911x_platform_config smsc9215_config = {
Jeongtae Parkcd0527c2011-03-25 15:48:15 +0900221 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
Daein Mooncbff3eb2010-10-26 12:51:17 +0900222 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
223 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
224 .phy_interface = PHY_INTERFACE_MODE_MII,
225 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
226};
227
228static struct platform_device smdkv310_smsc911x = {
229 .name = "smsc911x",
230 .id = -1,
231 .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
232 .resource = smdkv310_smsc911x_resources,
233 .dev = {
234 .platform_data = &smsc9215_config,
235 },
236};
237
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900238static uint32_t smdkv310_keymap[] __initdata = {
239 /* KEY(row, col, keycode) */
240 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
241 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
242 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
243 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
244};
245
246static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
247 .keymap = smdkv310_keymap,
248 .keymap_size = ARRAY_SIZE(smdkv310_keymap),
249};
250
251static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
252 .keymap_data = &smdkv310_keymap_data,
253 .rows = 2,
254 .cols = 8,
255};
256
Jassi Brar6f5c11c2010-12-21 09:59:05 +0900257static struct i2c_board_info i2c_devs1[] __initdata = {
258 {I2C_BOARD_INFO("wm8994", 0x1a),},
259};
260
Jingoo Han9830f6a2011-09-28 10:33:25 +0900261/* USB EHCI */
262static struct s5p_ehci_platdata smdkv310_ehci_pdata;
263
264static void __init smdkv310_ehci_init(void)
265{
266 struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
267
268 s5p_ehci_set_platdata(pdata);
269}
270
Jingoo Han744f20f2011-12-23 11:20:50 +0900271/* USB OHCI */
272static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
273
274static void __init smdkv310_ohci_init(void)
275{
276 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
277
278 exynos4_ohci_set_platdata(pdata);
279}
280
Changhwan Youncdff6e62010-09-20 15:25:51 +0900281static struct platform_device *smdkv310_devices[] __initdata = {
Hyuk Lee2b111482010-10-06 14:50:20 +0900282 &s3c_device_hsmmc0,
283 &s3c_device_hsmmc1,
284 &s3c_device_hsmmc2,
285 &s3c_device_hsmmc3,
Kukjin Kim285dee72010-12-31 10:52:05 +0900286 &s3c_device_i2c1,
Hatim Alic0735c82011-09-27 07:37:18 +0900287 &s5p_device_i2c_hdmiphy,
Changhwan Youncdff6e62010-09-20 15:25:51 +0900288 &s3c_device_rtc,
Jemings Ko8d75c912010-09-20 15:33:04 +0900289 &s3c_device_wdt,
Jingoo Han9830f6a2011-09-28 10:33:25 +0900290 &s5p_device_ehci,
Sachin Kamat568f0e22011-09-28 11:13:30 +0900291 &s5p_device_fimc0,
292 &s5p_device_fimc1,
293 &s5p_device_fimc2,
294 &s5p_device_fimc3,
Sachin Kamate0d49c72012-01-31 13:28:52 +0900295 &s5p_device_fimc_md,
Sachin Kamatb3421f92012-03-09 06:51:45 -0800296 &s5p_device_g2d,
Sachin Kamat9fbe8c72012-03-09 08:19:21 -0800297 &s5p_device_jpeg,
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900298#ifdef CONFIG_DRM_EXYNOS
299 &exynos_device_drm,
300#endif
Kukjin Kimd11135c2011-02-14 14:59:52 +0900301 &exynos4_device_ac97,
302 &exynos4_device_i2s0,
Jingoo Han744f20f2011-12-23 11:20:50 +0900303 &exynos4_device_ohci,
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900304 &samsung_device_keypad,
Sachin Kamat95727e12011-08-12 18:21:27 +0900305 &s5p_device_mfc,
306 &s5p_device_mfc_l,
307 &s5p_device_mfc_r,
Naveen Krishna Chatradhi2ba707a2011-07-18 15:14:01 +0900308 &exynos4_device_spdif,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900309 &exynos4_device_sysmmu,
Jassi Brarfbcb44d2011-01-18 14:41:43 +0900310 &samsung_asoc_dma,
Sangbeom Kim2839cc12011-07-21 14:12:19 +0900311 &samsung_asoc_idma,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900312 &s5p_device_fimd0,
313 &smdkv310_lcd_lte480wv,
Jassi Brarfbcb44d2011-01-18 14:41:43 +0900314 &smdkv310_smsc911x,
Inderpal Singh0d855f42011-07-04 19:19:36 +0900315 &exynos4_device_ahci,
Hatim Alic0735c82011-09-27 07:37:18 +0900316 &s5p_device_hdmi,
317 &s5p_device_mixer,
Changhwan Youncdff6e62010-09-20 15:25:51 +0900318};
319
Daein Mooncbff3eb2010-10-26 12:51:17 +0900320static void __init smdkv310_smsc911x_init(void)
321{
322 u32 cs1;
323
324 /* configure nCS1 width to 16 bits */
Kukjin Kim8cf460a2010-11-15 09:18:57 +0900325 cs1 = __raw_readl(S5P_SROM_BW) &
326 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
327 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
328 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
329 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
330 S5P_SROM_BW__NCS1__SHIFT;
331 __raw_writel(cs1, S5P_SROM_BW);
Daein Mooncbff3eb2010-10-26 12:51:17 +0900332
333 /* set timing for nCS1 suitable for ethernet chip */
Kukjin Kim8cf460a2010-11-15 09:18:57 +0900334 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
335 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
336 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
337 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
338 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
339 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
340 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
Daein Mooncbff3eb2010-10-26 12:51:17 +0900341}
342
Banajit Goswami8689de72011-07-20 23:45:21 +0900343/* LCD Backlight data */
344static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
345 .no = EXYNOS4_GPD0(1),
346 .func = S3C_GPIO_SFN(2),
347};
348
349static struct platform_pwm_backlight_data smdkv310_bl_data = {
350 .pwm_id = 1,
351 .pwm_period_ns = 1000,
352};
353
Hatim Alic0735c82011-09-27 07:37:18 +0900354static void s5p_tv_setup(void)
355{
356 /* direct HPD to HDMI chip */
357 WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
358 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
359 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
Hatim Alic0735c82011-09-27 07:37:18 +0900360}
361
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900362static void __init smdkv310_map_io(void)
363{
Kukjin Kimcc511b82011-12-27 08:18:36 +0100364 exynos_init_io(NULL, 0);
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900365 s3c24xx_init_clocks(24000000);
366 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
367}
368
Sachin Kamat95727e12011-08-12 18:21:27 +0900369static void __init smdkv310_reserve(void)
370{
371 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
372}
373
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900374static void __init smdkv310_machine_init(void)
375{
Jassi Brar6f5c11c2010-12-21 09:59:05 +0900376 s3c_i2c1_set_platdata(NULL);
377 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
378
Daein Mooncbff3eb2010-10-26 12:51:17 +0900379 smdkv310_smsc911x_init();
380
Hyuk Lee2b111482010-10-06 14:50:20 +0900381 s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
382 s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
383 s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
384 s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
385
Hatim Alic0735c82011-09-27 07:37:18 +0900386 s5p_tv_setup();
387 s5p_i2c_hdmiphy_set_platdata(NULL);
388
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900389 samsung_keypad_set_platdata(&smdkv310_keypad_data);
390
Banajit Goswami8689de72011-07-20 23:45:21 +0900391 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900392#ifdef CONFIG_DRM_EXYNOS
393 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
394 exynos4_fimd0_gpio_setup_24bpp();
395#else
Kukjin Kim42c0d262011-08-18 21:14:28 +0900396 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900397#endif
Banajit Goswami8689de72011-07-20 23:45:21 +0900398
Jingoo Han9830f6a2011-09-28 10:33:25 +0900399 smdkv310_ehci_init();
Jingoo Han744f20f2011-12-23 11:20:50 +0900400 smdkv310_ohci_init();
Jingoo Han9830f6a2011-09-28 10:33:25 +0900401 clk_xusbxti.rate = 24000000;
402
Changhwan Youncdff6e62010-09-20 15:25:51 +0900403 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900404}
405
406MACHINE_START(SMDKV310, "SMDKV310")
407 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
408 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900409 .atag_offset = 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900410 .init_irq = exynos4_init_irq,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900411 .map_io = smdkv310_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100412 .handle_irq = gic_handle_irq,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900413 .init_machine = smdkv310_machine_init,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900414 .timer = &exynos4_timer,
Sachin Kamat95727e12011-08-12 18:21:27 +0900415 .reserve = &smdkv310_reserve,
Russell King9eb48592012-01-03 11:56:53 +0100416 .restart = exynos4_restart,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900417MACHINE_END
Kukjin Kim42c0d262011-08-18 21:14:28 +0900418
419MACHINE_START(SMDKC210, "SMDKC210")
420 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900421 .atag_offset = 0x100,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900422 .init_irq = exynos4_init_irq,
423 .map_io = smdkv310_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100424 .handle_irq = gic_handle_irq,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900425 .init_machine = smdkv310_machine_init,
426 .timer = &exynos4_timer,
Russell King9eb48592012-01-03 11:56:53 +0100427 .restart = exynos4_restart,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900428MACHINE_END