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gerrit-public.fairphone.software / kernel / msm-5.4 / ae65a26dd387fec18dd1645fbb4b901b379cd6f5 / . / arch / sparc / include / asm / iommu_64.h
blob: f24f356f250376e0931a4d4bc5d6bc631f469a74 [file] [log] [blame]
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]1/* iommu.h: Definitions for the sun5 IOMMU.
2 *
3 * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
4 */
5#ifndef _SPARC64_IOMMU_H
6#define _SPARC64_IOMMU_H
7
8/* The format of an iopte in the page tables. */
9#define IOPTE_VALID 0x8000000000000000UL
10#define IOPTE_64K 0x2000000000000000UL
11#define IOPTE_STBUF 0x1000000000000000UL
12#define IOPTE_INTRA 0x0800000000000000UL
13#define IOPTE_CONTEXT 0x07ff800000000000UL
14#define IOPTE_PAGE 0x00007fffffffe000UL
15#define IOPTE_CACHE 0x0000000000000010UL
16#define IOPTE_WRITE 0x0000000000000002UL
17
18#define IOMMU_NUM_CTXS 4096
Sowmini Varadhanbb620c32015-04-09 15:33:31 -0400[diff] [blame]19#include <linux/iommu-common.h>
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]20
21struct iommu_arena {
22 unsigned long *map;
23 unsigned int hint;
24 unsigned int limit;
25};
26
Tushar Davef0248c12016-10-28 10:12:41 -0700[diff] [blame]27#define ATU_64_SPACE_SIZE 0x800000000 /* 32G */
28
29/* Data structures for SPARC ATU architecture */
30struct atu_iotsb {
31 void *table; /* IOTSB table base virtual addr*/
32 u64 ra; /* IOTSB table real addr */
33 u64 dvma_size; /* ranges[3].size or OS slected 32G size */
34 u64 dvma_base; /* ranges[3].base */
35 u64 table_size; /* IOTSB table size */
36 u64 page_size; /* IO PAGE size for IOTSB */
37 u32 iotsb_num; /* tsbnum is same as iotsb_handle */
38};
39
40struct atu_ranges {
41 u64 base;
42 u64 size;
43};
44
45struct atu {
46 struct atu_ranges *ranges;
47 struct atu_iotsb *iotsb;
Tushar Dave31f077d2016-10-28 10:12:42 -0700[diff] [blame]48 struct iommu_map_table tbl;
Tushar Davef0248c12016-10-28 10:12:41 -0700[diff] [blame]49 u64 base;
50 u64 size;
Tushar Dave31f077d2016-10-28 10:12:42 -0700[diff] [blame]51 u64 dma_addr_mask;
Tushar Davef0248c12016-10-28 10:12:41 -0700[diff] [blame]52};
53
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]54struct iommu {
Sowmini Varadhanbb620c32015-04-09 15:33:31 -0400[diff] [blame]55 struct iommu_map_table tbl;
Tushar Davef0248c12016-10-28 10:12:41 -0700[diff] [blame]56 struct atu *atu;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]57 spinlock_t lock;
Sowmini Varadhanbb620c32015-04-09 15:33:31 -0400[diff] [blame]58 u32 dma_addr_mask;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]59 iopte_t *page_table;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]60 unsigned long iommu_control;
61 unsigned long iommu_tsbbase;
62 unsigned long iommu_flush;
63 unsigned long iommu_flushinv;
64 unsigned long iommu_tags;
65 unsigned long iommu_ctxflush;
66 unsigned long write_complete_reg;
67 unsigned long dummy_page;
68 unsigned long dummy_page_pa;
69 unsigned long ctx_lowest_free;
70 DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]71};
72
73struct strbuf {
74 int strbuf_enabled;
75 unsigned long strbuf_control;
76 unsigned long strbuf_pflush;
77 unsigned long strbuf_fsync;
David S. Millerd3ae4b52008-09-09 23:54:02 -0700[diff] [blame]78 unsigned long strbuf_err_stat;
79 unsigned long strbuf_tag_diag;
80 unsigned long strbuf_line_diag;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]81 unsigned long strbuf_ctxflush;
82 unsigned long strbuf_ctxmatch_base;
83 unsigned long strbuf_flushflag_pa;
84 volatile unsigned long *strbuf_flushflag;
85 volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)];
86};
87
Sam Ravnborgf05a6862014-05-16 23:25:50 +0200[diff] [blame]88int iommu_table_init(struct iommu *iommu, int tsbsize,
89 u32 dma_offset, u32 dma_addr_mask,
90 int numa_node);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700[diff] [blame]91
92#endif /* !(_SPARC64_IOMMU_H) */