| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame^] | 1 | #ifndef _UAPI__SVM_H |
| 2 | #define _UAPI__SVM_H |
| 3 | |
| 4 | #define SVM_EXIT_READ_CR0 0x000 |
| 5 | #define SVM_EXIT_READ_CR3 0x003 |
| 6 | #define SVM_EXIT_READ_CR4 0x004 |
| 7 | #define SVM_EXIT_READ_CR8 0x008 |
| 8 | #define SVM_EXIT_WRITE_CR0 0x010 |
| 9 | #define SVM_EXIT_WRITE_CR3 0x013 |
| 10 | #define SVM_EXIT_WRITE_CR4 0x014 |
| 11 | #define SVM_EXIT_WRITE_CR8 0x018 |
| 12 | #define SVM_EXIT_READ_DR0 0x020 |
| 13 | #define SVM_EXIT_READ_DR1 0x021 |
| 14 | #define SVM_EXIT_READ_DR2 0x022 |
| 15 | #define SVM_EXIT_READ_DR3 0x023 |
| 16 | #define SVM_EXIT_READ_DR4 0x024 |
| 17 | #define SVM_EXIT_READ_DR5 0x025 |
| 18 | #define SVM_EXIT_READ_DR6 0x026 |
| 19 | #define SVM_EXIT_READ_DR7 0x027 |
| 20 | #define SVM_EXIT_WRITE_DR0 0x030 |
| 21 | #define SVM_EXIT_WRITE_DR1 0x031 |
| 22 | #define SVM_EXIT_WRITE_DR2 0x032 |
| 23 | #define SVM_EXIT_WRITE_DR3 0x033 |
| 24 | #define SVM_EXIT_WRITE_DR4 0x034 |
| 25 | #define SVM_EXIT_WRITE_DR5 0x035 |
| 26 | #define SVM_EXIT_WRITE_DR6 0x036 |
| 27 | #define SVM_EXIT_WRITE_DR7 0x037 |
| 28 | #define SVM_EXIT_EXCP_BASE 0x040 |
| 29 | #define SVM_EXIT_INTR 0x060 |
| 30 | #define SVM_EXIT_NMI 0x061 |
| 31 | #define SVM_EXIT_SMI 0x062 |
| 32 | #define SVM_EXIT_INIT 0x063 |
| 33 | #define SVM_EXIT_VINTR 0x064 |
| 34 | #define SVM_EXIT_CR0_SEL_WRITE 0x065 |
| 35 | #define SVM_EXIT_IDTR_READ 0x066 |
| 36 | #define SVM_EXIT_GDTR_READ 0x067 |
| 37 | #define SVM_EXIT_LDTR_READ 0x068 |
| 38 | #define SVM_EXIT_TR_READ 0x069 |
| 39 | #define SVM_EXIT_IDTR_WRITE 0x06a |
| 40 | #define SVM_EXIT_GDTR_WRITE 0x06b |
| 41 | #define SVM_EXIT_LDTR_WRITE 0x06c |
| 42 | #define SVM_EXIT_TR_WRITE 0x06d |
| 43 | #define SVM_EXIT_RDTSC 0x06e |
| 44 | #define SVM_EXIT_RDPMC 0x06f |
| 45 | #define SVM_EXIT_PUSHF 0x070 |
| 46 | #define SVM_EXIT_POPF 0x071 |
| 47 | #define SVM_EXIT_CPUID 0x072 |
| 48 | #define SVM_EXIT_RSM 0x073 |
| 49 | #define SVM_EXIT_IRET 0x074 |
| 50 | #define SVM_EXIT_SWINT 0x075 |
| 51 | #define SVM_EXIT_INVD 0x076 |
| 52 | #define SVM_EXIT_PAUSE 0x077 |
| 53 | #define SVM_EXIT_HLT 0x078 |
| 54 | #define SVM_EXIT_INVLPG 0x079 |
| 55 | #define SVM_EXIT_INVLPGA 0x07a |
| 56 | #define SVM_EXIT_IOIO 0x07b |
| 57 | #define SVM_EXIT_MSR 0x07c |
| 58 | #define SVM_EXIT_TASK_SWITCH 0x07d |
| 59 | #define SVM_EXIT_FERR_FREEZE 0x07e |
| 60 | #define SVM_EXIT_SHUTDOWN 0x07f |
| 61 | #define SVM_EXIT_VMRUN 0x080 |
| 62 | #define SVM_EXIT_VMMCALL 0x081 |
| 63 | #define SVM_EXIT_VMLOAD 0x082 |
| 64 | #define SVM_EXIT_VMSAVE 0x083 |
| 65 | #define SVM_EXIT_STGI 0x084 |
| 66 | #define SVM_EXIT_CLGI 0x085 |
| 67 | #define SVM_EXIT_SKINIT 0x086 |
| 68 | #define SVM_EXIT_RDTSCP 0x087 |
| 69 | #define SVM_EXIT_ICEBP 0x088 |
| 70 | #define SVM_EXIT_WBINVD 0x089 |
| 71 | #define SVM_EXIT_MONITOR 0x08a |
| 72 | #define SVM_EXIT_MWAIT 0x08b |
| 73 | #define SVM_EXIT_MWAIT_COND 0x08c |
| 74 | #define SVM_EXIT_XSETBV 0x08d |
| 75 | #define SVM_EXIT_NPF 0x400 |
| 76 | |
| 77 | #define SVM_EXIT_ERR -1 |
| 78 | |
| 79 | #define SVM_EXIT_REASONS \ |
| 80 | { SVM_EXIT_READ_CR0, "read_cr0" }, \ |
| 81 | { SVM_EXIT_READ_CR3, "read_cr3" }, \ |
| 82 | { SVM_EXIT_READ_CR4, "read_cr4" }, \ |
| 83 | { SVM_EXIT_READ_CR8, "read_cr8" }, \ |
| 84 | { SVM_EXIT_WRITE_CR0, "write_cr0" }, \ |
| 85 | { SVM_EXIT_WRITE_CR3, "write_cr3" }, \ |
| 86 | { SVM_EXIT_WRITE_CR4, "write_cr4" }, \ |
| 87 | { SVM_EXIT_WRITE_CR8, "write_cr8" }, \ |
| 88 | { SVM_EXIT_READ_DR0, "read_dr0" }, \ |
| 89 | { SVM_EXIT_READ_DR1, "read_dr1" }, \ |
| 90 | { SVM_EXIT_READ_DR2, "read_dr2" }, \ |
| 91 | { SVM_EXIT_READ_DR3, "read_dr3" }, \ |
| 92 | { SVM_EXIT_WRITE_DR0, "write_dr0" }, \ |
| 93 | { SVM_EXIT_WRITE_DR1, "write_dr1" }, \ |
| 94 | { SVM_EXIT_WRITE_DR2, "write_dr2" }, \ |
| 95 | { SVM_EXIT_WRITE_DR3, "write_dr3" }, \ |
| 96 | { SVM_EXIT_WRITE_DR5, "write_dr5" }, \ |
| 97 | { SVM_EXIT_WRITE_DR7, "write_dr7" }, \ |
| 98 | { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, \ |
| 99 | { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \ |
| 100 | { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, \ |
| 101 | { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \ |
| 102 | { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \ |
| 103 | { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \ |
| 104 | { SVM_EXIT_INTR, "interrupt" }, \ |
| 105 | { SVM_EXIT_NMI, "nmi" }, \ |
| 106 | { SVM_EXIT_SMI, "smi" }, \ |
| 107 | { SVM_EXIT_INIT, "init" }, \ |
| 108 | { SVM_EXIT_VINTR, "vintr" }, \ |
| 109 | { SVM_EXIT_CPUID, "cpuid" }, \ |
| 110 | { SVM_EXIT_INVD, "invd" }, \ |
| 111 | { SVM_EXIT_HLT, "hlt" }, \ |
| 112 | { SVM_EXIT_INVLPG, "invlpg" }, \ |
| 113 | { SVM_EXIT_INVLPGA, "invlpga" }, \ |
| 114 | { SVM_EXIT_IOIO, "io" }, \ |
| 115 | { SVM_EXIT_MSR, "msr" }, \ |
| 116 | { SVM_EXIT_TASK_SWITCH, "task_switch" }, \ |
| 117 | { SVM_EXIT_SHUTDOWN, "shutdown" }, \ |
| 118 | { SVM_EXIT_VMRUN, "vmrun" }, \ |
| 119 | { SVM_EXIT_VMMCALL, "hypercall" }, \ |
| 120 | { SVM_EXIT_VMLOAD, "vmload" }, \ |
| 121 | { SVM_EXIT_VMSAVE, "vmsave" }, \ |
| 122 | { SVM_EXIT_STGI, "stgi" }, \ |
| 123 | { SVM_EXIT_CLGI, "clgi" }, \ |
| 124 | { SVM_EXIT_SKINIT, "skinit" }, \ |
| 125 | { SVM_EXIT_WBINVD, "wbinvd" }, \ |
| 126 | { SVM_EXIT_MONITOR, "monitor" }, \ |
| 127 | { SVM_EXIT_MWAIT, "mwait" }, \ |
| 128 | { SVM_EXIT_XSETBV, "xsetbv" }, \ |
| 129 | { SVM_EXIT_NPF, "npf" } |
| 130 | |
| 131 | |
| 132 | #endif /* _UAPI__SVM_H */ |