Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> |
| 3 | * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 |
| 7 | * as published by the Free Software Foundation |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/of.h> |
| 16 | #include <linux/mtd/mtd.h> |
| 17 | #include <linux/mtd/partitions.h> |
| 18 | #include <linux/etherdevice.h> |
| 19 | #include <asm/unaligned.h> |
| 20 | #include "mt7601u.h" |
| 21 | #include "eeprom.h" |
| 22 | |
| 23 | static bool |
| 24 | field_valid(u8 val) |
| 25 | { |
| 26 | return val != 0xff; |
| 27 | } |
| 28 | |
| 29 | static s8 |
| 30 | field_validate(u8 val) |
| 31 | { |
| 32 | if (!field_valid(val)) |
| 33 | return 0; |
| 34 | |
| 35 | return val; |
| 36 | } |
| 37 | |
| 38 | static int |
| 39 | mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data, |
| 40 | enum mt7601u_eeprom_access_modes mode) |
| 41 | { |
| 42 | u32 val; |
| 43 | int i; |
| 44 | |
| 45 | val = mt76_rr(dev, MT_EFUSE_CTRL); |
| 46 | val &= ~(MT_EFUSE_CTRL_AIN | |
| 47 | MT_EFUSE_CTRL_MODE); |
| 48 | val |= MT76_SET(MT_EFUSE_CTRL_AIN, addr & ~0xf) | |
| 49 | MT76_SET(MT_EFUSE_CTRL_MODE, mode) | |
| 50 | MT_EFUSE_CTRL_KICK; |
| 51 | mt76_wr(dev, MT_EFUSE_CTRL, val); |
| 52 | |
| 53 | if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000)) |
| 54 | return -ETIMEDOUT; |
| 55 | |
| 56 | val = mt76_rr(dev, MT_EFUSE_CTRL); |
| 57 | if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) { |
| 58 | /* Parts of eeprom not in the usage map (0x80-0xc0,0xf0) |
| 59 | * will not return valid data but it's ok. |
| 60 | */ |
| 61 | memset(data, 0xff, 16); |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | for (i = 0; i < 4; i++) { |
| 66 | val = mt76_rr(dev, MT_EFUSE_DATA(i)); |
| 67 | put_unaligned_le32(val, data + 4 * i); |
| 68 | } |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | static int |
| 74 | mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev) |
| 75 | { |
| 76 | const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16); |
| 77 | u8 data[map_reads * 16]; |
| 78 | int ret, i; |
| 79 | u32 start = 0, end = 0, cnt_free; |
| 80 | |
| 81 | for (i = 0; i < map_reads; i++) { |
| 82 | ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16, |
| 83 | data + i * 16, MT_EE_PHYSICAL_READ); |
| 84 | if (ret) |
| 85 | return ret; |
| 86 | } |
| 87 | |
| 88 | for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++) |
| 89 | if (!data[i]) { |
| 90 | if (!start) |
| 91 | start = MT_EE_USAGE_MAP_START + i; |
| 92 | end = MT_EE_USAGE_MAP_START + i; |
| 93 | } |
| 94 | cnt_free = end - start + 1; |
| 95 | |
| 96 | if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) { |
| 97 | dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n"); |
| 98 | return -EINVAL; |
| 99 | } |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | static bool |
| 105 | mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom) |
| 106 | { |
| 107 | u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); |
| 108 | |
| 109 | return ~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN); |
| 110 | } |
| 111 | |
| 112 | static void |
| 113 | mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom) |
| 114 | { |
| 115 | u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0); |
| 116 | u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); |
| 117 | |
| 118 | if (!field_valid(nic_conf1 & 0xff)) |
| 119 | nic_conf1 &= 0xff00; |
| 120 | |
| 121 | dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) && |
| 122 | !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC); |
| 123 | |
| 124 | if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL) |
| 125 | dev_err(dev->dev, |
| 126 | "Error: this driver does not support HW RF ctrl\n"); |
| 127 | |
| 128 | if (!field_valid(nic_conf0 >> 8)) |
| 129 | return; |
| 130 | |
| 131 | if (MT76_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 || |
| 132 | MT76_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1) |
| 133 | dev_err(dev->dev, |
| 134 | "Error: device has more than 1 RX/TX stream!\n"); |
| 135 | } |
| 136 | |
| 137 | static int |
| 138 | mt7601u_set_macaddr(struct mt7601u_dev *dev, const u8 *eeprom) |
| 139 | { |
| 140 | const void *src = eeprom + MT_EE_MAC_ADDR; |
| 141 | |
| 142 | ether_addr_copy(dev->macaddr, src); |
| 143 | |
| 144 | if (!is_valid_ether_addr(dev->macaddr)) { |
| 145 | eth_random_addr(dev->macaddr); |
| 146 | dev_info(dev->dev, |
| 147 | "Invalid MAC address, using random address %pM\n", |
| 148 | dev->macaddr); |
| 149 | } |
| 150 | |
| 151 | mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr)); |
| 152 | mt76_wr(dev, MT_MAC_ADDR_DW1, get_unaligned_le16(dev->macaddr + 4) | |
| 153 | MT76_SET(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff)); |
| 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | |
| 158 | static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev, |
| 159 | u8 *eeprom, u8 max_pwr) |
| 160 | { |
| 161 | u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER]; |
| 162 | |
| 163 | if (trgt_pwr > max_pwr || !trgt_pwr) { |
| 164 | dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n", |
| 165 | trgt_pwr); |
| 166 | trgt_pwr = 0x20; |
| 167 | } |
| 168 | |
| 169 | memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr)); |
| 170 | } |
| 171 | |
| 172 | static void |
| 173 | mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom) |
| 174 | { |
| 175 | u32 i, val; |
| 176 | u8 max_pwr; |
| 177 | |
| 178 | val = mt7601u_rr(dev, MT_TX_ALC_CFG_0); |
| 179 | max_pwr = MT76_GET(MT_TX_ALC_CFG_0_LIMIT_0, val); |
| 180 | |
| 181 | if (mt7601u_has_tssi(dev, eeprom)) { |
| 182 | mt7601u_set_channel_target_power(dev, eeprom, max_pwr); |
| 183 | return; |
| 184 | } |
| 185 | |
| 186 | for (i = 0; i < 14; i++) { |
| 187 | s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]); |
| 188 | |
| 189 | if (power > max_pwr || power < 0) |
| 190 | power = MT7601U_DEFAULT_TX_POWER; |
| 191 | |
| 192 | dev->ee->chan_pwr[i] = power; |
| 193 | } |
| 194 | } |
| 195 | |
| 196 | static void |
| 197 | mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom) |
| 198 | { |
| 199 | /* Note: - region 31 is not valid for mt7601u (see rtmp_init.c) |
| 200 | * - comments in rtmp_def.h are incorrect (see rt_channel.c) |
| 201 | */ |
| 202 | static const struct reg_channel_bounds chan_bounds[] = { |
| 203 | /* EEPROM country regions 0 - 7 */ |
| 204 | { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 }, |
| 205 | { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 }, |
| 206 | /* EEPROM country regions 32 - 33 */ |
| 207 | { 1, 11 }, { 1, 14 } |
| 208 | }; |
| 209 | u8 val = eeprom[MT_EE_COUNTRY_REGION]; |
| 210 | int idx = -1; |
| 211 | |
| 212 | if (val < 8) |
| 213 | idx = val; |
| 214 | if (val > 31 && val < 33) |
| 215 | idx = val - 32 + 8; |
| 216 | |
| 217 | if (idx != -1) |
| 218 | dev_info(dev->dev, |
| 219 | "EEPROM country region %02hhx (channels %hhd-%hhd)\n", |
| 220 | val, chan_bounds[idx].start, |
| 221 | chan_bounds[idx].start + chan_bounds[idx].num - 1); |
| 222 | else |
| 223 | idx = 5; /* channels 1 - 14 */ |
| 224 | |
| 225 | dev->ee->reg = chan_bounds[idx]; |
| 226 | |
| 227 | /* TODO: country region 33 is special - phy should be set to B-mode |
| 228 | * before entering channel 14 (see sta/connect.c) |
| 229 | */ |
| 230 | } |
| 231 | |
| 232 | static void |
| 233 | mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom) |
| 234 | { |
| 235 | u8 comp; |
| 236 | |
| 237 | dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]); |
| 238 | comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]); |
| 239 | |
| 240 | if (comp & BIT(7)) |
| 241 | dev->ee->rf_freq_off -= comp & 0x7f; |
| 242 | else |
| 243 | dev->ee->rf_freq_off += comp; |
| 244 | } |
| 245 | |
| 246 | static void |
| 247 | mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom) |
| 248 | { |
| 249 | int i; |
| 250 | s8 *rssi_offset = dev->ee->rssi_offset; |
| 251 | |
| 252 | for (i = 0; i < 2; i++) { |
| 253 | rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i]; |
| 254 | |
| 255 | if (rssi_offset[i] < -10 || rssi_offset[i] > 10) { |
| 256 | dev_warn(dev->dev, |
| 257 | "Warning: EEPROM RSSI is invalid %02hhx\n", |
| 258 | rssi_offset[i]); |
| 259 | rssi_offset[i] = 0; |
| 260 | } |
| 261 | } |
| 262 | } |
| 263 | |
| 264 | static void |
| 265 | mt7601u_extra_power_over_mac(struct mt7601u_dev *dev) |
| 266 | { |
| 267 | u32 val; |
| 268 | |
| 269 | val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8); |
| 270 | val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8); |
| 271 | mt7601u_wr(dev, MT_TX_PWR_CFG_7, val); |
| 272 | |
| 273 | val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8); |
| 274 | mt7601u_wr(dev, MT_TX_PWR_CFG_9, val); |
| 275 | } |
| 276 | |
| 277 | static void |
| 278 | mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value) |
| 279 | { |
Jakub Kicinski | 8d01237 | 2015-06-10 20:10:09 +0200 | [diff] [blame] | 280 | /* Invalid? Note: vendor driver does not handle this */ |
| 281 | if (value == 0xff) |
| 282 | return; |
| 283 | |
Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 284 | rate->raw = s6_validate(value); |
| 285 | rate->bw20 = s6_to_int(value); |
| 286 | /* Note: vendor driver does cap the value to s6 right away */ |
| 287 | rate->bw40 = rate->bw20 + delta; |
| 288 | } |
| 289 | |
| 290 | static void |
| 291 | mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i) |
| 292 | { |
| 293 | struct mt7601u_rate_power *t = &dev->ee->power_rate_table; |
| 294 | |
| 295 | switch (i) { |
| 296 | case 0: |
| 297 | mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff); |
| 298 | mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff); |
| 299 | /* Save cck bw20 for fixups of channel 14 */ |
| 300 | dev->ee->real_cck_bw20[0] = t->cck[0].bw20; |
| 301 | dev->ee->real_cck_bw20[1] = t->cck[1].bw20; |
| 302 | |
| 303 | mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff); |
| 304 | mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff); |
| 305 | break; |
| 306 | case 1: |
| 307 | mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff); |
| 308 | mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff); |
| 309 | mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff); |
| 310 | mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff); |
| 311 | break; |
| 312 | case 2: |
| 313 | mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff); |
| 314 | mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff); |
| 315 | break; |
| 316 | } |
| 317 | } |
| 318 | |
| 319 | static s8 |
| 320 | get_delta(u8 val) |
| 321 | { |
| 322 | s8 ret; |
| 323 | |
| 324 | if (!field_valid(val) || !(val & BIT(7))) |
| 325 | return 0; |
| 326 | |
| 327 | ret = val & 0x1f; |
| 328 | if (ret > 8) |
| 329 | ret = 8; |
| 330 | if (val & BIT(6)) |
| 331 | ret = -ret; |
| 332 | |
| 333 | return ret; |
| 334 | } |
| 335 | |
| 336 | static void |
| 337 | mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom) |
| 338 | { |
| 339 | u32 val; |
| 340 | s8 bw40_delta; |
| 341 | int i; |
| 342 | |
| 343 | bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]); |
| 344 | |
| 345 | for (i = 0; i < 5; i++) { |
| 346 | val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i)); |
| 347 | |
| 348 | mt7601u_save_power_rate(dev, bw40_delta, val, i); |
| 349 | |
| 350 | if (~val) |
| 351 | mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val); |
| 352 | } |
| 353 | |
| 354 | mt7601u_extra_power_over_mac(dev); |
| 355 | } |
| 356 | |
| 357 | static void |
| 358 | mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom) |
| 359 | { |
| 360 | struct tssi_data *d = &dev->ee->tssi_data; |
| 361 | |
| 362 | if (!dev->ee->tssi_enabled) |
| 363 | return; |
| 364 | |
| 365 | d->slope = eeprom[MT_EE_TX_TSSI_SLOPE]; |
| 366 | d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024; |
| 367 | d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP]; |
| 368 | d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1]; |
| 369 | d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2]; |
| 370 | } |
| 371 | |
| 372 | int |
| 373 | mt7601u_eeprom_init(struct mt7601u_dev *dev) |
| 374 | { |
| 375 | u8 *eeprom; |
| 376 | int i, ret; |
| 377 | |
| 378 | ret = mt7601u_efuse_physical_size_check(dev); |
| 379 | if (ret) |
| 380 | return ret; |
| 381 | |
| 382 | dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL); |
| 383 | if (!dev->ee) |
| 384 | return -ENOMEM; |
| 385 | |
| 386 | eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL); |
| 387 | if (!eeprom) |
| 388 | return -ENOMEM; |
| 389 | |
| 390 | for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) { |
| 391 | ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ); |
| 392 | if (ret) |
| 393 | goto out; |
| 394 | } |
| 395 | |
| 396 | if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER) |
| 397 | dev_warn(dev->dev, |
| 398 | "Warning: unsupported EEPROM version %02hhx\n", |
| 399 | eeprom[MT_EE_VERSION_EE]); |
| 400 | dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n", |
| 401 | eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]); |
| 402 | |
| 403 | mt7601u_set_macaddr(dev, eeprom); |
| 404 | mt7601u_set_chip_cap(dev, eeprom); |
| 405 | mt7601u_set_channel_power(dev, eeprom); |
| 406 | mt7601u_set_country_reg(dev, eeprom); |
| 407 | mt7601u_set_rf_freq_off(dev, eeprom); |
| 408 | mt7601u_set_rssi_offset(dev, eeprom); |
| 409 | dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP]; |
| 410 | dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN]; |
| 411 | |
| 412 | mt7601u_config_tx_power_per_rate(dev, eeprom); |
| 413 | |
| 414 | mt7601u_init_tssi_params(dev, eeprom); |
| 415 | out: |
| 416 | kfree(eeprom); |
| 417 | return ret; |
| 418 | } |