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Bard Liao997b0522013-06-11 13:10:16 +08001/*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
Sachin Kamataffb74a2014-04-04 11:29:11 +053021#include <linux/of.h>
Stephen Warrendcad9f02013-06-12 11:34:30 -060022#include <linux/of_gpio.h>
Bard Liao997b0522013-06-11 13:10:16 +080023#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
Liam Girdwood02b80772013-09-13 17:57:36 +010025#include <linux/acpi.h>
Bard Liao997b0522013-06-11 13:10:16 +080026#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
34#include "rt5640.h"
35
36#define RT5640_DEVICE_ID 0x6231
37
38#define RT5640_PR_RANGE_BASE (0xff + 1)
39#define RT5640_PR_SPACING 0x100
40
41#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
42
43static const struct regmap_range_cfg rt5640_ranges[] = {
44 { .name = "PR", .range_min = RT5640_PR_BASE,
45 .range_max = RT5640_PR_BASE + 0xb4,
46 .selector_reg = RT5640_PRIV_INDEX,
47 .selector_mask = 0xff,
48 .selector_shift = 0x0,
49 .window_start = RT5640_PRIV_DATA,
50 .window_len = 0x1, },
51};
52
53static struct reg_default init_list[] = {
54 {RT5640_PR_BASE + 0x3d, 0x3600},
Bard Liao997b0522013-06-11 13:10:16 +080055 {RT5640_PR_BASE + 0x12, 0x0aa8},
56 {RT5640_PR_BASE + 0x14, 0x0aaa},
57 {RT5640_PR_BASE + 0x20, 0x6110},
58 {RT5640_PR_BASE + 0x21, 0xe0e0},
59 {RT5640_PR_BASE + 0x23, 0x1804},
60};
61#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
62
63static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
64 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167};
168
169static int rt5640_reset(struct snd_soc_codec *codec)
170{
171 return snd_soc_write(codec, RT5640_RESET, 0);
172}
173
174static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207}
208
209static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210{
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
350static unsigned int bst_tlv[] = {
351 TLV_DB_RANGE_HEAD(7),
352 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
353 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
354 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
355 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
356 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
357 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
358 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
359};
360
361/* Interface data select */
362static const char * const rt5640_data_select[] = {
363 "Normal", "left copy to right", "right copy to left", "Swap"};
364
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100365static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
366 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800367
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100368static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
369 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800370
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100371static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
372 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800373
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100374static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
375 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800376
377/* Class D speaker gain ratio */
378static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
379 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
380
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100381static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
382 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
Bard Liao997b0522013-06-11 13:10:16 +0800383
384static const struct snd_kcontrol_new rt5640_snd_controls[] = {
385 /* Speaker Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800386 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
387 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
388 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
389 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
390 /* Headphone Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800391 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
392 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
393 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
394 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
395 /* OUTPUT Control */
396 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
397 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
398 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
399 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
400 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
401 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
402 /* MONO Output Control */
403 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
404 RT5640_L_MUTE_SFT, 1, 1),
405 /* DAC Digital Volume */
406 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
407 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
408 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
409 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
410 175, 0, dac_vol_tlv),
411 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
412 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
413 175, 0, dac_vol_tlv),
414 /* IN1/IN2 Control */
415 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
416 RT5640_BST_SFT1, 8, 0, bst_tlv),
417 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
418 RT5640_BST_SFT2, 8, 0, bst_tlv),
419 /* INL/INR Volume Control */
420 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
421 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
422 31, 1, in_vol_tlv),
423 /* ADC Digital Volume Control */
424 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
425 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
426 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
427 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
428 127, 0, adc_vol_tlv),
429 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
430 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
431 127, 0, adc_vol_tlv),
432 /* ADC Boost Volume Control */
433 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
434 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
435 3, 0, adc_bst_tlv),
436 /* Class D speaker gain ratio */
437 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
438
439 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
440 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
441 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
442 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
443};
444
445/**
446 * set_dmic_clk - Set parameter of dmic.
447 *
448 * @w: DAPM widget.
449 * @kcontrol: The kcontrol of this widget.
450 * @event: Event id.
451 *
452 * Choose dmic clock between 1MHz and 3MHz.
453 * It is better for clock to approximate 3MHz.
454 */
455static int set_dmic_clk(struct snd_soc_dapm_widget *w,
456 struct snd_kcontrol *kcontrol, int event)
457{
458 struct snd_soc_codec *codec = w->codec;
459 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
460 int div[] = {2, 3, 4, 6, 8, 12};
461 int idx = -EINVAL, i;
462 int rate, red, bound, temp;
463
464 rate = rt5640->sysclk;
465 red = 3000000 * 12;
466 for (i = 0; i < ARRAY_SIZE(div); i++) {
467 bound = div[i] * 3000000;
468 if (rate > bound)
469 continue;
470 temp = bound - rate;
471 if (temp < red) {
472 red = temp;
473 idx = i;
474 }
475 }
476 if (idx < 0)
477 dev_err(codec->dev, "Failed to set DMIC clock\n");
478 else
479 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
480 idx << RT5640_DMIC_CLK_SFT);
481 return idx;
482}
483
484static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
485 struct snd_soc_dapm_widget *sink)
486{
487 unsigned int val;
488
489 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
490 val &= RT5640_SCLK_SRC_MASK;
491 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
492 return 1;
493 else
494 return 0;
495}
496
497/* Digital Mixer */
498static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
499 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
500 RT5640_M_ADC_L1_SFT, 1, 1),
501 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
502 RT5640_M_ADC_L2_SFT, 1, 1),
503};
504
505static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
506 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
507 RT5640_M_ADC_R1_SFT, 1, 1),
508 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
509 RT5640_M_ADC_R2_SFT, 1, 1),
510};
511
512static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
513 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
514 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
515 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
516 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
517};
518
519static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
520 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
521 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
522 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
523 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
524};
525
526static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
527 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
528 RT5640_M_ADCMIX_L_SFT, 1, 1),
529 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
530 RT5640_M_IF1_DAC_L_SFT, 1, 1),
531};
532
533static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
534 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
535 RT5640_M_ADCMIX_R_SFT, 1, 1),
536 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
537 RT5640_M_IF1_DAC_R_SFT, 1, 1),
538};
539
540static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
541 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
542 RT5640_M_DAC_L1_SFT, 1, 1),
543 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
544 RT5640_M_DAC_L2_SFT, 1, 1),
545 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
546 RT5640_M_ANC_DAC_L_SFT, 1, 1),
547};
548
549static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
550 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_DAC_R1_SFT, 1, 1),
552 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
553 RT5640_M_DAC_R2_SFT, 1, 1),
554 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
555 RT5640_M_ANC_DAC_R_SFT, 1, 1),
556};
557
558static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
559 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
560 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
561 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
562 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
563 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
564 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
565};
566
567static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
568 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
570 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
571 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
572 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
573 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
574};
575
576static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
577 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
578 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
579 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
580 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
581};
582
583static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
584 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
585 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
586 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
587 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
588};
589
590/* Analog Input Mixer */
591static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
592 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
593 RT5640_M_HP_L_RM_L_SFT, 1, 1),
594 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
595 RT5640_M_IN_L_RM_L_SFT, 1, 1),
596 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
597 RT5640_M_BST4_RM_L_SFT, 1, 1),
598 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
599 RT5640_M_BST1_RM_L_SFT, 1, 1),
600 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
601 RT5640_M_OM_L_RM_L_SFT, 1, 1),
602};
603
604static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
605 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
606 RT5640_M_HP_R_RM_R_SFT, 1, 1),
607 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
608 RT5640_M_IN_R_RM_R_SFT, 1, 1),
609 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
610 RT5640_M_BST4_RM_R_SFT, 1, 1),
611 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
612 RT5640_M_BST1_RM_R_SFT, 1, 1),
613 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
614 RT5640_M_OM_R_RM_R_SFT, 1, 1),
615};
616
617/* Analog Output Mixer */
618static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
619 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
620 RT5640_M_RM_L_SM_L_SFT, 1, 1),
621 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
622 RT5640_M_IN_L_SM_L_SFT, 1, 1),
623 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
624 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
625 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
626 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
627 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
628 RT5640_M_OM_L_SM_L_SFT, 1, 1),
629};
630
631static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
632 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
633 RT5640_M_RM_R_SM_R_SFT, 1, 1),
634 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
635 RT5640_M_IN_R_SM_R_SFT, 1, 1),
636 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
637 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
638 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
639 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
640 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
641 RT5640_M_OM_R_SM_R_SFT, 1, 1),
642};
643
644static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
645 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
646 RT5640_M_SM_L_OM_L_SFT, 1, 1),
647 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
648 RT5640_M_BST1_OM_L_SFT, 1, 1),
649 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
650 RT5640_M_IN_L_OM_L_SFT, 1, 1),
651 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
652 RT5640_M_RM_L_OM_L_SFT, 1, 1),
653 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
654 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
655 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
656 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
658 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
659};
660
661static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
662 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
663 RT5640_M_SM_L_OM_R_SFT, 1, 1),
664 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
665 RT5640_M_BST4_OM_R_SFT, 1, 1),
666 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
667 RT5640_M_BST1_OM_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
669 RT5640_M_IN_R_OM_R_SFT, 1, 1),
670 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
671 RT5640_M_RM_R_OM_R_SFT, 1, 1),
672 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
673 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
675 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
676 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
677 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
678};
679
680static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
682 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
683 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
684 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
685 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
686 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
687 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
688 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
689 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
690 RT5640_M_BST1_SPM_L_SFT, 1, 1),
691};
692
693static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
694 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
695 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
697 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
698 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
699 RT5640_M_BST1_SPM_R_SFT, 1, 1),
700};
701
702static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
703 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
704 RT5640_M_DAC2_HM_SFT, 1, 1),
705 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
706 RT5640_M_DAC1_HM_SFT, 1, 1),
707 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
708 RT5640_M_HPVOL_HM_SFT, 1, 1),
709};
710
711static const struct snd_kcontrol_new rt5640_lout_mix[] = {
712 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
713 RT5640_M_DAC_L1_LM_SFT, 1, 1),
714 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
715 RT5640_M_DAC_R1_LM_SFT, 1, 1),
716 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
717 RT5640_M_OV_L_LM_SFT, 1, 1),
718 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
719 RT5640_M_OV_R_LM_SFT, 1, 1),
720};
721
722static const struct snd_kcontrol_new rt5640_mono_mix[] = {
723 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
724 RT5640_M_DAC_R2_MM_SFT, 1, 1),
725 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
726 RT5640_M_DAC_L2_MM_SFT, 1, 1),
727 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
728 RT5640_M_OV_R_MM_SFT, 1, 1),
729 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
730 RT5640_M_OV_L_MM_SFT, 1, 1),
731 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
732 RT5640_M_BST1_MM_SFT, 1, 1),
733};
734
Bard Liao246693b2013-08-23 10:29:26 +0800735static const struct snd_kcontrol_new spk_l_enable_control =
736 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
737 RT5640_L_MUTE_SFT, 1, 1);
738
739static const struct snd_kcontrol_new spk_r_enable_control =
740 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
741 RT5640_R_MUTE_SFT, 1, 1);
742
743static const struct snd_kcontrol_new hp_l_enable_control =
744 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
745 RT5640_L_MUTE_SFT, 1, 1);
746
747static const struct snd_kcontrol_new hp_r_enable_control =
748 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
749 RT5640_R_MUTE_SFT, 1, 1);
750
Bard Liao997b0522013-06-11 13:10:16 +0800751/* Stereo ADC source */
752static const char * const rt5640_stereo_adc1_src[] = {
753 "DIG MIX", "ADC"
754};
755
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100756static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
757 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800758
759static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
760 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
761
762static const char * const rt5640_stereo_adc2_src[] = {
763 "DMIC1", "DMIC2", "DIG MIX"
764};
765
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100766static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
767 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800768
769static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
770 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
771
772/* Mono ADC source */
773static const char * const rt5640_mono_adc_l1_src[] = {
774 "Mono DAC MIXL", "ADCL"
775};
776
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100777static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
778 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800779
780static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
781 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
782
783static const char * const rt5640_mono_adc_l2_src[] = {
784 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
785};
786
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100787static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
788 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800789
790static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
791 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
792
793static const char * const rt5640_mono_adc_r1_src[] = {
794 "Mono DAC MIXR", "ADCR"
795};
796
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100797static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
798 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800799
800static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
801 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
802
803static const char * const rt5640_mono_adc_r2_src[] = {
804 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
805};
806
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100807static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
808 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800809
810static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
811 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
812
813/* DAC2 channel source */
814static const char * const rt5640_dac_l2_src[] = {
815 "IF2", "Base L/R"
816};
817
818static int rt5640_dac_l2_values[] = {
819 0,
820 3,
821};
822
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100823static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
824 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
825 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800826
827static const struct snd_kcontrol_new rt5640_dac_l2_mux =
828 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
829
830static const char * const rt5640_dac_r2_src[] = {
831 "IF2",
832};
833
834static int rt5640_dac_r2_values[] = {
835 0,
836};
837
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100838static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
839 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
840 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800841
842static const struct snd_kcontrol_new rt5640_dac_r2_mux =
843 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
844
845/* digital interface and iis interface map */
846static const char * const rt5640_dai_iis_map[] = {
847 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
848};
849
850static int rt5640_dai_iis_map_values[] = {
851 0,
852 5,
853 6,
854 7,
855};
856
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100857static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
858 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
859 0x7, rt5640_dai_iis_map,
860 rt5640_dai_iis_map_values);
Bard Liao997b0522013-06-11 13:10:16 +0800861
862static const struct snd_kcontrol_new rt5640_dai_mux =
863 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
864
865/* SDI select */
866static const char * const rt5640_sdi_sel[] = {
867 "IF1", "IF2"
868};
869
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100870static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
871 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
Bard Liao997b0522013-06-11 13:10:16 +0800872
873static const struct snd_kcontrol_new rt5640_sdi_mux =
874 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
875
Bard Liao997b0522013-06-11 13:10:16 +0800876static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
877 struct snd_kcontrol *kcontrol, int event)
878{
879 struct snd_soc_codec *codec = w->codec;
880
881 switch (event) {
882 case SND_SOC_DAPM_PRE_PMU:
883 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
884 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
885 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
886 snd_soc_update_bits(codec, RT5640_DMIC,
887 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
888 RT5640_DMIC_1_DP_MASK,
889 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
890 RT5640_DMIC_1_DP_IN1P);
891 break;
892
893 default:
894 return 0;
895 }
896
897 return 0;
898}
899
900static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
901 struct snd_kcontrol *kcontrol, int event)
902{
903 struct snd_soc_codec *codec = w->codec;
904
905 switch (event) {
906 case SND_SOC_DAPM_PRE_PMU:
907 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
908 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
909 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
910 snd_soc_update_bits(codec, RT5640_DMIC,
911 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
912 RT5640_DMIC_2_DP_MASK,
913 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
914 RT5640_DMIC_2_DP_IN1N);
915 break;
916
917 default:
918 return 0;
919 }
920
921 return 0;
922}
923
Sachin Kamat89d05132013-09-13 15:22:18 +0530924static void hp_amp_power_on(struct snd_soc_codec *codec)
Bard Liao246693b2013-08-23 10:29:26 +0800925{
926 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
927
928 /* depop parameters */
929 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
930 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
931 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
932 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
933 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
934 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
935 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
936 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
937 0x9f00);
938 /* headphone amp power on */
939 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
940 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
941 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
942 RT5640_PWR_HA,
943 RT5640_PWR_HA);
944 usleep_range(10000, 15000);
945 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
946 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
947 RT5640_PWR_FV1 | RT5640_PWR_FV2);
948}
949
950static void rt5640_pmu_depop(struct snd_soc_codec *codec)
951{
952 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
953
954 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
955 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
956 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
957 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
958 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
959
960 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
961 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
962 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
963 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
964 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
965
966 regmap_write(rt5640->regmap, RT5640_PR_BASE +
967 RT5640_MAMP_INT_REG2, 0x1c00);
968 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
969 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
970 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
971 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
972 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
973}
974
975static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
976 struct snd_kcontrol *kcontrol, int event)
977{
978 struct snd_soc_codec *codec = w->codec;
979 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
980
981 switch (event) {
982 case SND_SOC_DAPM_POST_PMU:
983 rt5640_pmu_depop(codec);
984 rt5640->hp_mute = 0;
985 break;
986
987 case SND_SOC_DAPM_PRE_PMD:
988 rt5640->hp_mute = 1;
989 usleep_range(70000, 75000);
990 break;
991
992 default:
993 return 0;
994 }
995
996 return 0;
997}
998
999static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1000 struct snd_kcontrol *kcontrol, int event)
1001{
1002 struct snd_soc_codec *codec = w->codec;
1003
1004 switch (event) {
1005 case SND_SOC_DAPM_POST_PMU:
1006 hp_amp_power_on(codec);
1007 break;
1008 default:
1009 return 0;
1010 }
1011
1012 return 0;
1013}
1014
1015static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1016 struct snd_kcontrol *kcontrol, int event)
1017{
1018 struct snd_soc_codec *codec = w->codec;
1019 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1020
1021 switch (event) {
1022 case SND_SOC_DAPM_POST_PMU:
1023 if (!rt5640->hp_mute)
1024 usleep_range(80000, 85000);
1025
1026 break;
1027
1028 default:
1029 return 0;
1030 }
1031
1032 return 0;
1033}
1034
Bard Liao997b0522013-06-11 13:10:16 +08001035static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1036 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1037 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1038 /* Input Side */
1039 /* micbias */
1040 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1041 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1042 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
Stephen Warren9be94ae2013-06-12 15:34:23 -06001043 RT5640_PWR_MB1_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001044 /* Input Lines */
1045 SND_SOC_DAPM_INPUT("DMIC1"),
1046 SND_SOC_DAPM_INPUT("DMIC2"),
1047 SND_SOC_DAPM_INPUT("IN1P"),
1048 SND_SOC_DAPM_INPUT("IN1N"),
1049 SND_SOC_DAPM_INPUT("IN2P"),
1050 SND_SOC_DAPM_INPUT("IN2N"),
1051 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1052 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1053 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1054 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1055
1056 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1057 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1058 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
1059 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
1060 SND_SOC_DAPM_PRE_PMU),
1061 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
1062 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
1063 SND_SOC_DAPM_PRE_PMU),
1064 /* Boost */
1065 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1066 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1067 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1068 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1069 /* Input Volume */
1070 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1071 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1072 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1073 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001074 /* REC Mixer */
1075 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1076 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1077 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1078 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1079 /* ADCs */
1080 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1081 RT5640_PWR_ADC_L_BIT, 0),
1082 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1083 RT5640_PWR_ADC_R_BIT, 0),
1084 /* ADC Mux */
1085 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1086 &rt5640_sto_adc_2_mux),
1087 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1088 &rt5640_sto_adc_2_mux),
1089 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1090 &rt5640_sto_adc_1_mux),
1091 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1092 &rt5640_sto_adc_1_mux),
1093 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1094 &rt5640_mono_adc_l2_mux),
1095 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1096 &rt5640_mono_adc_l1_mux),
1097 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1098 &rt5640_mono_adc_r1_mux),
1099 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1100 &rt5640_mono_adc_r2_mux),
1101 /* ADC Mixer */
1102 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1103 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1104 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1105 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1106 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1107 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1108 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1109 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1110 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1111 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1112 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1113 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1114 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1115 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1116
1117 /* Digital Interface */
1118 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1119 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1120 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1121 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1122 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1123 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1124 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1125 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1126 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1127 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1128 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1129 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1130 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1131 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1132 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1133 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1134 /* Digital Interface Select */
1135 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1136 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1137 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1138 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1139 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1140 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1141 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1142 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1143 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1144 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1145 /* Audio Interface */
1146 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1147 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1148 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1149 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1150 /* Audio DSP */
1151 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1152 /* ANC */
1153 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1154 /* Output Side */
1155 /* DAC mixer before sound effect */
1156 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1157 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1158 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1159 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1160 /* DAC2 channel Mux */
1161 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1162 &rt5640_dac_l2_mux),
1163 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1164 &rt5640_dac_r2_mux),
1165 /* DAC Mixer */
1166 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1167 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1168 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1169 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1170 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1171 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1172 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1173 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1174 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1175 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1176 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1177 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1178 /* DACs */
1179 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1180 RT5640_PWR_DAC_L1_BIT, 0),
1181 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1182 RT5640_PWR_DAC_L2_BIT, 0),
1183 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1184 RT5640_PWR_DAC_R1_BIT, 0),
1185 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1186 RT5640_PWR_DAC_R2_BIT, 0),
1187 /* SPK/OUT Mixer */
1188 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1189 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1190 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1191 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1192 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1193 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1194 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1195 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1196 /* Ouput Volume */
1197 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1198 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1199 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1200 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1201 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1202 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1203 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1204 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1205 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1206 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1207 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1208 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1209 /* SPO/HPO/LOUT/Mono Mixer */
1210 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1211 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1212 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1213 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1214 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1215 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1216 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1217 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1218 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1219 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1220 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1221 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1222 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1223 RT5640_PWR_MA_BIT, 0, NULL, 0),
Bard Liao246693b2013-08-23 10:29:26 +08001224 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1225 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1226 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1227 rt5640_hp_event,
1228 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1229 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001230 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
Bard Liao246693b2013-08-23 10:29:26 +08001231 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001232 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1233 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
Bard Liao246693b2013-08-23 10:29:26 +08001234 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1235
1236 /* Output Switch */
1237 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1238 &spk_l_enable_control),
1239 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1240 &spk_r_enable_control),
1241 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1242 &hp_l_enable_control),
1243 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1244 &hp_r_enable_control),
1245 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
Bard Liao997b0522013-06-11 13:10:16 +08001246 /* Output Lines */
1247 SND_SOC_DAPM_OUTPUT("SPOLP"),
1248 SND_SOC_DAPM_OUTPUT("SPOLN"),
1249 SND_SOC_DAPM_OUTPUT("SPORP"),
1250 SND_SOC_DAPM_OUTPUT("SPORN"),
1251 SND_SOC_DAPM_OUTPUT("HPOL"),
1252 SND_SOC_DAPM_OUTPUT("HPOR"),
1253 SND_SOC_DAPM_OUTPUT("LOUTL"),
1254 SND_SOC_DAPM_OUTPUT("LOUTR"),
1255 SND_SOC_DAPM_OUTPUT("MONOP"),
1256 SND_SOC_DAPM_OUTPUT("MONON"),
1257};
1258
1259static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1260 {"IN1P", NULL, "LDO2"},
1261 {"IN2P", NULL, "LDO2"},
1262
1263 {"DMIC L1", NULL, "DMIC1"},
1264 {"DMIC R1", NULL, "DMIC1"},
1265 {"DMIC L2", NULL, "DMIC2"},
1266 {"DMIC R2", NULL, "DMIC2"},
1267
1268 {"BST1", NULL, "IN1P"},
1269 {"BST1", NULL, "IN1N"},
1270 {"BST2", NULL, "IN2P"},
1271 {"BST2", NULL, "IN2N"},
1272
1273 {"INL VOL", NULL, "IN2P"},
1274 {"INR VOL", NULL, "IN2N"},
1275
1276 {"RECMIXL", "HPOL Switch", "HPOL"},
1277 {"RECMIXL", "INL Switch", "INL VOL"},
1278 {"RECMIXL", "BST2 Switch", "BST2"},
1279 {"RECMIXL", "BST1 Switch", "BST1"},
1280 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1281
1282 {"RECMIXR", "HPOR Switch", "HPOR"},
1283 {"RECMIXR", "INR Switch", "INR VOL"},
1284 {"RECMIXR", "BST2 Switch", "BST2"},
1285 {"RECMIXR", "BST1 Switch", "BST1"},
1286 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1287
1288 {"ADC L", NULL, "RECMIXL"},
1289 {"ADC R", NULL, "RECMIXR"},
1290
1291 {"DMIC L1", NULL, "DMIC CLK"},
1292 {"DMIC L1", NULL, "DMIC1 Power"},
1293 {"DMIC R1", NULL, "DMIC CLK"},
1294 {"DMIC R1", NULL, "DMIC1 Power"},
1295 {"DMIC L2", NULL, "DMIC CLK"},
1296 {"DMIC L2", NULL, "DMIC2 Power"},
1297 {"DMIC R2", NULL, "DMIC CLK"},
1298 {"DMIC R2", NULL, "DMIC2 Power"},
1299
1300 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1301 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1302 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1303 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1304 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1305
1306 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1307 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1308 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1309 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1310 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1311
1312 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1313 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1314 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1315 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1316 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1317
1318 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1319 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1320 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1321 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1322 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1323
1324 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1325 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1326 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1327 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1328
1329 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1330 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1331 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1332 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1333
1334 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1335 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1336 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1337 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1338
1339 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1340 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1341 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1342 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1343
1344 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1345 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1346 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1347 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1348
1349 {"IF1 ADC", NULL, "I2S1"},
1350 {"IF1 ADC", NULL, "IF1 ADC L"},
1351 {"IF1 ADC", NULL, "IF1 ADC R"},
1352 {"IF2 ADC", NULL, "I2S2"},
1353 {"IF2 ADC", NULL, "IF2 ADC L"},
1354 {"IF2 ADC", NULL, "IF2 ADC R"},
1355
1356 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1357 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1358 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1359 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1360 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1361 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1362
1363 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1364 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1365 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1366 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1367 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1368 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1369
1370 {"AIF1TX", NULL, "DAI1 TX Mux"},
1371 {"AIF1TX", NULL, "SDI1 TX Mux"},
1372 {"AIF2TX", NULL, "DAI2 TX Mux"},
1373 {"AIF2TX", NULL, "SDI2 TX Mux"},
1374
1375 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1376 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1377 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1378 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1379
1380 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1381 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1382 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1383 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1384
1385 {"IF1 DAC", NULL, "I2S1"},
1386 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1387 {"IF2 DAC", NULL, "I2S2"},
1388 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1389
1390 {"IF1 DAC L", NULL, "IF1 DAC"},
1391 {"IF1 DAC R", NULL, "IF1 DAC"},
1392 {"IF2 DAC L", NULL, "IF2 DAC"},
1393 {"IF2 DAC R", NULL, "IF2 DAC"},
1394
1395 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1396 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1397 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1398 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1399
1400 {"ANC", NULL, "Stereo ADC MIXL"},
1401 {"ANC", NULL, "Stereo ADC MIXR"},
1402
1403 {"Audio DSP", NULL, "DAC MIXL"},
1404 {"Audio DSP", NULL, "DAC MIXR"},
1405
1406 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1407 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1408
1409 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1410
1411 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1412 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1413 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1414 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1415 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1416 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1417
1418 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1419 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1420 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1421 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1422 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1423 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1424
1425 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1426 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1427 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1428 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1429
1430 {"DAC L1", NULL, "Stereo DAC MIXL"},
1431 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1432 {"DAC R1", NULL, "Stereo DAC MIXR"},
1433 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1434 {"DAC L2", NULL, "Mono DAC MIXL"},
1435 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1436 {"DAC R2", NULL, "Mono DAC MIXR"},
1437 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1438
1439 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1440 {"SPK MIXL", "INL Switch", "INL VOL"},
1441 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1442 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1443 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1444 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1445 {"SPK MIXR", "INR Switch", "INR VOL"},
1446 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1447 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1448 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1449
1450 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1451 {"OUT MIXL", "BST1 Switch", "BST1"},
1452 {"OUT MIXL", "INL Switch", "INL VOL"},
1453 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1454 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1455 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1456 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1457
1458 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1459 {"OUT MIXR", "BST2 Switch", "BST2"},
1460 {"OUT MIXR", "BST1 Switch", "BST1"},
1461 {"OUT MIXR", "INR Switch", "INR VOL"},
1462 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1463 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1464 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1465 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1466
1467 {"SPKVOL L", NULL, "SPK MIXL"},
1468 {"SPKVOL R", NULL, "SPK MIXR"},
1469 {"HPOVOL L", NULL, "OUT MIXL"},
1470 {"HPOVOL R", NULL, "OUT MIXR"},
1471 {"OUTVOL L", NULL, "OUT MIXL"},
1472 {"OUTVOL R", NULL, "OUT MIXR"},
1473
1474 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1475 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1476 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1477 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1478 {"SPOL MIX", "BST1 Switch", "BST1"},
1479 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1480 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1481 {"SPOR MIX", "BST1 Switch", "BST1"},
1482
1483 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1484 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1485 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
Bard Liao246693b2013-08-23 10:29:26 +08001486 {"HPO MIX L", NULL, "HP L Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001487 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1488 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1489 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
Bard Liao246693b2013-08-23 10:29:26 +08001490 {"HPO MIX R", NULL, "HP R Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001491
1492 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1493 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1494 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1495 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1496
1497 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1498 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1499 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1500 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1501 {"Mono MIX", "BST1 Switch", "BST1"},
1502
Bard Liao246693b2013-08-23 10:29:26 +08001503 {"HP Amp", NULL, "HPO MIX L"},
1504 {"HP Amp", NULL, "HPO MIX R"},
Bard Liao997b0522013-06-11 13:10:16 +08001505
Bard Liao246693b2013-08-23 10:29:26 +08001506 {"Speaker L Playback", "Switch", "SPOL MIX"},
1507 {"Speaker R Playback", "Switch", "SPOR MIX"},
1508 {"SPOLP", NULL, "Speaker L Playback"},
1509 {"SPOLN", NULL, "Speaker L Playback"},
1510 {"SPORP", NULL, "Speaker R Playback"},
1511 {"SPORN", NULL, "Speaker R Playback"},
Bard Liao997b0522013-06-11 13:10:16 +08001512
1513 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1514 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1515 {"SPORP", NULL, "Improve SPK Amp Drv"},
1516 {"SPORN", NULL, "Improve SPK Amp Drv"},
1517
1518 {"HPOL", NULL, "Improve HP Amp Drv"},
1519 {"HPOR", NULL, "Improve HP Amp Drv"},
1520
Bard Liao246693b2013-08-23 10:29:26 +08001521 {"HP L Playback", "Switch", "HP Amp"},
1522 {"HP R Playback", "Switch", "HP Amp"},
1523 {"HPOL", NULL, "HP L Playback"},
1524 {"HPOR", NULL, "HP R Playback"},
Bard Liao997b0522013-06-11 13:10:16 +08001525 {"LOUTL", NULL, "LOUT MIX"},
1526 {"LOUTR", NULL, "LOUT MIX"},
1527 {"MONOP", NULL, "Mono MIX"},
1528 {"MONON", NULL, "Mono MIX"},
1529 {"MONOP", NULL, "Improve MONO Amp Drv"},
1530};
1531
1532static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1533{
1534 int ret = 0, val;
1535
1536 if (codec == NULL)
1537 return -EINVAL;
1538
1539 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1540 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1541 switch (dai_id) {
1542 case RT5640_AIF1:
1543 switch (val) {
1544 case RT5640_IF_123:
1545 case RT5640_IF_132:
1546 ret |= RT5640_U_IF1;
1547 break;
1548 case RT5640_IF_113:
1549 ret |= RT5640_U_IF1;
1550 case RT5640_IF_312:
1551 case RT5640_IF_213:
1552 ret |= RT5640_U_IF2;
1553 break;
1554 }
1555 break;
1556
1557 case RT5640_AIF2:
1558 switch (val) {
1559 case RT5640_IF_231:
1560 case RT5640_IF_213:
1561 ret |= RT5640_U_IF1;
1562 break;
1563 case RT5640_IF_223:
1564 ret |= RT5640_U_IF1;
1565 case RT5640_IF_123:
1566 case RT5640_IF_321:
1567 ret |= RT5640_U_IF2;
1568 break;
1569 }
1570 break;
1571
1572 default:
1573 ret = -EINVAL;
1574 break;
1575 }
1576
1577 return ret;
1578}
1579
1580static int get_clk_info(int sclk, int rate)
1581{
1582 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1583
1584 if (sclk <= 0 || rate <= 0)
1585 return -EINVAL;
1586
1587 rate = rate << 8;
1588 for (i = 0; i < ARRAY_SIZE(pd); i++)
1589 if (sclk == rate * pd[i])
1590 return i;
1591
1592 return -EINVAL;
1593}
1594
1595static int rt5640_hw_params(struct snd_pcm_substream *substream,
1596 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1597{
Lars-Peter Clausenab642462014-03-13 21:24:54 +01001598 struct snd_soc_codec *codec = dai->codec;
Bard Liao997b0522013-06-11 13:10:16 +08001599 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001600 unsigned int val_len = 0, val_clk, mask_clk;
1601 int dai_sel, pre_div, bclk_ms, frame_size;
Bard Liao997b0522013-06-11 13:10:16 +08001602
1603 rt5640->lrck[dai->id] = params_rate(params);
1604 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1605 if (pre_div < 0) {
Liam Girdwood9e9cb9b2013-09-13 17:57:35 +01001606 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1607 rt5640->lrck[dai->id], dai->id);
Bard Liao997b0522013-06-11 13:10:16 +08001608 return -EINVAL;
1609 }
1610 frame_size = snd_soc_params_to_frame_size(params);
1611 if (frame_size < 0) {
1612 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1613 return frame_size;
1614 }
1615 if (frame_size > 32)
1616 bclk_ms = 1;
1617 else
1618 bclk_ms = 0;
1619 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1620
1621 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1622 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1623 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1624 bclk_ms, pre_div, dai->id);
1625
1626 switch (params_format(params)) {
1627 case SNDRV_PCM_FORMAT_S16_LE:
1628 break;
1629 case SNDRV_PCM_FORMAT_S20_3LE:
1630 val_len |= RT5640_I2S_DL_20;
1631 break;
1632 case SNDRV_PCM_FORMAT_S24_LE:
1633 val_len |= RT5640_I2S_DL_24;
1634 break;
1635 case SNDRV_PCM_FORMAT_S8:
1636 val_len |= RT5640_I2S_DL_8;
1637 break;
1638 default:
1639 return -EINVAL;
1640 }
1641
1642 dai_sel = get_sdp_info(codec, dai->id);
1643 if (dai_sel < 0) {
1644 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1645 return -EINVAL;
1646 }
1647 if (dai_sel & RT5640_U_IF1) {
1648 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1649 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1650 pre_div << RT5640_I2S_PD1_SFT;
1651 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1652 RT5640_I2S_DL_MASK, val_len);
1653 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1654 }
1655 if (dai_sel & RT5640_U_IF2) {
1656 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1657 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1658 pre_div << RT5640_I2S_PD2_SFT;
1659 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1660 RT5640_I2S_DL_MASK, val_len);
1661 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1662 }
1663
1664 return 0;
1665}
1666
1667static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1668{
1669 struct snd_soc_codec *codec = dai->codec;
1670 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001671 unsigned int reg_val = 0;
1672 int dai_sel;
Bard Liao997b0522013-06-11 13:10:16 +08001673
1674 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1675 case SND_SOC_DAIFMT_CBM_CFM:
1676 rt5640->master[dai->id] = 1;
1677 break;
1678 case SND_SOC_DAIFMT_CBS_CFS:
1679 reg_val |= RT5640_I2S_MS_S;
1680 rt5640->master[dai->id] = 0;
1681 break;
1682 default:
1683 return -EINVAL;
1684 }
1685
1686 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1687 case SND_SOC_DAIFMT_NB_NF:
1688 break;
1689 case SND_SOC_DAIFMT_IB_NF:
1690 reg_val |= RT5640_I2S_BP_INV;
1691 break;
1692 default:
1693 return -EINVAL;
1694 }
1695
1696 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1697 case SND_SOC_DAIFMT_I2S:
1698 break;
1699 case SND_SOC_DAIFMT_LEFT_J:
1700 reg_val |= RT5640_I2S_DF_LEFT;
1701 break;
1702 case SND_SOC_DAIFMT_DSP_A:
1703 reg_val |= RT5640_I2S_DF_PCM_A;
1704 break;
1705 case SND_SOC_DAIFMT_DSP_B:
1706 reg_val |= RT5640_I2S_DF_PCM_B;
1707 break;
1708 default:
1709 return -EINVAL;
1710 }
1711
1712 dai_sel = get_sdp_info(codec, dai->id);
1713 if (dai_sel < 0) {
1714 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1715 return -EINVAL;
1716 }
1717 if (dai_sel & RT5640_U_IF1) {
1718 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1719 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1720 RT5640_I2S_DF_MASK, reg_val);
1721 }
1722 if (dai_sel & RT5640_U_IF2) {
1723 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1724 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1725 RT5640_I2S_DF_MASK, reg_val);
1726 }
1727
1728 return 0;
1729}
1730
1731static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1732 int clk_id, unsigned int freq, int dir)
1733{
1734 struct snd_soc_codec *codec = dai->codec;
1735 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1736 unsigned int reg_val = 0;
1737
1738 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1739 return 0;
1740
1741 switch (clk_id) {
1742 case RT5640_SCLK_S_MCLK:
1743 reg_val |= RT5640_SCLK_SRC_MCLK;
1744 break;
1745 case RT5640_SCLK_S_PLL1:
1746 reg_val |= RT5640_SCLK_SRC_PLL1;
1747 break;
1748 case RT5640_SCLK_S_PLL1_TK:
1749 reg_val |= RT5640_SCLK_SRC_PLL1T;
1750 break;
1751 case RT5640_SCLK_S_RCCLK:
1752 reg_val |= RT5640_SCLK_SRC_RCCLK;
1753 break;
1754 default:
1755 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1756 return -EINVAL;
1757 }
1758 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1759 RT5640_SCLK_SRC_MASK, reg_val);
1760 rt5640->sysclk = freq;
1761 rt5640->sysclk_src = clk_id;
1762
1763 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1764 return 0;
1765}
1766
1767/**
1768 * rt5640_pll_calc - Calculate PLL M/N/K code.
1769 * @freq_in: external clock provided to codec.
1770 * @freq_out: target clock which codec works on.
1771 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1772 *
1773 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1774 * which make calculation more efficiently.
1775 *
1776 * Returns 0 for success or negative error code.
1777 */
1778static int rt5640_pll_calc(const unsigned int freq_in,
1779 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1780{
1781 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1782 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1783 int red_t = abs(freq_out - freq_in);
1784 bool bypass = false;
1785
1786 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1787 return -EINVAL;
1788
1789 for (n_t = 0; n_t <= max_n; n_t++) {
1790 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1791 if (in_t < 0)
1792 continue;
1793 if (in_t == freq_out) {
1794 bypass = true;
1795 n = n_t;
1796 goto code_find;
1797 }
1798 for (m_t = 0; m_t <= max_m; m_t++) {
1799 out_t = in_t / (m_t + 2);
1800 red = abs(out_t - freq_out);
1801 if (red < red_t) {
1802 n = n_t;
1803 m = m_t;
1804 if (red == 0)
1805 goto code_find;
1806 red_t = red;
1807 }
1808 }
1809 }
1810 pr_debug("Only get approximation about PLL\n");
1811
1812code_find:
1813 pll_code->m_bp = bypass;
1814 pll_code->m_code = m;
1815 pll_code->n_code = n;
1816 pll_code->k_code = 2;
1817 return 0;
1818}
1819
1820static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1821 unsigned int freq_in, unsigned int freq_out)
1822{
1823 struct snd_soc_codec *codec = dai->codec;
1824 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1825 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1826 int ret, dai_sel;
1827
1828 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1829 freq_out == rt5640->pll_out)
1830 return 0;
1831
1832 if (!freq_in || !freq_out) {
1833 dev_dbg(codec->dev, "PLL disabled\n");
1834
1835 rt5640->pll_in = 0;
1836 rt5640->pll_out = 0;
1837 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1838 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1839 return 0;
1840 }
1841
1842 switch (source) {
1843 case RT5640_PLL1_S_MCLK:
1844 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1845 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1846 break;
1847 case RT5640_PLL1_S_BCLK1:
1848 case RT5640_PLL1_S_BCLK2:
1849 dai_sel = get_sdp_info(codec, dai->id);
1850 if (dai_sel < 0) {
1851 dev_err(codec->dev,
1852 "Failed to get sdp info: %d\n", dai_sel);
1853 return -EINVAL;
1854 }
1855 if (dai_sel & RT5640_U_IF1) {
1856 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1857 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1858 }
1859 if (dai_sel & RT5640_U_IF2) {
1860 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1861 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1862 }
1863 break;
1864 default:
1865 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1866 return -EINVAL;
1867 }
1868
1869 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1870 if (ret < 0) {
1871 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1872 return ret;
1873 }
1874
1875 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1876 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1877
1878 snd_soc_write(codec, RT5640_PLL_CTRL1,
1879 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1880 snd_soc_write(codec, RT5640_PLL_CTRL2,
1881 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1882 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1883
1884 rt5640->pll_in = freq_in;
1885 rt5640->pll_out = freq_out;
1886 rt5640->pll_src = source;
1887
1888 return 0;
1889}
1890
1891static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1892 enum snd_soc_bias_level level)
1893{
1894 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1895 switch (level) {
1896 case SND_SOC_BIAS_STANDBY:
1897 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1898 regcache_cache_only(rt5640->regmap, false);
1899 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1900 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1901 RT5640_PWR_BG | RT5640_PWR_VREF2,
1902 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1903 RT5640_PWR_BG | RT5640_PWR_VREF2);
Bard Liao246693b2013-08-23 10:29:26 +08001904 usleep_range(10000, 15000);
Bard Liao997b0522013-06-11 13:10:16 +08001905 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1906 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1907 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1908 regcache_sync(rt5640->regmap);
1909 snd_soc_update_bits(codec, RT5640_DUMMY1,
1910 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08001911 snd_soc_update_bits(codec, RT5640_MICBIAS,
1912 0x0030, 0x0030);
1913 }
1914 break;
1915
1916 case SND_SOC_BIAS_OFF:
1917 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1918 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1919 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1920 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1921 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1922 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1923 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1924 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1925 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1926 break;
1927
1928 default:
1929 break;
1930 }
1931 codec->dapm.bias_level = level;
1932
1933 return 0;
1934}
1935
1936static int rt5640_probe(struct snd_soc_codec *codec)
1937{
1938 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Bard Liao997b0522013-06-11 13:10:16 +08001939
1940 rt5640->codec = codec;
Bard Liao997b0522013-06-11 13:10:16 +08001941
1942 codec->dapm.idle_bias_off = 1;
1943 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1944
1945 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08001946 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1947 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1948
1949 return 0;
1950}
1951
1952static int rt5640_remove(struct snd_soc_codec *codec)
1953{
1954 rt5640_reset(codec);
1955
1956 return 0;
1957}
1958
1959#ifdef CONFIG_PM
1960static int rt5640_suspend(struct snd_soc_codec *codec)
1961{
1962 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1963
1964 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1965 rt5640_reset(codec);
1966 regcache_cache_only(rt5640->regmap, true);
1967 regcache_mark_dirty(rt5640->regmap);
Mark Browne58f3012013-10-16 17:26:22 +01001968 if (gpio_is_valid(rt5640->pdata.ldo1_en))
1969 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
Bard Liao997b0522013-06-11 13:10:16 +08001970
1971 return 0;
1972}
1973
1974static int rt5640_resume(struct snd_soc_codec *codec)
1975{
Mark Browne58f3012013-10-16 17:26:22 +01001976 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1977
1978 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
1979 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
1980 msleep(400);
1981 }
Bard Liao997b0522013-06-11 13:10:16 +08001982
1983 return 0;
1984}
1985#else
1986#define rt5640_suspend NULL
1987#define rt5640_resume NULL
1988#endif
1989
1990#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1991#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1992 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1993
Stephen Warren9be94ae2013-06-12 15:34:23 -06001994static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
Bard Liao997b0522013-06-11 13:10:16 +08001995 .hw_params = rt5640_hw_params,
1996 .set_fmt = rt5640_set_dai_fmt,
1997 .set_sysclk = rt5640_set_dai_sysclk,
1998 .set_pll = rt5640_set_dai_pll,
1999};
2000
Stephen Warren9be94ae2013-06-12 15:34:23 -06002001static struct snd_soc_dai_driver rt5640_dai[] = {
Bard Liao997b0522013-06-11 13:10:16 +08002002 {
2003 .name = "rt5640-aif1",
2004 .id = RT5640_AIF1,
2005 .playback = {
2006 .stream_name = "AIF1 Playback",
2007 .channels_min = 1,
2008 .channels_max = 2,
2009 .rates = RT5640_STEREO_RATES,
2010 .formats = RT5640_FORMATS,
2011 },
2012 .capture = {
2013 .stream_name = "AIF1 Capture",
2014 .channels_min = 1,
2015 .channels_max = 2,
2016 .rates = RT5640_STEREO_RATES,
2017 .formats = RT5640_FORMATS,
2018 },
2019 .ops = &rt5640_aif_dai_ops,
2020 },
2021 {
2022 .name = "rt5640-aif2",
2023 .id = RT5640_AIF2,
2024 .playback = {
2025 .stream_name = "AIF2 Playback",
2026 .channels_min = 1,
2027 .channels_max = 2,
2028 .rates = RT5640_STEREO_RATES,
2029 .formats = RT5640_FORMATS,
2030 },
2031 .capture = {
2032 .stream_name = "AIF2 Capture",
2033 .channels_min = 1,
2034 .channels_max = 2,
2035 .rates = RT5640_STEREO_RATES,
2036 .formats = RT5640_FORMATS,
2037 },
2038 .ops = &rt5640_aif_dai_ops,
2039 },
2040};
2041
2042static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2043 .probe = rt5640_probe,
2044 .remove = rt5640_remove,
2045 .suspend = rt5640_suspend,
2046 .resume = rt5640_resume,
2047 .set_bias_level = rt5640_set_bias_level,
2048 .controls = rt5640_snd_controls,
2049 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2050 .dapm_widgets = rt5640_dapm_widgets,
2051 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2052 .dapm_routes = rt5640_dapm_routes,
2053 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2054};
2055
2056static const struct regmap_config rt5640_regmap = {
2057 .reg_bits = 8,
2058 .val_bits = 16,
2059
2060 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2061 RT5640_PR_SPACING),
2062 .volatile_reg = rt5640_volatile_register,
2063 .readable_reg = rt5640_readable_register,
2064
2065 .cache_type = REGCACHE_RBTREE,
2066 .reg_defaults = rt5640_reg,
2067 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2068 .ranges = rt5640_ranges,
2069 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2070};
2071
2072static const struct i2c_device_id rt5640_i2c_id[] = {
2073 { "rt5640", 0 },
2074 { }
2075};
2076MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2077
Stephen Warren03a620d2014-03-31 11:05:17 -06002078#if defined(CONFIG_OF)
2079static const struct of_device_id rt5640_of_match[] = {
2080 { .compatible = "realtek,rt5640", },
2081 {},
2082};
2083MODULE_DEVICE_TABLE(of, rt5640_of_match);
2084#endif
2085
Thierry Reding32fcb972013-09-19 11:18:06 +02002086#ifdef CONFIG_ACPI
Liam Girdwood02b80772013-09-13 17:57:36 +01002087static struct acpi_device_id rt5640_acpi_match[] = {
2088 { "INT33CA", 0 },
Jarkko Nikulab31b2b62014-02-07 09:35:16 +02002089 { "10EC5640", 0 },
Liam Girdwood02b80772013-09-13 17:57:36 +01002090 { },
2091};
2092MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
Thierry Reding32fcb972013-09-19 11:18:06 +02002093#endif
Liam Girdwood02b80772013-09-13 17:57:36 +01002094
Stephen Warrendcad9f02013-06-12 11:34:30 -06002095static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2096{
2097 rt5640->pdata.in1_diff = of_property_read_bool(np,
2098 "realtek,in1-differential");
2099 rt5640->pdata.in2_diff = of_property_read_bool(np,
2100 "realtek,in2-differential");
2101
2102 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2103 "realtek,ldo1-en-gpios", 0);
2104 /*
2105 * LDO1_EN is optional (it may be statically tied on the board).
2106 * -ENOENT means that the property doesn't exist, i.e. there is no
2107 * GPIO, so is not an error. Any other error code means the property
2108 * exists, but could not be parsed.
2109 */
2110 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2111 (rt5640->pdata.ldo1_en != -ENOENT))
2112 return rt5640->pdata.ldo1_en;
2113
2114 return 0;
2115}
2116
Bard Liao997b0522013-06-11 13:10:16 +08002117static int rt5640_i2c_probe(struct i2c_client *i2c,
2118 const struct i2c_device_id *id)
2119{
2120 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2121 struct rt5640_priv *rt5640;
2122 int ret;
2123 unsigned int val;
2124
2125 rt5640 = devm_kzalloc(&i2c->dev,
2126 sizeof(struct rt5640_priv),
2127 GFP_KERNEL);
2128 if (NULL == rt5640)
2129 return -ENOMEM;
Stephen Warrendcad9f02013-06-12 11:34:30 -06002130 i2c_set_clientdata(i2c, rt5640);
2131
2132 if (pdata) {
2133 rt5640->pdata = *pdata;
2134 /*
2135 * Translate zero'd out (default) pdata value to an invalid
2136 * GPIO ID. This makes the pdata and DT paths consistent in
2137 * terms of the value left in this field when no GPIO is
2138 * specified, but means we can't actually use GPIO 0.
2139 */
2140 if (!rt5640->pdata.ldo1_en)
2141 rt5640->pdata.ldo1_en = -EINVAL;
2142 } else if (i2c->dev.of_node) {
2143 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2144 if (ret)
2145 return ret;
2146 } else
2147 rt5640->pdata.ldo1_en = -EINVAL;
Bard Liao997b0522013-06-11 13:10:16 +08002148
2149 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2150 if (IS_ERR(rt5640->regmap)) {
2151 ret = PTR_ERR(rt5640->regmap);
2152 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2153 ret);
2154 return ret;
2155 }
2156
Stephen Warrendcad9f02013-06-12 11:34:30 -06002157 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
Bard Liao997b0522013-06-11 13:10:16 +08002158 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2159 GPIOF_OUT_INIT_HIGH,
2160 "RT5640 LDO1_EN");
2161 if (ret < 0) {
2162 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2163 rt5640->pdata.ldo1_en, ret);
2164 return ret;
2165 }
2166 msleep(400);
2167 }
2168
2169 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2170 if ((val != RT5640_DEVICE_ID)) {
2171 dev_err(&i2c->dev,
2172 "Device with ID register %x is not rt5640/39\n", val);
2173 return -ENODEV;
2174 }
2175
2176 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2177
2178 ret = regmap_register_patch(rt5640->regmap, init_list,
2179 ARRAY_SIZE(init_list));
2180 if (ret != 0)
2181 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2182
2183 if (rt5640->pdata.in1_diff)
2184 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2185 RT5640_IN_DF1, RT5640_IN_DF1);
2186
2187 if (rt5640->pdata.in2_diff)
2188 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2189 RT5640_IN_DF2, RT5640_IN_DF2);
2190
Bard Liao246693b2013-08-23 10:29:26 +08002191 rt5640->hp_mute = 1;
2192
Bard Liao997b0522013-06-11 13:10:16 +08002193 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2194 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2195 if (ret < 0)
2196 goto err;
2197
2198 return 0;
2199err:
2200 return ret;
2201}
2202
2203static int rt5640_i2c_remove(struct i2c_client *i2c)
2204{
2205 snd_soc_unregister_codec(&i2c->dev);
2206
2207 return 0;
2208}
2209
Stephen Warren9be94ae2013-06-12 15:34:23 -06002210static struct i2c_driver rt5640_i2c_driver = {
Bard Liao997b0522013-06-11 13:10:16 +08002211 .driver = {
2212 .name = "rt5640",
2213 .owner = THIS_MODULE,
Liam Girdwood02b80772013-09-13 17:57:36 +01002214 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
Stephen Warren03a620d2014-03-31 11:05:17 -06002215 .of_match_table = of_match_ptr(rt5640_of_match),
Bard Liao997b0522013-06-11 13:10:16 +08002216 },
2217 .probe = rt5640_i2c_probe,
2218 .remove = rt5640_i2c_remove,
2219 .id_table = rt5640_i2c_id,
2220};
2221module_i2c_driver(rt5640_i2c_driver);
2222
2223MODULE_DESCRIPTION("ASoC RT5640 driver");
2224MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2225MODULE_LICENSE("GPL v2");