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gerrit-public.fairphone.software / kernel / msm-5.4 / b1a3bfc97cd95681c511515534b84843998f3ea0 / . / drivers / net / wireless / rtlwifi / rtl8192ee / rf.c
blob: c9bc33cd109002b151a6bab65aea74959a10e924 [file] [log] [blame]
Larry Fingerb1a3bfc2014-09-26 16:40:23 -0500[diff] [blame^]1/******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#include "../wifi.h"
27#include "reg.h"
28#include "def.h"
29#include "phy.h"
30#include "rf.h"
31#include "dm.h"
32
33static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
34
35void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
36{
37 struct rtl_priv *rtlpriv = rtl_priv(hw);
38 struct rtl_phy *rtlphy = &rtlpriv->phy;
39
40 switch (bandwidth) {
41 case HT_CHANNEL_WIDTH_20:
42 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
43 0xfffff3ff) | BIT(10) | BIT(11));
44 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
45 rtlphy->rfreg_chnlval[0]);
46 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
47 rtlphy->rfreg_chnlval[0]);
48 break;
49 case HT_CHANNEL_WIDTH_20_40:
50 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
51 0xfffff3ff) | BIT(10));
52 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
53 rtlphy->rfreg_chnlval[0]);
54 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
55 rtlphy->rfreg_chnlval[0]);
56 break;
57 default:
58 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
59 "unknown bandwidth: %#X\n", bandwidth);
60 break;
61 }
62}
63
64bool rtl92ee_phy_rf6052_config(struct ieee80211_hw *hw)
65{
66 struct rtl_priv *rtlpriv = rtl_priv(hw);
67 struct rtl_phy *rtlphy = &rtlpriv->phy;
68
69 if (rtlphy->rf_type == RF_1T1R)
70 rtlphy->num_total_rfpath = 1;
71 else
72 rtlphy->num_total_rfpath = 2;
73
74 return _rtl92ee_phy_rf6052_config_parafile(hw);
75}
76
77static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
78{
79 struct rtl_priv *rtlpriv = rtl_priv(hw);
80 struct rtl_phy *rtlphy = &rtlpriv->phy;
81 u32 u4_regvalue = 0;
82 u8 rfpath;
83 bool rtstatus = true;
84 struct bb_reg_def *pphyreg;
85
86 for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
87 pphyreg = &rtlphy->phyreg_def[rfpath];
88
89 switch (rfpath) {
90 case RF90_PATH_A:
91 case RF90_PATH_C:
92 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
93 BRFSI_RFENV);
94 break;
95 case RF90_PATH_B:
96 case RF90_PATH_D:
97 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
98 BRFSI_RFENV << 16);
99 break;
100 }
101
102 rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
103 udelay(1);
104
105 rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
106 udelay(1);
107
108 rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
109 B3WIREADDREAALENGTH, 0x0);
110 udelay(1);
111
112 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
113 udelay(1);
114
115 switch (rfpath) {
116 case RF90_PATH_A:
117 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
118 (enum radio_path)rfpath);
119 break;
120 case RF90_PATH_B:
121 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
122 (enum radio_path)rfpath);
123 break;
124 case RF90_PATH_C:
125 break;
126 case RF90_PATH_D:
127 break;
128 }
129
130 switch (rfpath) {
131 case RF90_PATH_A:
132 case RF90_PATH_C:
133 rtl_set_bbreg(hw, pphyreg->rfintfs,
134 BRFSI_RFENV, u4_regvalue);
135 break;
136 case RF90_PATH_B:
137 case RF90_PATH_D:
138 rtl_set_bbreg(hw, pphyreg->rfintfs,
139 BRFSI_RFENV << 16, u4_regvalue);
140 break;
141 }
142
143 if (!rtstatus) {
144 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
145 "Radio[%d] Fail!!", rfpath);
146 return false;
147 }
148 }
149
150 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "\n");
151 return rtstatus;
152}