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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002#ifndef _M68KNOMMU_CACHEFLUSH_H
3#define _M68KNOMMU_CACHEFLUSH_H
4
5/*
Greg Ungerer8ce877a2010-11-09 13:35:55 +10006 * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 */
8#include <linux/mm.h>
Greg Ungerer3d461402010-11-09 10:40:44 +10009#include <asm/mcfsim.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010
11#define flush_cache_all() __flush_cache_all()
12#define flush_cache_mm(mm) do { } while (0)
Ralf Baechleec8c0442006-12-12 17:14:57 +000013#define flush_cache_dup_mm(mm) do { } while (0)
Greg Ungerer8ce877a2010-11-09 13:35:55 +100014#define flush_cache_range(vma, start, end) do { } while (0)
Greg Ungerer962d69e2005-09-13 11:14:08 +100015#define flush_cache_page(vma, vmaddr) do { } while (0)
Greg Ungerer07ffee52010-11-10 15:22:19 +100016#define flush_dcache_range(start, len) __flush_dcache_all()
Ilya Loginov2d4dc892009-11-26 09:16:19 +010017#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#define flush_dcache_page(page) do { } while (0)
19#define flush_dcache_mmap_lock(mapping) do { } while (0)
20#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Greg Ungerer07ffee52010-11-10 15:22:19 +100021#define flush_icache_range(start, len) __flush_icache_all()
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#define flush_icache_page(vma,pg) do { } while (0)
23#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
Greg Ungerer962d69e2005-09-13 11:14:08 +100024#define flush_cache_vmap(start, end) do { } while (0)
25#define flush_cache_vunmap(start, end) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
28 memcpy(dst, src, len)
29#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
30 memcpy(dst, src, len)
31
Greg Ungererd475e3e42010-11-09 14:27:50 +100032void mcf_cache_push(void);
33
Greg Ungerer1744bd92012-05-02 17:02:21 +100034static inline void __clear_cache_all(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070035{
Greg Ungerer8ce877a2010-11-09 13:35:55 +100036#ifdef CACHE_INVALIDATE
Greg Ungerera1a9bcb2009-01-13 10:17:30 +100037 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020038 "movec %0, %%CACR\n\t"
Greg Ungerera1a9bcb2009-01-13 10:17:30 +100039 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020040 : : "r" (CACHE_INVALIDATE) );
Greg Ungerer8ce877a2010-11-09 13:35:55 +100041#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070042}
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Greg Ungerer1744bd92012-05-02 17:02:21 +100044static inline void __flush_cache_all(void)
45{
46#ifdef CACHE_PUSH
47 mcf_cache_push();
48#endif
49 __clear_cache_all();
50}
51
Greg Ungerer07ffee52010-11-10 15:22:19 +100052/*
53 * Some ColdFire parts implement separate instruction and data caches,
54 * on those we should just flush the appropriate cache. If we don't need
55 * to do any specific flushing then this will be optimized away.
56 */
57static inline void __flush_icache_all(void)
58{
59#ifdef CACHE_INVALIDATEI
60 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020061 "movec %0, %%CACR\n\t"
Greg Ungerer07ffee52010-11-10 15:22:19 +100062 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020063 : : "r" (CACHE_INVALIDATEI) );
Greg Ungerer07ffee52010-11-10 15:22:19 +100064#endif
65}
66
67static inline void __flush_dcache_all(void)
68{
69#ifdef CACHE_PUSH
70 mcf_cache_push();
71#endif
72#ifdef CACHE_INVALIDATED
73 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020074 "movec %0, %%CACR\n\t"
Greg Ungerer07ffee52010-11-10 15:22:19 +100075 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020076 : : "r" (CACHE_INVALIDATED) );
Greg Ungerer07ffee52010-11-10 15:22:19 +100077#else
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020078 /* Flush the write buffer */
Greg Ungerer07ffee52010-11-10 15:22:19 +100079 __asm__ __volatile__ ( "nop" );
80#endif
81}
Greg Ungerer1744bd92012-05-02 17:02:21 +100082
83/*
84 * Push cache entries at supplied address. We want to write back any dirty
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020085 * data and then invalidate the cache lines associated with this address.
Greg Ungerer1744bd92012-05-02 17:02:21 +100086 */
87static inline void cache_push(unsigned long paddr, int len)
88{
89 __flush_cache_all();
90}
91
92/*
93 * Clear cache entries at supplied address (that is don't write back any
94 * dirty data).
95 */
96static inline void cache_clear(unsigned long paddr, int len)
97{
98 __clear_cache_all();
99}
100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101#endif /* _M68KNOMMU_CACHEFLUSH_H */