blob: 195d28f48c30c502543b9ce8cf192a3075c4c2db [file] [log] [blame]
Richard Röjfors6789cb52009-09-18 21:17:20 -03001/*
2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
Vladimir Barinovcccb83f2013-05-29 14:50:57 -03004 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
Richard Röjfors6789cb52009-09-18 21:17:20 -03006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/interrupt.h>
26#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090027#include <linux/slab.h>
Richard Röjfors6789cb52009-09-18 21:17:20 -030028#include <media/v4l2-ioctl.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
Federico Vagac9fbedd2012-07-11 11:29:33 -030031#include <media/v4l2-ctrls.h>
Richard Röjfors42752f72009-09-22 06:07:06 -030032#include <linux/mutex.h>
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -030033#include <linux/delay.h>
Richard Röjfors6789cb52009-09-18 21:17:20 -030034
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -030035#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM 0x0
36#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1
37#define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM 0x2
38#define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM 0x3
39#define ADV7180_STD_NTSC_J 0x4
40#define ADV7180_STD_NTSC_M 0x5
41#define ADV7180_STD_PAL60 0x6
42#define ADV7180_STD_NTSC_443 0x7
43#define ADV7180_STD_PAL_BG 0x8
44#define ADV7180_STD_PAL_N 0x9
45#define ADV7180_STD_PAL_M 0xa
46#define ADV7180_STD_PAL_M_PED 0xb
47#define ADV7180_STD_PAL_COMB_N 0xc
48#define ADV7180_STD_PAL_COMB_N_PED 0xd
49#define ADV7180_STD_PAL_SECAM 0xe
50#define ADV7180_STD_PAL_SECAM_PED 0xf
51
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030052#define ADV7180_REG_INPUT_CONTROL 0x0000
Federico Vagabca7ad12012-04-12 12:39:36 -030053#define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
Richard Röjforsd3124292009-09-22 06:05:42 -030054
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -030055#define ADV7182_REG_INPUT_VIDSEL 0x0002
56
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030057#define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004
Richard Röjfors42752f72009-09-22 06:07:06 -030058#define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
Richard Röjfors6789cb52009-09-18 21:17:20 -030059
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030060#define ADV7180_REG_AUTODETECT_ENABLE 0x07
Richard Röjfors42752f72009-09-22 06:07:06 -030061#define ADV7180_AUTODETECT_DEFAULT 0x7f
Federico Vagac9fbedd2012-07-11 11:29:33 -030062/* Contrast */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030063#define ADV7180_REG_CON 0x0008 /*Unsigned */
Federico Vagac9fbedd2012-07-11 11:29:33 -030064#define ADV7180_CON_MIN 0
65#define ADV7180_CON_DEF 128
66#define ADV7180_CON_MAX 255
67/* Brightness*/
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030068#define ADV7180_REG_BRI 0x000a /*Signed */
Federico Vagac9fbedd2012-07-11 11:29:33 -030069#define ADV7180_BRI_MIN -128
70#define ADV7180_BRI_DEF 0
71#define ADV7180_BRI_MAX 127
72/* Hue */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030073#define ADV7180_REG_HUE 0x000b /*Signed, inverted */
Federico Vagac9fbedd2012-07-11 11:29:33 -030074#define ADV7180_HUE_MIN -127
75#define ADV7180_HUE_DEF 0
76#define ADV7180_HUE_MAX 128
Federico Vagabca7ad12012-04-12 12:39:36 -030077
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030078#define ADV7180_REG_CTRL 0x000e
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030079#define ADV7180_CTRL_IRQ_SPACE 0x20
Richard Röjfors6789cb52009-09-18 21:17:20 -030080
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030081#define ADV7180_REG_PWR_MAN 0x0f
Federico Vagabca7ad12012-04-12 12:39:36 -030082#define ADV7180_PWR_MAN_ON 0x04
83#define ADV7180_PWR_MAN_OFF 0x24
84#define ADV7180_PWR_MAN_RES 0x80
85
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030086#define ADV7180_REG_STATUS1 0x0010
Richard Röjforsd3124292009-09-22 06:05:42 -030087#define ADV7180_STATUS1_IN_LOCK 0x01
88#define ADV7180_STATUS1_AUTOD_MASK 0x70
Richard Röjfors6789cb52009-09-18 21:17:20 -030089#define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
90#define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
91#define ADV7180_STATUS1_AUTOD_PAL_M 0x20
92#define ADV7180_STATUS1_AUTOD_PAL_60 0x30
93#define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
94#define ADV7180_STATUS1_AUTOD_SECAM 0x50
95#define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
96#define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
97
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030098#define ADV7180_REG_IDENT 0x0011
Richard Röjfors6789cb52009-09-18 21:17:20 -030099#define ADV7180_ID_7180 0x18
100
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300101#define ADV7180_REG_ICONF1 0x0040
Richard Röjfors42752f72009-09-22 06:07:06 -0300102#define ADV7180_ICONF1_ACTIVE_LOW 0x01
103#define ADV7180_ICONF1_PSYNC_ONLY 0x10
104#define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
Federico Vagac9fbedd2012-07-11 11:29:33 -0300105/* Saturation */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300106#define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */
107#define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */
Federico Vagac9fbedd2012-07-11 11:29:33 -0300108#define ADV7180_SAT_MIN 0
109#define ADV7180_SAT_DEF 128
110#define ADV7180_SAT_MAX 255
Federico Vagabca7ad12012-04-12 12:39:36 -0300111
Richard Röjfors42752f72009-09-22 06:07:06 -0300112#define ADV7180_IRQ1_LOCK 0x01
113#define ADV7180_IRQ1_UNLOCK 0x02
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300114#define ADV7180_REG_ISR1 0x0042
115#define ADV7180_REG_ICR1 0x0043
116#define ADV7180_REG_IMR1 0x0044
117#define ADV7180_REG_IMR2 0x0048
Richard Röjfors42752f72009-09-22 06:07:06 -0300118#define ADV7180_IRQ3_AD_CHANGE 0x08
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300119#define ADV7180_REG_ISR3 0x004A
120#define ADV7180_REG_ICR3 0x004B
121#define ADV7180_REG_IMR3 0x004C
Lars-Peter Clausen029d6172015-01-23 12:52:23 -0300122#define ADV7180_REG_IMR4 0x50
Richard Röjfors6789cb52009-09-18 21:17:20 -0300123
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300124#define ADV7180_REG_NTSC_V_BIT_END 0x00E6
Federico Vagabca7ad12012-04-12 12:39:36 -0300125#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
126
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300127#define ADV7180_REG_CSI_SLAVE_ADDR 0xFE
128
129#define ADV7180_CSI_REG_PWRDN 0x00
130#define ADV7180_CSI_PWRDN 0x80
131
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300132#define ADV7180_INPUT_CVBS_AIN1 0x00
133#define ADV7180_INPUT_CVBS_AIN2 0x01
134#define ADV7180_INPUT_CVBS_AIN3 0x02
135#define ADV7180_INPUT_CVBS_AIN4 0x03
136#define ADV7180_INPUT_CVBS_AIN5 0x04
137#define ADV7180_INPUT_CVBS_AIN6 0x05
138#define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
139#define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
140#define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
141#define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
142#define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
143
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300144#define ADV7182_INPUT_CVBS_AIN1 0x00
145#define ADV7182_INPUT_CVBS_AIN2 0x01
146#define ADV7182_INPUT_CVBS_AIN3 0x02
147#define ADV7182_INPUT_CVBS_AIN4 0x03
148#define ADV7182_INPUT_CVBS_AIN5 0x04
149#define ADV7182_INPUT_CVBS_AIN6 0x05
150#define ADV7182_INPUT_CVBS_AIN7 0x06
151#define ADV7182_INPUT_CVBS_AIN8 0x07
152#define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
153#define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
154#define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
155#define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
156#define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
157#define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
158#define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
159#define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
160#define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
161#define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
162
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300163#define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
164
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300165struct adv7180_state;
166
167#define ADV7180_FLAG_RESET_POWERED BIT(0)
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300168#define ADV7180_FLAG_V2 BIT(1)
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300169#define ADV7180_FLAG_MIPI_CSI2 BIT(2)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300170
171struct adv7180_chip_info {
172 unsigned int flags;
173 unsigned int valid_input_mask;
174 int (*set_std)(struct adv7180_state *st, unsigned int std);
175 int (*select_input)(struct adv7180_state *st, unsigned int input);
176 int (*init)(struct adv7180_state *state);
177};
178
Richard Röjfors6789cb52009-09-18 21:17:20 -0300179struct adv7180_state {
Federico Vagac9fbedd2012-07-11 11:29:33 -0300180 struct v4l2_ctrl_handler ctrl_hdl;
Richard Röjforsc277b602009-09-22 06:06:34 -0300181 struct v4l2_subdev sd;
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300182 struct media_pad pad;
Richard Röjfors42752f72009-09-22 06:07:06 -0300183 struct mutex mutex; /* mutual excl. when accessing chip */
184 int irq;
Richard Röjforsc277b602009-09-22 06:06:34 -0300185 v4l2_std_id curr_norm;
186 bool autodetect;
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300187 bool powered;
Federico Vagabca7ad12012-04-12 12:39:36 -0300188 u8 input;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300189
190 struct i2c_client *client;
191 unsigned int register_page;
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300192 struct i2c_client *csi_client;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300193 const struct adv7180_chip_info *chip_info;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300194};
Federico Vagac9fbedd2012-07-11 11:29:33 -0300195#define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
196 struct adv7180_state, \
197 ctrl_hdl)->sd)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300198
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300199static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
200{
201 if (state->register_page != page) {
202 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
203 page);
204 state->register_page = page;
205 }
206
207 return 0;
208}
209
210static int adv7180_write(struct adv7180_state *state, unsigned int reg,
211 unsigned int value)
212{
213 lockdep_assert_held(&state->mutex);
214 adv7180_select_page(state, reg >> 8);
215 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
216}
217
218static int adv7180_read(struct adv7180_state *state, unsigned int reg)
219{
220 lockdep_assert_held(&state->mutex);
221 adv7180_select_page(state, reg >> 8);
222 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
223}
224
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300225static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
226 unsigned int value)
227{
228 return i2c_smbus_write_byte_data(state->csi_client, reg, value);
229}
230
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300231static int adv7180_set_video_standard(struct adv7180_state *state,
232 unsigned int std)
233{
234 return state->chip_info->set_std(state, std);
235}
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300236
Richard Röjforsd3124292009-09-22 06:05:42 -0300237static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300238{
Vladimir Barinovb294a192013-04-11 18:06:46 -0300239 /* in case V4L2_IN_ST_NO_SIGNAL */
240 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
241 return V4L2_STD_UNKNOWN;
242
Richard Röjfors6789cb52009-09-18 21:17:20 -0300243 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
244 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
Richard Röjforsd3124292009-09-22 06:05:42 -0300245 return V4L2_STD_NTSC;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300246 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
247 return V4L2_STD_NTSC_443;
248 case ADV7180_STATUS1_AUTOD_PAL_M:
249 return V4L2_STD_PAL_M;
250 case ADV7180_STATUS1_AUTOD_PAL_60:
251 return V4L2_STD_PAL_60;
252 case ADV7180_STATUS1_AUTOD_PAL_B_G:
253 return V4L2_STD_PAL;
254 case ADV7180_STATUS1_AUTOD_SECAM:
255 return V4L2_STD_SECAM;
256 case ADV7180_STATUS1_AUTOD_PAL_COMB:
257 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
258 case ADV7180_STATUS1_AUTOD_SECAM_525:
259 return V4L2_STD_SECAM;
260 default:
261 return V4L2_STD_UNKNOWN;
262 }
263}
264
Richard Röjforsc277b602009-09-22 06:06:34 -0300265static int v4l2_std_to_adv7180(v4l2_std_id std)
266{
267 if (std == V4L2_STD_PAL_60)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300268 return ADV7180_STD_PAL60;
Richard Röjforsc277b602009-09-22 06:06:34 -0300269 if (std == V4L2_STD_NTSC_443)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300270 return ADV7180_STD_NTSC_443;
Richard Röjforsc277b602009-09-22 06:06:34 -0300271 if (std == V4L2_STD_PAL_N)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300272 return ADV7180_STD_PAL_N;
Richard Röjforsc277b602009-09-22 06:06:34 -0300273 if (std == V4L2_STD_PAL_M)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300274 return ADV7180_STD_PAL_M;
Richard Röjforsc277b602009-09-22 06:06:34 -0300275 if (std == V4L2_STD_PAL_Nc)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300276 return ADV7180_STD_PAL_COMB_N;
Richard Röjforsc277b602009-09-22 06:06:34 -0300277
278 if (std & V4L2_STD_PAL)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300279 return ADV7180_STD_PAL_BG;
Richard Röjforsc277b602009-09-22 06:06:34 -0300280 if (std & V4L2_STD_NTSC)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300281 return ADV7180_STD_NTSC_M;
Richard Röjforsc277b602009-09-22 06:06:34 -0300282 if (std & V4L2_STD_SECAM)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300283 return ADV7180_STD_PAL_SECAM;
Richard Röjforsc277b602009-09-22 06:06:34 -0300284
285 return -EINVAL;
286}
287
Richard Röjforsd3124292009-09-22 06:05:42 -0300288static u32 adv7180_status_to_v4l2(u8 status1)
289{
290 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
291 return V4L2_IN_ST_NO_SIGNAL;
292
293 return 0;
294}
295
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300296static int __adv7180_status(struct adv7180_state *state, u32 *status,
Federico Vagabca7ad12012-04-12 12:39:36 -0300297 v4l2_std_id *std)
Richard Röjforsd3124292009-09-22 06:05:42 -0300298{
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300299 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
Richard Röjforsd3124292009-09-22 06:05:42 -0300300
301 if (status1 < 0)
302 return status1;
303
304 if (status)
305 *status = adv7180_status_to_v4l2(status1);
306 if (std)
307 *std = adv7180_std_to_v4l2(status1);
308
309 return 0;
310}
311
Richard Röjfors6789cb52009-09-18 21:17:20 -0300312static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
313{
314 return container_of(sd, struct adv7180_state, sd);
315}
316
317static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
318{
Richard Röjforsc277b602009-09-22 06:06:34 -0300319 struct adv7180_state *state = to_state(sd);
Richard Röjfors42752f72009-09-22 06:07:06 -0300320 int err = mutex_lock_interruptible(&state->mutex);
321 if (err)
322 return err;
Richard Röjforsc277b602009-09-22 06:06:34 -0300323
Richard Röjfors42752f72009-09-22 06:07:06 -0300324 /* when we are interrupt driven we know the state */
325 if (!state->autodetect || state->irq > 0)
Richard Röjforsc277b602009-09-22 06:06:34 -0300326 *std = state->curr_norm;
327 else
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300328 err = __adv7180_status(state, NULL, std);
Richard Röjforsc277b602009-09-22 06:06:34 -0300329
Richard Röjfors42752f72009-09-22 06:07:06 -0300330 mutex_unlock(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -0300331 return err;
Richard Röjforsd3124292009-09-22 06:05:42 -0300332}
Richard Röjfors6789cb52009-09-18 21:17:20 -0300333
Federico Vagabca7ad12012-04-12 12:39:36 -0300334static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
335 u32 output, u32 config)
336{
337 struct adv7180_state *state = to_state(sd);
338 int ret = mutex_lock_interruptible(&state->mutex);
Federico Vagabca7ad12012-04-12 12:39:36 -0300339
340 if (ret)
341 return ret;
342
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300343 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
344 ret = -EINVAL;
Federico Vagabca7ad12012-04-12 12:39:36 -0300345 goto out;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300346 }
Federico Vagabca7ad12012-04-12 12:39:36 -0300347
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300348 ret = state->chip_info->select_input(state, input);
Federico Vagabca7ad12012-04-12 12:39:36 -0300349
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300350 if (ret == 0)
351 state->input = input;
Federico Vagabca7ad12012-04-12 12:39:36 -0300352out:
353 mutex_unlock(&state->mutex);
354 return ret;
355}
356
Richard Röjforsd3124292009-09-22 06:05:42 -0300357static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
358{
Richard Röjfors42752f72009-09-22 06:07:06 -0300359 struct adv7180_state *state = to_state(sd);
360 int ret = mutex_lock_interruptible(&state->mutex);
361 if (ret)
362 return ret;
363
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300364 ret = __adv7180_status(state, status, NULL);
Richard Röjfors42752f72009-09-22 06:07:06 -0300365 mutex_unlock(&state->mutex);
366 return ret;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300367}
368
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300369static int adv7180_program_std(struct adv7180_state *state)
370{
371 int ret;
372
373 if (state->autodetect) {
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300374 ret = adv7180_set_video_standard(state,
375 ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300376 if (ret < 0)
377 return ret;
378
379 __adv7180_status(state, NULL, &state->curr_norm);
380 } else {
381 ret = v4l2_std_to_adv7180(state->curr_norm);
382 if (ret < 0)
383 return ret;
384
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300385 ret = adv7180_set_video_standard(state, ret);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300386 if (ret < 0)
387 return ret;
388 }
389
390 return 0;
391}
392
Richard Röjforsc277b602009-09-22 06:06:34 -0300393static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
394{
395 struct adv7180_state *state = to_state(sd);
Richard Röjfors42752f72009-09-22 06:07:06 -0300396 int ret = mutex_lock_interruptible(&state->mutex);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300397
Richard Röjfors42752f72009-09-22 06:07:06 -0300398 if (ret)
399 return ret;
Richard Röjforsc277b602009-09-22 06:06:34 -0300400
401 /* all standards -> autodetect */
402 if (std == V4L2_STD_ALL) {
Richard Röjforsc277b602009-09-22 06:06:34 -0300403 state->autodetect = true;
404 } else {
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300405 /* Make sure we can support this std */
Richard Röjforsc277b602009-09-22 06:06:34 -0300406 ret = v4l2_std_to_adv7180(std);
407 if (ret < 0)
408 goto out;
409
Richard Röjforsc277b602009-09-22 06:06:34 -0300410 state->curr_norm = std;
411 state->autodetect = false;
412 }
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300413
414 ret = adv7180_program_std(state);
Richard Röjforsc277b602009-09-22 06:06:34 -0300415out:
Richard Röjfors42752f72009-09-22 06:07:06 -0300416 mutex_unlock(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -0300417 return ret;
418}
419
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300420static int adv7180_set_power(struct adv7180_state *state, bool on)
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300421{
422 u8 val;
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300423 int ret;
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300424
425 if (on)
426 val = ADV7180_PWR_MAN_ON;
427 else
428 val = ADV7180_PWR_MAN_OFF;
429
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300430 ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
431 if (ret)
432 return ret;
433
434 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
435 if (on) {
436 adv7180_csi_write(state, 0xDE, 0x02);
437 adv7180_csi_write(state, 0xD2, 0xF7);
438 adv7180_csi_write(state, 0xD8, 0x65);
439 adv7180_csi_write(state, 0xE0, 0x09);
440 adv7180_csi_write(state, 0x2C, 0x00);
441 adv7180_csi_write(state, 0x00, 0x00);
442 } else {
443 adv7180_csi_write(state, 0x00, 0x80);
444 }
445 }
446
447 return 0;
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300448}
449
450static int adv7180_s_power(struct v4l2_subdev *sd, int on)
451{
452 struct adv7180_state *state = to_state(sd);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300453 int ret;
454
455 ret = mutex_lock_interruptible(&state->mutex);
456 if (ret)
457 return ret;
458
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300459 ret = adv7180_set_power(state, on);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300460 if (ret == 0)
461 state->powered = on;
462
463 mutex_unlock(&state->mutex);
464 return ret;
465}
466
Federico Vagac9fbedd2012-07-11 11:29:33 -0300467static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
Federico Vagabca7ad12012-04-12 12:39:36 -0300468{
Federico Vagac9fbedd2012-07-11 11:29:33 -0300469 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
Federico Vagabca7ad12012-04-12 12:39:36 -0300470 struct adv7180_state *state = to_state(sd);
Federico Vagabca7ad12012-04-12 12:39:36 -0300471 int ret = mutex_lock_interruptible(&state->mutex);
Federico Vagac9fbedd2012-07-11 11:29:33 -0300472 int val;
473
Federico Vagabca7ad12012-04-12 12:39:36 -0300474 if (ret)
475 return ret;
Federico Vagac9fbedd2012-07-11 11:29:33 -0300476 val = ctrl->val;
Federico Vagabca7ad12012-04-12 12:39:36 -0300477 switch (ctrl->id) {
478 case V4L2_CID_BRIGHTNESS:
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300479 ret = adv7180_write(state, ADV7180_REG_BRI, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300480 break;
481 case V4L2_CID_HUE:
Federico Vagabca7ad12012-04-12 12:39:36 -0300482 /*Hue is inverted according to HSL chart */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300483 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300484 break;
485 case V4L2_CID_CONTRAST:
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300486 ret = adv7180_write(state, ADV7180_REG_CON, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300487 break;
488 case V4L2_CID_SATURATION:
Federico Vagabca7ad12012-04-12 12:39:36 -0300489 /*
490 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
491 *Let's not confuse the user, everybody understands saturation
492 */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300493 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300494 if (ret < 0)
495 break;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300496 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300497 break;
498 default:
499 ret = -EINVAL;
500 }
501
502 mutex_unlock(&state->mutex);
503 return ret;
504}
505
Federico Vagac9fbedd2012-07-11 11:29:33 -0300506static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
507 .s_ctrl = adv7180_s_ctrl,
508};
509
510static int adv7180_init_controls(struct adv7180_state *state)
511{
512 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
513
514 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
515 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
516 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
517 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
518 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
519 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
520 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
521 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
522 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
523 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
524 V4L2_CID_HUE, ADV7180_HUE_MIN,
525 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
526 state->sd.ctrl_handler = &state->ctrl_hdl;
527 if (state->ctrl_hdl.error) {
528 int err = state->ctrl_hdl.error;
529
530 v4l2_ctrl_handler_free(&state->ctrl_hdl);
531 return err;
532 }
533 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
534
535 return 0;
536}
537static void adv7180_exit_controls(struct adv7180_state *state)
538{
539 v4l2_ctrl_handler_free(&state->ctrl_hdl);
540}
541
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300542static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
543 struct v4l2_subdev_fh *fh,
544 struct v4l2_subdev_mbus_code_enum *code)
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300545{
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300546 if (code->index != 0)
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300547 return -EINVAL;
548
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300549 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300550
551 return 0;
552}
553
554static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
555 struct v4l2_mbus_framefmt *fmt)
556{
557 struct adv7180_state *state = to_state(sd);
558
Boris BREZILLONf5fe58f2014-11-10 14:28:29 -0300559 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300560 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
561 fmt->field = V4L2_FIELD_INTERLACED;
562 fmt->width = 720;
563 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
564
565 return 0;
566}
567
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300568static int adv7180_get_pad_format(struct v4l2_subdev *sd,
569 struct v4l2_subdev_fh *fh,
570 struct v4l2_subdev_format *format)
571{
572 return adv7180_mbus_fmt(sd, &format->format);
573}
574
575static int adv7180_set_pad_format(struct v4l2_subdev *sd,
576 struct v4l2_subdev_fh *fh,
577 struct v4l2_subdev_format *format)
578{
579 return adv7180_mbus_fmt(sd, &format->format);
580}
581
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300582static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
583 struct v4l2_mbus_config *cfg)
584{
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300585 struct adv7180_state *state = to_state(sd);
586
587 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
588 cfg->type = V4L2_MBUS_CSI2;
589 cfg->flags = V4L2_MBUS_CSI2_1_LANE |
590 V4L2_MBUS_CSI2_CHANNEL_0 |
591 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
592 } else {
593 /*
594 * The ADV7180 sensor supports BT.601/656 output modes.
595 * The BT.656 is default and not yet configurable by s/w.
596 */
597 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
598 V4L2_MBUS_DATA_ACTIVE_HIGH;
599 cfg->type = V4L2_MBUS_BT656;
600 }
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300601
602 return 0;
603}
604
Richard Röjfors6789cb52009-09-18 21:17:20 -0300605static const struct v4l2_subdev_video_ops adv7180_video_ops = {
Laurent Pinchart8774bed2014-04-28 16:53:01 -0300606 .s_std = adv7180_s_std,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300607 .querystd = adv7180_querystd,
Richard Röjforsd3124292009-09-22 06:05:42 -0300608 .g_input_status = adv7180_g_input_status,
Federico Vagabca7ad12012-04-12 12:39:36 -0300609 .s_routing = adv7180_s_routing,
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300610 .g_mbus_config = adv7180_g_mbus_config,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300611};
612
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300613
Richard Röjfors6789cb52009-09-18 21:17:20 -0300614static const struct v4l2_subdev_core_ops adv7180_core_ops = {
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300615 .s_power = adv7180_s_power,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300616};
617
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300618static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
619 .enum_mbus_code = adv7180_enum_mbus_code,
620 .set_fmt = adv7180_set_pad_format,
621 .get_fmt = adv7180_get_pad_format,
622};
623
Richard Röjfors6789cb52009-09-18 21:17:20 -0300624static const struct v4l2_subdev_ops adv7180_ops = {
625 .core = &adv7180_core_ops,
626 .video = &adv7180_video_ops,
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300627 .pad = &adv7180_pad_ops,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300628};
629
Lars-Peter Clausen0c255342014-03-07 13:14:31 -0300630static irqreturn_t adv7180_irq(int irq, void *devid)
Richard Röjfors42752f72009-09-22 06:07:06 -0300631{
Lars-Peter Clausen0c255342014-03-07 13:14:31 -0300632 struct adv7180_state *state = devid;
Richard Röjfors42752f72009-09-22 06:07:06 -0300633 u8 isr3;
634
635 mutex_lock(&state->mutex);
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300636 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
Richard Röjfors42752f72009-09-22 06:07:06 -0300637 /* clear */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300638 adv7180_write(state, ADV7180_REG_ICR3, isr3);
Richard Röjfors42752f72009-09-22 06:07:06 -0300639
640 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300641 __adv7180_status(state, NULL, &state->curr_norm);
Richard Röjfors42752f72009-09-22 06:07:06 -0300642 mutex_unlock(&state->mutex);
643
Richard Röjfors42752f72009-09-22 06:07:06 -0300644 return IRQ_HANDLED;
645}
646
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300647static int adv7180_init(struct adv7180_state *state)
648{
649 int ret;
650
651 /* ITU-R BT.656-4 compatible */
652 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
653 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
654 if (ret < 0)
655 return ret;
656
657 /* Manually set V bit end position in NTSC mode */
658 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
659 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
660}
661
662static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
663{
664 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
665 (std << 4) | state->input);
666}
667
668static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
669{
670 int ret;
671
672 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
673 if (ret < 0)
674 return ret;
675
676 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
677 ret |= input;
678 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
679}
680
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300681static int adv7182_init(struct adv7180_state *state)
682{
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300683 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
684 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
685 ADV7180_DEFAULT_CSI_I2C_ADDR << 1);
686
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300687 if (state->chip_info->flags & ADV7180_FLAG_V2) {
688 /* ADI recommended writes for improved video quality */
689 adv7180_write(state, 0x0080, 0x51);
690 adv7180_write(state, 0x0081, 0x51);
691 adv7180_write(state, 0x0082, 0x68);
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300692 }
693
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300694 /* ADI required writes */
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300695 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
696 adv7180_write(state, 0x0003, 0x4e);
697 adv7180_write(state, 0x0004, 0x57);
698 adv7180_write(state, 0x001d, 0xc0);
699 } else {
700 if (state->chip_info->flags & ADV7180_FLAG_V2)
701 adv7180_write(state, 0x0004, 0x17);
702 else
703 adv7180_write(state, 0x0004, 0x07);
704 adv7180_write(state, 0x0003, 0x0c);
705 adv7180_write(state, 0x001d, 0x40);
706 }
707
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300708 adv7180_write(state, 0x0013, 0x00);
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300709
710 return 0;
711}
712
713static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
714{
715 return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
716}
717
718enum adv7182_input_type {
719 ADV7182_INPUT_TYPE_CVBS,
720 ADV7182_INPUT_TYPE_DIFF_CVBS,
721 ADV7182_INPUT_TYPE_SVIDEO,
722 ADV7182_INPUT_TYPE_YPBPR,
723};
724
725static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
726{
727 switch (input) {
728 case ADV7182_INPUT_CVBS_AIN1:
729 case ADV7182_INPUT_CVBS_AIN2:
730 case ADV7182_INPUT_CVBS_AIN3:
731 case ADV7182_INPUT_CVBS_AIN4:
732 case ADV7182_INPUT_CVBS_AIN5:
733 case ADV7182_INPUT_CVBS_AIN6:
734 case ADV7182_INPUT_CVBS_AIN7:
735 case ADV7182_INPUT_CVBS_AIN8:
736 return ADV7182_INPUT_TYPE_CVBS;
737 case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
738 case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
739 case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
740 case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
741 return ADV7182_INPUT_TYPE_SVIDEO;
742 case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
743 case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
744 return ADV7182_INPUT_TYPE_YPBPR;
745 case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
746 case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
747 case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
748 case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
749 return ADV7182_INPUT_TYPE_DIFF_CVBS;
750 default: /* Will never happen */
751 return 0;
752 }
753}
754
755/* ADI recommended writes to registers 0x52, 0x53, 0x54 */
756static unsigned int adv7182_lbias_settings[][3] = {
757 [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
758 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
759 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
760 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
761};
762
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300763static unsigned int adv7280_lbias_settings[][3] = {
764 [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 },
765 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
766 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
767 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
768};
769
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300770static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
771{
772 enum adv7182_input_type input_type;
773 unsigned int *lbias;
774 unsigned int i;
775 int ret;
776
777 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
778 if (ret)
779 return ret;
780
781 /* Reset clamp circuitry - ADI recommended writes */
782 adv7180_write(state, 0x809c, 0x00);
783 adv7180_write(state, 0x809c, 0xff);
784
785 input_type = adv7182_get_input_type(input);
786
787 switch (input_type) {
788 case ADV7182_INPUT_TYPE_CVBS:
789 case ADV7182_INPUT_TYPE_DIFF_CVBS:
790 /* ADI recommends to use the SH1 filter */
791 adv7180_write(state, 0x0017, 0x41);
792 break;
793 default:
794 adv7180_write(state, 0x0017, 0x01);
795 break;
796 }
797
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300798 if (state->chip_info->flags & ADV7180_FLAG_V2)
799 lbias = adv7280_lbias_settings[input_type];
800 else
801 lbias = adv7182_lbias_settings[input_type];
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300802
803 for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
804 adv7180_write(state, 0x0052 + i, lbias[i]);
805
806 if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
807 /* ADI required writes to make differential CVBS work */
808 adv7180_write(state, 0x005f, 0xa8);
809 adv7180_write(state, 0x005a, 0x90);
810 adv7180_write(state, 0x0060, 0xb0);
811 adv7180_write(state, 0x80b6, 0x08);
812 adv7180_write(state, 0x80c0, 0xa0);
813 } else {
814 adv7180_write(state, 0x005f, 0xf0);
815 adv7180_write(state, 0x005a, 0xd0);
816 adv7180_write(state, 0x0060, 0x10);
817 adv7180_write(state, 0x80b6, 0x9c);
818 adv7180_write(state, 0x80c0, 0x00);
819 }
820
821 return 0;
822}
823
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300824static const struct adv7180_chip_info adv7180_info = {
825 .flags = ADV7180_FLAG_RESET_POWERED,
826 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
827 * all inputs and let the card driver take care of validation
828 */
829 .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
830 BIT(ADV7180_INPUT_CVBS_AIN2) |
831 BIT(ADV7180_INPUT_CVBS_AIN3) |
832 BIT(ADV7180_INPUT_CVBS_AIN4) |
833 BIT(ADV7180_INPUT_CVBS_AIN5) |
834 BIT(ADV7180_INPUT_CVBS_AIN6) |
835 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
836 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
837 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
838 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
839 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
840 .init = adv7180_init,
841 .set_std = adv7180_set_std,
842 .select_input = adv7180_select_input,
843};
844
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300845static const struct adv7180_chip_info adv7182_info = {
846 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
847 BIT(ADV7182_INPUT_CVBS_AIN2) |
848 BIT(ADV7182_INPUT_CVBS_AIN3) |
849 BIT(ADV7182_INPUT_CVBS_AIN4) |
850 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
851 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
852 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
853 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
854 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
855 .init = adv7182_init,
856 .set_std = adv7182_set_std,
857 .select_input = adv7182_select_input,
858};
859
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300860static const struct adv7180_chip_info adv7280_info = {
861 .flags = ADV7180_FLAG_V2,
862 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
863 BIT(ADV7182_INPUT_CVBS_AIN2) |
864 BIT(ADV7182_INPUT_CVBS_AIN3) |
865 BIT(ADV7182_INPUT_CVBS_AIN4) |
866 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
867 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
868 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3),
869 .init = adv7182_init,
870 .set_std = adv7182_set_std,
871 .select_input = adv7182_select_input,
872};
873
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300874static const struct adv7180_chip_info adv7280_m_info = {
875 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
876 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
877 BIT(ADV7182_INPUT_CVBS_AIN2) |
878 BIT(ADV7182_INPUT_CVBS_AIN3) |
879 BIT(ADV7182_INPUT_CVBS_AIN4) |
880 BIT(ADV7182_INPUT_CVBS_AIN5) |
881 BIT(ADV7182_INPUT_CVBS_AIN6) |
882 BIT(ADV7182_INPUT_CVBS_AIN7) |
883 BIT(ADV7182_INPUT_CVBS_AIN8) |
884 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
885 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
886 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
887 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
888 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
889 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6),
890 .init = adv7182_init,
891 .set_std = adv7182_set_std,
892 .select_input = adv7182_select_input,
893};
894
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300895static const struct adv7180_chip_info adv7281_info = {
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300896 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -0300897 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
898 BIT(ADV7182_INPUT_CVBS_AIN2) |
899 BIT(ADV7182_INPUT_CVBS_AIN7) |
900 BIT(ADV7182_INPUT_CVBS_AIN8) |
901 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
902 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
903 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
904 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
905 .init = adv7182_init,
906 .set_std = adv7182_set_std,
907 .select_input = adv7182_select_input,
908};
909
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -0300910static const struct adv7180_chip_info adv7281_m_info = {
911 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
912 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
913 BIT(ADV7182_INPUT_CVBS_AIN2) |
914 BIT(ADV7182_INPUT_CVBS_AIN3) |
915 BIT(ADV7182_INPUT_CVBS_AIN4) |
916 BIT(ADV7182_INPUT_CVBS_AIN7) |
917 BIT(ADV7182_INPUT_CVBS_AIN8) |
918 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
919 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
920 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
921 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
922 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
923 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
924 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
925 .init = adv7182_init,
926 .set_std = adv7182_set_std,
927 .select_input = adv7182_select_input,
928};
929
930static const struct adv7180_chip_info adv7281_ma_info = {
931 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
932 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
933 BIT(ADV7182_INPUT_CVBS_AIN2) |
934 BIT(ADV7182_INPUT_CVBS_AIN3) |
935 BIT(ADV7182_INPUT_CVBS_AIN4) |
936 BIT(ADV7182_INPUT_CVBS_AIN5) |
937 BIT(ADV7182_INPUT_CVBS_AIN6) |
938 BIT(ADV7182_INPUT_CVBS_AIN7) |
939 BIT(ADV7182_INPUT_CVBS_AIN8) |
940 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
941 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
942 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
943 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
944 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
945 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) |
946 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
947 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
948 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) |
949 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
950 .init = adv7182_init,
951 .set_std = adv7182_set_std,
952 .select_input = adv7182_select_input,
953};
954
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300955static int init_device(struct adv7180_state *state)
Federico Vagabca7ad12012-04-12 12:39:36 -0300956{
957 int ret;
958
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300959 mutex_lock(&state->mutex);
960
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -0300961 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
962 usleep_range(2000, 10000);
963
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300964 ret = state->chip_info->init(state);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300965 if (ret)
966 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300967
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300968 ret = adv7180_program_std(state);
969 if (ret)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300970 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300971
Federico Vagabca7ad12012-04-12 12:39:36 -0300972 /* register for interrupts */
973 if (state->irq > 0) {
Federico Vagabca7ad12012-04-12 12:39:36 -0300974 /* config the Interrupt pin to be active low */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300975 ret = adv7180_write(state, ADV7180_REG_ICONF1,
Federico Vagabca7ad12012-04-12 12:39:36 -0300976 ADV7180_ICONF1_ACTIVE_LOW |
977 ADV7180_ICONF1_PSYNC_ONLY);
978 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300979 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300980
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300981 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300982 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300983 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300984
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300985 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300986 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300987 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300988
989 /* enable AD change interrupts interrupts */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300990 ret = adv7180_write(state, ADV7180_REG_IMR3,
Federico Vagabca7ad12012-04-12 12:39:36 -0300991 ADV7180_IRQ3_AD_CHANGE);
992 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300993 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300994
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300995 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300996 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300997 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300998 }
999
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -03001000out_unlock:
1001 mutex_unlock(&state->mutex);
Alexey Khoroshilovdf065b32014-03-14 18:04:03 -03001002
Alexey Khoroshilovdf065b32014-03-14 18:04:03 -03001003 return ret;
Federico Vagabca7ad12012-04-12 12:39:36 -03001004}
Richard Röjfors6789cb52009-09-18 21:17:20 -03001005
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -08001006static int adv7180_probe(struct i2c_client *client,
1007 const struct i2c_device_id *id)
Richard Röjfors6789cb52009-09-18 21:17:20 -03001008{
1009 struct adv7180_state *state;
1010 struct v4l2_subdev *sd;
1011 int ret;
1012
1013 /* Check if the adapter supports the needed features */
1014 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1015 return -EIO;
1016
1017 v4l_info(client, "chip found @ 0x%02x (%s)\n",
Federico Vagabca7ad12012-04-12 12:39:36 -03001018 client->addr, client->adapter->name);
Richard Röjfors6789cb52009-09-18 21:17:20 -03001019
Laurent Pinchartc02b2112013-05-02 08:29:43 -03001020 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
Fabio Estevam7657e062014-12-16 13:49:07 -03001021 if (state == NULL)
1022 return -ENOMEM;
Richard Röjfors42752f72009-09-22 06:07:06 -03001023
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -03001024 state->client = client;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -03001025 state->chip_info = (struct adv7180_chip_info *)id->driver_data;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -03001026
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001027 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1028 state->csi_client = i2c_new_dummy(client->adapter,
1029 ADV7180_DEFAULT_CSI_I2C_ADDR);
1030 if (!state->csi_client)
1031 return -ENOMEM;
1032 }
1033
Richard Röjfors42752f72009-09-22 06:07:06 -03001034 state->irq = client->irq;
Richard Röjfors42752f72009-09-22 06:07:06 -03001035 mutex_init(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -03001036 state->autodetect = true;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -03001037 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1038 state->powered = true;
1039 else
1040 state->powered = false;
Federico Vagabca7ad12012-04-12 12:39:36 -03001041 state->input = 0;
Richard Röjfors6789cb52009-09-18 21:17:20 -03001042 sd = &state->sd;
1043 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001044 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
Richard Röjfors6789cb52009-09-18 21:17:20 -03001045
Federico Vagac9fbedd2012-07-11 11:29:33 -03001046 ret = adv7180_init_controls(state);
1047 if (ret)
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001048 goto err_unregister_csi_client;
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001049
1050 state->pad.flags = MEDIA_PAD_FL_SOURCE;
1051 sd->entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
1052 ret = media_entity_init(&sd->entity, 1, &state->pad, 0);
Federico Vagac9fbedd2012-07-11 11:29:33 -03001053 if (ret)
1054 goto err_free_ctrl;
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -03001055
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001056 ret = init_device(state);
1057 if (ret)
1058 goto err_media_entity_cleanup;
1059
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -03001060 if (state->irq) {
1061 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
Lars-Peter Clausenf3e991d2015-01-23 12:52:21 -03001062 IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
1063 KBUILD_MODNAME, state);
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -03001064 if (ret)
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001065 goto err_media_entity_cleanup;
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -03001066 }
1067
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -03001068 ret = v4l2_async_register_subdev(sd);
1069 if (ret)
1070 goto err_free_irq;
1071
Richard Röjfors6789cb52009-09-18 21:17:20 -03001072 return 0;
Richard Röjfors42752f72009-09-22 06:07:06 -03001073
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -03001074err_free_irq:
1075 if (state->irq > 0)
1076 free_irq(client->irq, state);
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001077err_media_entity_cleanup:
1078 media_entity_cleanup(&sd->entity);
Federico Vagac9fbedd2012-07-11 11:29:33 -03001079err_free_ctrl:
1080 adv7180_exit_controls(state);
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001081err_unregister_csi_client:
1082 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1083 i2c_unregister_device(state->csi_client);
Lars-Peter Clausen297a0ae2014-03-07 13:14:27 -03001084 mutex_destroy(&state->mutex);
Richard Röjfors42752f72009-09-22 06:07:06 -03001085 return ret;
Richard Röjfors6789cb52009-09-18 21:17:20 -03001086}
1087
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -08001088static int adv7180_remove(struct i2c_client *client)
Richard Röjfors6789cb52009-09-18 21:17:20 -03001089{
1090 struct v4l2_subdev *sd = i2c_get_clientdata(client);
Richard Röjfors42752f72009-09-22 06:07:06 -03001091 struct adv7180_state *state = to_state(sd);
Richard Röjfors6789cb52009-09-18 21:17:20 -03001092
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -03001093 v4l2_async_unregister_subdev(sd);
1094
Lars-Peter Clausen0c255342014-03-07 13:14:31 -03001095 if (state->irq > 0)
Richard Röjfors42752f72009-09-22 06:07:06 -03001096 free_irq(client->irq, state);
Richard Röjfors42752f72009-09-22 06:07:06 -03001097
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -03001098 media_entity_cleanup(&sd->entity);
Lars-Peter Clausenb13f4af2014-03-07 13:14:28 -03001099 adv7180_exit_controls(state);
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001100
1101 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1102 i2c_unregister_device(state->csi_client);
1103
Lars-Peter Clausen297a0ae2014-03-07 13:14:27 -03001104 mutex_destroy(&state->mutex);
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001105
Richard Röjfors6789cb52009-09-18 21:17:20 -03001106 return 0;
1107}
1108
1109static const struct i2c_device_id adv7180_id[] = {
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -03001110 { "adv7180", (kernel_ulong_t)&adv7180_info },
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -03001111 { "adv7182", (kernel_ulong_t)&adv7182_info },
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -03001112 { "adv7280", (kernel_ulong_t)&adv7280_info },
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001113 { "adv7280-m", (kernel_ulong_t)&adv7280_m_info },
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -03001114 { "adv7281", (kernel_ulong_t)&adv7281_info },
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001115 { "adv7281-m", (kernel_ulong_t)&adv7281_m_info },
1116 { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info },
Lars-Peter Clausenbf7dcb82015-01-23 12:52:30 -03001117 { "adv7282", (kernel_ulong_t)&adv7281_info },
Lars-Peter Clausenb37135e2015-01-23 12:52:31 -03001118 { "adv7282-m", (kernel_ulong_t)&adv7281_m_info },
Richard Röjfors6789cb52009-09-18 21:17:20 -03001119 {},
1120};
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -03001121MODULE_DEVICE_TABLE(i2c, adv7180_id);
Richard Röjfors6789cb52009-09-18 21:17:20 -03001122
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001123#ifdef CONFIG_PM_SLEEP
1124static int adv7180_suspend(struct device *dev)
Federico Vagabca7ad12012-04-12 12:39:36 -03001125{
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001126 struct i2c_client *client = to_i2c_client(dev);
Lars-Peter Clausene246c332014-03-10 14:05:39 -03001127 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1128 struct adv7180_state *state = to_state(sd);
Federico Vagabca7ad12012-04-12 12:39:36 -03001129
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -03001130 return adv7180_set_power(state, false);
Federico Vagabca7ad12012-04-12 12:39:36 -03001131}
1132
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001133static int adv7180_resume(struct device *dev)
Federico Vagabca7ad12012-04-12 12:39:36 -03001134{
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001135 struct i2c_client *client = to_i2c_client(dev);
Federico Vagabca7ad12012-04-12 12:39:36 -03001136 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1137 struct adv7180_state *state = to_state(sd);
1138 int ret;
1139
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -03001140 ret = init_device(state);
Federico Vagabca7ad12012-04-12 12:39:36 -03001141 if (ret < 0)
1142 return ret;
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -03001143
1144 ret = adv7180_set_power(state, state->powered);
1145 if (ret)
1146 return ret;
1147
Federico Vagabca7ad12012-04-12 12:39:36 -03001148 return 0;
1149}
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001150
1151static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
1152#define ADV7180_PM_OPS (&adv7180_pm_ops)
1153
1154#else
1155#define ADV7180_PM_OPS NULL
Federico Vagabca7ad12012-04-12 12:39:36 -03001156#endif
1157
Richard Röjfors6789cb52009-09-18 21:17:20 -03001158static struct i2c_driver adv7180_driver = {
1159 .driver = {
Federico Vagabca7ad12012-04-12 12:39:36 -03001160 .owner = THIS_MODULE,
Federico Vagac9fbedd2012-07-11 11:29:33 -03001161 .name = KBUILD_MODNAME,
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -03001162 .pm = ADV7180_PM_OPS,
Federico Vagabca7ad12012-04-12 12:39:36 -03001163 },
1164 .probe = adv7180_probe,
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -08001165 .remove = adv7180_remove,
Federico Vagabca7ad12012-04-12 12:39:36 -03001166 .id_table = adv7180_id,
Richard Röjfors6789cb52009-09-18 21:17:20 -03001167};
1168
Axel Linc6e8d862012-02-12 06:56:32 -03001169module_i2c_driver(adv7180_driver);
Richard Röjfors6789cb52009-09-18 21:17:20 -03001170
1171MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
1172MODULE_AUTHOR("Mocean Laboratories");
1173MODULE_LICENSE("GPL v2");