Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com) |
| 3 | * |
| 4 | * This file is dual-licensed: you can use it either under the terms |
| 5 | * of the GPL or the X11 license, at your option. Note that this dual |
| 6 | * licensing only applies to this file, and not this project as a |
| 7 | * whole. |
| 8 | * |
| 9 | * a) This file is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * version 2 as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This file is distributed in the hope that it will be useful |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * Or, alternatively |
| 19 | * |
| 20 | * b) Permission is hereby granted, free of charge, to any person |
| 21 | * obtaining a copy of this software and associated documentation |
| 22 | * files (the "Software"), to deal in the Software without |
| 23 | * restriction, including without limitation the rights to use |
| 24 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 25 | * sell copies of the Software, and to permit persons to whom the |
| 26 | * Software is furnished to do so, subject to the following |
| 27 | * conditions: |
| 28 | * |
| 29 | * The above copyright notice and this permission notice shall be |
| 30 | * included in all copies or substantial portions of the Software. |
| 31 | * |
| 32 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND |
| 33 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 34 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 35 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 36 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY |
| 37 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 38 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 39 | * OTHER DEALINGS IN THE SOFTWARE. |
| 40 | */ |
| 41 | |
| 42 | /dts-v1/; |
| 43 | #include "imx6q.dtsi" |
| 44 | #include <dt-bindings/gpio/gpio.h> |
| 45 | |
| 46 | / { |
| 47 | model = "Embest MarS Board i.MX6Dual"; |
| 48 | compatible = "embest,imx6q-marsboard", "fsl,imx6q"; |
| 49 | |
| 50 | memory { |
| 51 | reg = <0x10000000 0x40000000>; |
| 52 | }; |
| 53 | |
| 54 | reg_3p3v: regulator-3p3v { |
| 55 | compatible = "regulator-fixed"; |
| 56 | regulator-name = "3P3V"; |
| 57 | regulator-min-microvolt = <3300000>; |
| 58 | regulator-max-microvolt = <3300000>; |
| 59 | }; |
| 60 | |
| 61 | reg_usb_otg_vbus: regulator-usb-otg-vbus { |
| 62 | compatible = "regulator-fixed"; |
| 63 | regulator-name = "usb_otg_vbus"; |
| 64 | regulator-min-microvolt = <5000000>; |
| 65 | regulator-max-microvolt = <5000000>; |
| 66 | gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; |
| 67 | enable-active-high; |
| 68 | }; |
| 69 | |
| 70 | leds { |
| 71 | compatible = "gpio-leds"; |
| 72 | pinctrl-names = "default"; |
| 73 | pinctrl-0 = <&pinctrl_led>; |
| 74 | |
| 75 | user1 { |
| 76 | label = "imx6:green:user1"; |
| 77 | gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; |
| 78 | default-state = "off"; |
| 79 | linux,default-trigger = "heartbeat"; |
| 80 | }; |
| 81 | |
| 82 | user2 { |
| 83 | label = "imx6:green:user2"; |
| 84 | gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; |
| 85 | default-state = "off"; |
| 86 | }; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | &audmux { |
| 91 | pinctrl-names = "default"; |
| 92 | pinctrl-0 = <&pinctrl_audmux>; |
| 93 | status = "okay"; |
| 94 | }; |
| 95 | |
| 96 | &ecspi1 { |
| 97 | pinctrl-names = "default"; |
| 98 | pinctrl-0 = <&pinctrl_ecspi1>; |
| 99 | cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; |
| 100 | fsl,spi-num-chipselects = <1>; |
| 101 | status = "okay"; |
| 102 | |
| 103 | m25p80@0 { |
| 104 | compatible = "microchip,sst25vf016b"; |
| 105 | spi-max-frequency = <20000000>; |
| 106 | reg = <0>; |
| 107 | }; |
| 108 | }; |
| 109 | |
| 110 | &fec { |
| 111 | pinctrl-names = "default"; |
| 112 | pinctrl-0 = <&pinctrl_enet>; |
| 113 | phy-mode = "rgmii"; |
| 114 | phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; |
| 115 | status = "okay"; |
| 116 | }; |
| 117 | |
| 118 | &hdmi { |
| 119 | ddc-i2c-bus = <&i2c2>; |
| 120 | status = "okay"; |
| 121 | }; |
| 122 | |
| 123 | &i2c1 { |
| 124 | clock-frequency = <100000>; |
| 125 | pinctrl-names = "default"; |
| 126 | pinctrl-0 = <&pinctrl_i2c1>; |
| 127 | status = "okay"; |
| 128 | }; |
| 129 | |
| 130 | &i2c2 { |
| 131 | clock-frequency = <100000>; |
| 132 | pinctrl-names = "default"; |
| 133 | pinctrl-0 = <&pinctrl_i2c2>; |
| 134 | status = "okay"; |
| 135 | }; |
| 136 | |
| 137 | &i2c3 { |
| 138 | clock-frequency = <100000>; |
| 139 | pinctrl-names = "default"; |
| 140 | pinctrl-0 = <&pinctrl_i2c3>; |
| 141 | status = "okay"; |
| 142 | }; |
| 143 | |
| 144 | &pwm1 { |
| 145 | pinctrl-names = "default"; |
| 146 | pinctrl-0 = <&pinctrl_pwm1>; |
| 147 | status = "okay"; |
| 148 | }; |
| 149 | |
| 150 | &pwm2 { |
| 151 | pinctrl-names = "default"; |
| 152 | pinctrl-0 = <&pinctrl_pwm2>; |
| 153 | status = "okay"; |
| 154 | }; |
| 155 | |
| 156 | &pwm3 { |
| 157 | pinctrl-names = "default"; |
| 158 | pinctrl-0 = <&pinctrl_pwm3>; |
| 159 | status = "okay"; |
| 160 | }; |
| 161 | |
| 162 | &pwm4 { |
| 163 | pinctrl-names = "default"; |
| 164 | pinctrl-0 = <&pinctrl_pwm4>; |
| 165 | status = "okay"; |
| 166 | }; |
| 167 | |
| 168 | &uart1 { |
| 169 | pinctrl-names = "default"; |
| 170 | pinctrl-0 = <&pinctrl_uart1>; |
| 171 | status = "okay"; |
| 172 | }; |
| 173 | |
| 174 | &uart2 { |
| 175 | pinctrl-names = "default"; |
| 176 | pinctrl-0 = <&pinctrl_uart2>; |
| 177 | status = "okay"; |
| 178 | }; |
| 179 | |
| 180 | &uart3 { |
| 181 | pinctrl-names = "default"; |
| 182 | pinctrl-0 = <&pinctrl_uart3>; |
| 183 | status = "okay"; |
| 184 | }; |
| 185 | |
| 186 | &uart4 { |
| 187 | pinctrl-names = "default"; |
| 188 | pinctrl-0 = <&pinctrl_uart4>; |
| 189 | status = "okay"; |
| 190 | }; |
| 191 | |
| 192 | &uart5 { |
| 193 | pinctrl-names = "default"; |
| 194 | pinctrl-0 = <&pinctrl_uart5>; |
| 195 | status = "okay"; |
| 196 | }; |
| 197 | |
| 198 | &usbh1 { |
| 199 | dr_mode = "host"; |
| 200 | disable-over-current; |
| 201 | status = "okay"; |
| 202 | }; |
| 203 | |
| 204 | &usbotg { |
| 205 | vbus-supply = <®_usb_otg_vbus>; |
| 206 | pinctrl-names = "default"; |
| 207 | pinctrl-0 = <&pinctrl_usbotg>; |
| 208 | dr_mode = "otg"; |
| 209 | disable-over-current; |
| 210 | status = "okay"; |
| 211 | }; |
| 212 | |
| 213 | &usdhc2 { |
| 214 | pinctrl-names = "default"; |
| 215 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 216 | vmmc-supply = <®_3p3v>; |
| 217 | cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
| 218 | wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; |
| 219 | status = "okay"; |
| 220 | }; |
| 221 | |
| 222 | &usdhc3 { |
| 223 | pinctrl-names = "default"; |
| 224 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 225 | vmmc-supply = <®_3p3v>; |
| 226 | non-removable; |
| 227 | status = "okay"; |
| 228 | }; |
| 229 | |
| 230 | &iomuxc { |
| 231 | |
| 232 | pinctrl_audmux: audmuxgrp { |
| 233 | fsl,pins = < |
| 234 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
| 235 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 |
| 236 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 |
| 237 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 |
| 238 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ |
| 239 | >; |
| 240 | }; |
| 241 | |
| 242 | pinctrl_ecspi1: ecspi1grp { |
| 243 | fsl,pins = < |
| 244 | MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 |
| 245 | MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |
| 246 | MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 |
| 247 | MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */ |
| 248 | >; |
| 249 | }; |
| 250 | |
| 251 | pinctrl_enet: enetgrp { |
| 252 | fsl,pins = < |
| 253 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| 254 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 255 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
| 256 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
| 257 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
| 258 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
| 259 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
| 260 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 261 | /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ |
| 262 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 |
| 263 | /* AR8035 pin strapping: IO voltage: pull up */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 264 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 265 | /* AR8035 pin strapping: PHYADDR#0: pull down */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 266 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 267 | /* AR8035 pin strapping: PHYADDR#1: pull down */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 268 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 269 | /* AR8035 pin strapping: MODE#1: pull up */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 270 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 271 | /* AR8035 pin strapping: MODE#3: pull up */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 272 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 273 | /* AR8035 pin strapping: MODE#0: pull down */ |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 274 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 |
Sergio Prado | b18f909 | 2016-04-26 20:38:22 -0300 | [diff] [blame] | 275 | /* GPIO16 -> AR8035 25MHz */ |
| 276 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
| 277 | /* RGMII_nRST */ |
| 278 | MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 |
| 279 | /* AR8035 interrupt */ |
| 280 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 |
| 281 | >; |
| 282 | }; |
| 283 | |
| 284 | pinctrl_i2c1: i2c1grp { |
| 285 | fsl,pins = < |
| 286 | MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 |
| 287 | MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 |
| 288 | >; |
| 289 | }; |
| 290 | |
| 291 | pinctrl_i2c2: i2c2grp { |
| 292 | fsl,pins = < |
| 293 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| 294 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| 295 | >; |
| 296 | }; |
| 297 | |
| 298 | pinctrl_i2c3: i2c3grp { |
| 299 | fsl,pins = < |
| 300 | MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 |
| 301 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
| 302 | >; |
| 303 | }; |
| 304 | |
| 305 | pinctrl_led: ledgrp { |
| 306 | fsl,pins = < |
| 307 | MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* LED1 */ |
| 308 | MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* LED2 */ |
| 309 | >; |
| 310 | }; |
| 311 | |
| 312 | pinctrl_pwm1: pwm1grp { |
| 313 | fsl,pins = < |
| 314 | MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 |
| 315 | >; |
| 316 | }; |
| 317 | |
| 318 | pinctrl_pwm2: pwm2grp { |
| 319 | fsl,pins = < |
| 320 | MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 |
| 321 | >; |
| 322 | }; |
| 323 | |
| 324 | pinctrl_pwm3: pwm3grp { |
| 325 | fsl,pins = < |
| 326 | MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 |
| 327 | >; |
| 328 | }; |
| 329 | |
| 330 | pinctrl_pwm4: pwm4grp { |
| 331 | fsl,pins = < |
| 332 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 |
| 333 | >; |
| 334 | }; |
| 335 | |
| 336 | pinctrl_uart1: uart1grp { |
| 337 | fsl,pins = < |
| 338 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| 339 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| 340 | >; |
| 341 | }; |
| 342 | |
| 343 | pinctrl_uart2: uart2grp { |
| 344 | fsl,pins = < |
| 345 | MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 |
| 346 | MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 |
| 347 | >; |
| 348 | }; |
| 349 | |
| 350 | pinctrl_uart3: uart3grp { |
| 351 | fsl,pins = < |
| 352 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
| 353 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
| 354 | >; |
| 355 | }; |
| 356 | |
| 357 | pinctrl_uart4: uart4grp { |
| 358 | fsl,pins = < |
| 359 | MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 |
| 360 | MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 |
| 361 | >; |
| 362 | }; |
| 363 | |
| 364 | pinctrl_uart5: uart5grp { |
| 365 | fsl,pins = < |
| 366 | MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 |
| 367 | MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 |
| 368 | >; |
| 369 | }; |
| 370 | |
| 371 | pinctrl_usbotg: usbotggrp { |
| 372 | fsl,pins = < |
| 373 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |
| 374 | MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 |
| 375 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* USB OTG POWER ENABLE */ |
| 376 | >; |
| 377 | }; |
| 378 | |
| 379 | pinctrl_usdhc2: usdhc2grp { |
| 380 | fsl,pins = < |
| 381 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| 382 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| 383 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| 384 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| 385 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| 386 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| 387 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */ |
| 388 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* WP */ |
| 389 | >; |
| 390 | }; |
| 391 | |
| 392 | pinctrl_usdhc3: usdhc3grp { |
| 393 | fsl,pins = < |
| 394 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17009 |
| 395 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10009 |
| 396 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17009 |
| 397 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17009 |
| 398 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17009 |
| 399 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17009 |
| 400 | MX6QDL_PAD_SD3_RST__SD3_RESET 0x17009 |
| 401 | >; |
| 402 | }; |
| 403 | }; |