Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-sh/cpu-sh2/cache.h |
| 3 | * |
| 4 | * Copyright (C) 2003 Paul Mundt |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | #ifndef __ASM_CPU_SH2_CACHE_H |
| 11 | #define __ASM_CPU_SH2_CACHE_H |
| 12 | |
| 13 | #define L1_CACHE_SHIFT 4 |
| 14 | |
Paul Mundt | b9601c5 | 2007-06-08 11:55:28 +0900 | [diff] [blame^] | 15 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) |
Yoshinori Sato | b229632 | 2006-11-05 16:18:08 +0900 | [diff] [blame] | 16 | #define CCR1 0xffffffec |
| 17 | #define CCR CCR1 |
| 18 | |
| 19 | #define CCR_CACHE_CE 0x01 /* Cache enable */ |
| 20 | #define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ |
| 21 | /* 0x00000000-0x7fffffff: Write-through */ |
| 22 | /* 0x80000000-0x9fffffff: Write-back */ |
| 23 | /* 0xc0000000-0xdfffffff: Write-through */ |
| 24 | #define CCR_CACHE_CB 0x00 /* CCR[bit1=0,bit2=0] */ |
| 25 | /* 0x00000000-0x7fffffff: Write-back */ |
| 26 | /* 0x80000000-0x9fffffff: Write-through */ |
| 27 | /* 0xc0000000-0xdfffffff: Write-back */ |
| 28 | #define CCR_CACHE_CF 0x08 /* Cache invalidate */ |
| 29 | |
| 30 | #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 |
| 31 | #define CACHE_OC_DATA_ARRAY 0xf1000000 |
| 32 | |
| 33 | #define CCR_CACHE_ENABLE CCR_CACHE_CE |
| 34 | #define CCR_CACHE_INVALIDATE CCR_CACHE_CF |
| 35 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Paul Mundt | b9601c5 | 2007-06-08 11:55:28 +0900 | [diff] [blame^] | 37 | #endif /* __ASM_CPU_SH2_CACHE_H */ |