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Johannes Poehlmann242b4762017-07-25 13:27:11 +02001/* MFD cell driver data for the DS1WM driver
2 *
3 * to be defined in the MFD device that is
4 * using this driver for one of his sub devices
5 */
Philipp Zabela23a1752009-02-17 10:06:41 +01006
7struct ds1wm_driver_data {
8 int active_high;
Philipp Zabel7d33ccb2009-02-17 10:09:19 +01009 int clock_rate;
Johannes Poehlmann242b4762017-07-25 13:27:11 +020010 /* in milliseconds, the amount of time to
11 * sleep following a reset pulse. Zero
12 * should work if your bus devices recover
13 * time respects the 1-wire spec since the
14 * ds1wm implements the precise timings of
15 * a reset pulse/presence detect sequence.
16 */
Jean-François Dagenaisf607e7f2011-07-08 15:39:44 -070017 unsigned int reset_recover_delay;
Johannes Poehlmann242b4762017-07-25 13:27:11 +020018
Johannes Poehlmannbaa80552017-07-25 13:27:12 +020019 /* Say 1 here for big endian Hardware
20 * (only relevant with bus-shift > 0
21 */
22 bool is_hw_big_endian;
23
Johannes Poehlmann242b4762017-07-25 13:27:11 +020024 /* left shift of register number to get register address offsett.
25 * Only 0,1,2 allowed for 8,16 or 32 bit bus width respectively
26 */
27 unsigned int bus_shift;
Philipp Zabela23a1752009-02-17 10:06:41 +010028};