blob: 21660da2ec5969bd803f78e84270637d0588a66c [file] [log] [blame]
Bryan Wud7df69f2013-01-02 15:53:51 -08001/dts-v1/;
2
Stephen Warren1bd0bd42012-10-17 16:38:21 -06003#include "tegra30.dtsi"
Bryan Wud7df69f2013-01-02 15:53:51 -08004
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
9 memory {
Stephen Warren30022bb2013-05-13 09:47:31 +000010 reg = <0x80000000 0x7ff00000>;
Bryan Wud7df69f2013-01-02 15:53:51 -080011 };
12
Thierry Redingbb034cb2013-08-09 16:49:28 +020013 pcie-controller {
14 status = "okay";
15 pex-clk-supply = <&sys_3v3_pexs_reg>;
16 vdd-supply = <&ldo1_reg>;
17 avdd-supply = <&ldo2_reg>;
18
19 pci@1,0 {
20 status = "okay";
21 nvidia,num-lanes = <4>;
22 };
23
24 pci@2,0 {
25 status = "okay";
26 nvidia,num-lanes = <1>;
27 };
28
29 pci@3,0 {
30 nvidia,num-lanes = <1>;
31 };
32 };
33
Thierry Reding9bd80b42013-08-12 17:49:03 +020034 host1x {
35 hdmi {
36 status = "okay";
37
38 vdd-supply = <&sys_3v3_reg>;
39 pll-supply = <&vio_reg>;
40
41 nvidia,hpd-gpio =
42 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
43 nvidia,ddc-i2c-bus = <&hdmiddc>;
44 };
45 };
46
Bryan Wud7df69f2013-01-02 15:53:51 -080047 pinmux {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 sdmmc1_clk_pz0 {
53 nvidia,pins = "sdmmc1_clk_pz0";
54 nvidia,function = "sdmmc1";
55 nvidia,pull = <0>;
56 nvidia,tristate = <0>;
57 };
58 sdmmc1_cmd_pz1 {
59 nvidia,pins = "sdmmc1_cmd_pz1",
60 "sdmmc1_dat0_py7",
61 "sdmmc1_dat1_py6",
62 "sdmmc1_dat2_py5",
63 "sdmmc1_dat3_py4";
64 nvidia,function = "sdmmc1";
65 nvidia,pull = <2>;
66 nvidia,tristate = <0>;
67 };
68 sdmmc3_clk_pa6 {
69 nvidia,pins = "sdmmc3_clk_pa6";
70 nvidia,function = "sdmmc3";
71 nvidia,pull = <0>;
72 nvidia,tristate = <0>;
73 };
74 sdmmc3_cmd_pa7 {
75 nvidia,pins = "sdmmc3_cmd_pa7",
76 "sdmmc3_dat0_pb7",
77 "sdmmc3_dat1_pb6",
78 "sdmmc3_dat2_pb5",
79 "sdmmc3_dat3_pb4";
80 nvidia,function = "sdmmc3";
81 nvidia,pull = <2>;
82 nvidia,tristate = <0>;
83 };
84 sdmmc4_clk_pcc4 {
85 nvidia,pins = "sdmmc4_clk_pcc4",
86 "sdmmc4_rst_n_pcc3";
87 nvidia,function = "sdmmc4";
88 nvidia,pull = <0>;
89 nvidia,tristate = <0>;
90 };
91 sdmmc4_dat0_paa0 {
92 nvidia,pins = "sdmmc4_dat0_paa0",
93 "sdmmc4_dat1_paa1",
94 "sdmmc4_dat2_paa2",
95 "sdmmc4_dat3_paa3",
96 "sdmmc4_dat4_paa4",
97 "sdmmc4_dat5_paa5",
98 "sdmmc4_dat6_paa6",
99 "sdmmc4_dat7_paa7";
100 nvidia,function = "sdmmc4";
101 nvidia,pull = <2>;
102 nvidia,tristate = <0>;
103 };
104 dap2_fs_pa2 {
105 nvidia,pins = "dap2_fs_pa2",
106 "dap2_sclk_pa3",
107 "dap2_din_pa4",
108 "dap2_dout_pa5";
109 nvidia,function = "i2s1";
110 nvidia,pull = <0>;
111 nvidia,tristate = <0>;
112 };
113 sdio3 {
114 nvidia,pins = "drive_sdio3";
115 nvidia,high-speed-mode = <0>;
116 nvidia,schmitt = <0>;
117 nvidia,pull-down-strength = <46>;
118 nvidia,pull-up-strength = <42>;
119 nvidia,slew-rate-rising = <1>;
120 nvidia,slew-rate-falling = <1>;
121 };
122 };
123 };
124
125 serial@70006000 {
126 status = "okay";
Bryan Wud7df69f2013-01-02 15:53:51 -0800127 };
128
129 i2c@7000c000 {
130 status = "okay";
131 clock-frequency = <100000>;
132 };
133
134 i2c@7000c400 {
135 status = "okay";
136 clock-frequency = <100000>;
137 };
138
139 i2c@7000c500 {
140 status = "okay";
141 clock-frequency = <100000>;
142 };
143
Thierry Reding9bd80b42013-08-12 17:49:03 +0200144 hdmiddc: i2c@7000c700 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800145 status = "okay";
146 clock-frequency = <100000>;
147 };
148
149 i2c@7000d000 {
150 status = "okay";
151 clock-frequency = <100000>;
152
Stephen Warren23037bb2013-03-27 16:53:20 -0600153 rt5640: rt5640 {
154 compatible = "realtek,rt5640";
155 reg = <0x1c>;
156 interrupt-parent = <&gpio>;
157 interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
158 realtek,ldo1-en-gpios =
159 <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
160 };
161
Bryan Wud7df69f2013-01-02 15:53:51 -0800162 tps62361 {
163 compatible = "ti,tps62361";
164 reg = <0x60>;
165
166 regulator-name = "tps62361-vout";
167 regulator-min-microvolt = <500000>;
168 regulator-max-microvolt = <1500000>;
169 regulator-boot-on;
170 regulator-always-on;
171 ti,vsel0-state-high;
172 ti,vsel1-state-high;
173 };
174
175 pmic: tps65911@2d {
176 compatible = "ti,tps65911";
177 reg = <0x2d>;
178
Stephen Warren6cecf912013-02-13 12:51:51 -0700179 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800180 #interrupt-cells = <2>;
181 interrupt-controller;
182
183 ti,system-power-controller;
184
185 #gpio-cells = <2>;
186 gpio-controller;
187
188 vcc1-supply = <&vdd_5v_in_reg>;
189 vcc2-supply = <&vdd_5v_in_reg>;
190 vcc3-supply = <&vio_reg>;
191 vcc4-supply = <&vdd_5v_in_reg>;
192 vcc5-supply = <&vdd_5v_in_reg>;
193 vcc6-supply = <&vdd2_reg>;
194 vcc7-supply = <&vdd_5v_in_reg>;
195 vccio-supply = <&vdd_5v_in_reg>;
196
197 regulators {
198 #address-cells = <1>;
199 #size-cells = <0>;
200
201 vdd1_reg: vdd1 {
202 regulator-name = "vddio_ddr_1v2";
203 regulator-min-microvolt = <1200000>;
204 regulator-max-microvolt = <1200000>;
205 regulator-always-on;
206 };
207
208 vdd2_reg: vdd2 {
209 regulator-name = "vdd_1v5_gen";
210 regulator-min-microvolt = <1500000>;
211 regulator-max-microvolt = <1500000>;
212 regulator-always-on;
213 };
214
215 vddctrl_reg: vddctrl {
216 regulator-name = "vdd_cpu,vdd_sys";
217 regulator-min-microvolt = <1000000>;
218 regulator-max-microvolt = <1000000>;
219 regulator-always-on;
220 };
221
222 vio_reg: vio {
223 regulator-name = "vdd_1v8_gen";
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <1800000>;
226 regulator-always-on;
227 };
228
229 ldo1_reg: ldo1 {
230 regulator-name = "vdd_pexa,vdd_pexb";
231 regulator-min-microvolt = <1050000>;
232 regulator-max-microvolt = <1050000>;
233 };
234
235 ldo2_reg: ldo2 {
236 regulator-name = "vdd_sata,avdd_plle";
237 regulator-min-microvolt = <1050000>;
238 regulator-max-microvolt = <1050000>;
239 };
240
241 /* LDO3 is not connected to anything */
242
243 ldo4_reg: ldo4 {
244 regulator-name = "vdd_rtc";
245 regulator-min-microvolt = <1200000>;
246 regulator-max-microvolt = <1200000>;
247 regulator-always-on;
248 };
249
250 ldo5_reg: ldo5 {
251 regulator-name = "vddio_sdmmc,avdd_vdac";
252 regulator-min-microvolt = <3300000>;
253 regulator-max-microvolt = <3300000>;
254 regulator-always-on;
255 };
256
257 ldo6_reg: ldo6 {
258 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
259 regulator-min-microvolt = <1200000>;
260 regulator-max-microvolt = <1200000>;
261 };
262
263 ldo7_reg: ldo7 {
264 regulator-name = "vdd_pllm,x,u,a_p_c_s";
265 regulator-min-microvolt = <1200000>;
266 regulator-max-microvolt = <1200000>;
267 regulator-always-on;
268 };
269
270 ldo8_reg: ldo8 {
271 regulator-name = "vdd_ddr_hs";
272 regulator-min-microvolt = <1000000>;
273 regulator-max-microvolt = <1000000>;
274 regulator-always-on;
275 };
276 };
277 };
278 };
279
280 spi@7000da00 {
281 status = "okay";
282 spi-max-frequency = <25000000>;
283 spi-flash@1 {
284 compatible = "winbond,w25q32";
285 reg = <1>;
286 spi-max-frequency = <20000000>;
287 };
288 };
289
290 ahub {
291 i2s@70080400 {
292 status = "okay";
293 };
294 };
295
296 pmc {
297 status = "okay";
298 nvidia,invert-interrupt;
Joseph Lo47d2d632013-08-12 17:40:07 +0800299 nvidia,suspend-mode = <1>;
Joseph Loa44a0192013-04-03 19:31:52 +0800300 nvidia,cpu-pwr-good-time = <2000>;
301 nvidia,cpu-pwr-off-time = <200>;
302 nvidia,core-pwr-good-time = <3845 3845>;
303 nvidia,core-pwr-off-time = <0>;
304 nvidia,core-power-req-active-high;
305 nvidia,sys-clock-req-active-high;
Bryan Wud7df69f2013-01-02 15:53:51 -0800306 };
307
308 sdhci@78000000 {
309 status = "okay";
Stephen Warren3325f1b2013-02-12 17:25:15 -0700310 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
311 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
312 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800313 bus-width = <4>;
314 };
315
316 sdhci@78000600 {
317 status = "okay";
318 bus-width = <8>;
Joseph Lo7a2617a2013-04-03 14:34:39 -0600319 non-removable;
Bryan Wud7df69f2013-01-02 15:53:51 -0800320 };
321
Joseph Lo7021d122013-04-03 19:31:27 +0800322 clocks {
323 compatible = "simple-bus";
324 #address-cells = <1>;
325 #size-cells = <0>;
326
327 clk32k_in: clock {
328 compatible = "fixed-clock";
329 reg=<0>;
330 #clock-cells = <0>;
331 clock-frequency = <32768>;
332 };
333 };
334
Bryan Wud7df69f2013-01-02 15:53:51 -0800335 regulators {
336 compatible = "simple-bus";
337 #address-cells = <1>;
338 #size-cells = <0>;
339
340 vdd_5v_in_reg: regulator@0 {
341 compatible = "regulator-fixed";
342 reg = <0>;
343 regulator-name = "vdd_5v_in";
344 regulator-min-microvolt = <5000000>;
345 regulator-max-microvolt = <5000000>;
346 regulator-always-on;
347 };
348
349 chargepump_5v_reg: regulator@1 {
350 compatible = "regulator-fixed";
351 reg = <1>;
352 regulator-name = "chargepump_5v";
353 regulator-min-microvolt = <5000000>;
354 regulator-max-microvolt = <5000000>;
355 regulator-boot-on;
356 regulator-always-on;
357 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700358 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800359 };
360
361 ddr_reg: regulator@2 {
362 compatible = "regulator-fixed";
363 reg = <2>;
364 regulator-name = "vdd_ddr";
365 regulator-min-microvolt = <1500000>;
366 regulator-max-microvolt = <1500000>;
367 regulator-always-on;
368 regulator-boot-on;
369 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700370 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800371 vin-supply = <&vdd_5v_in_reg>;
372 };
373
374 vdd_5v_sata_reg: regulator@3 {
375 compatible = "regulator-fixed";
376 reg = <3>;
377 regulator-name = "vdd_5v_sata";
378 regulator-min-microvolt = <5000000>;
379 regulator-max-microvolt = <5000000>;
380 regulator-always-on;
381 regulator-boot-on;
382 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700383 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800384 vin-supply = <&vdd_5v_in_reg>;
385 };
386
387 usb1_vbus_reg: regulator@4 {
388 compatible = "regulator-fixed";
389 reg = <4>;
390 regulator-name = "usb1_vbus";
391 regulator-min-microvolt = <5000000>;
392 regulator-max-microvolt = <5000000>;
393 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700394 gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800395 gpio-open-drain;
396 vin-supply = <&vdd_5v_in_reg>;
397 };
398
399 usb3_vbus_reg: regulator@5 {
400 compatible = "regulator-fixed";
401 reg = <5>;
402 regulator-name = "usb3_vbus";
403 regulator-min-microvolt = <5000000>;
404 regulator-max-microvolt = <5000000>;
405 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700406 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800407 gpio-open-drain;
408 vin-supply = <&vdd_5v_in_reg>;
409 };
410
411 sys_3v3_reg: regulator@6 {
412 compatible = "regulator-fixed";
413 reg = <6>;
414 regulator-name = "sys_3v3,vdd_3v3_alw";
415 regulator-min-microvolt = <3300000>;
416 regulator-max-microvolt = <3300000>;
417 regulator-always-on;
418 regulator-boot-on;
419 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700420 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800421 vin-supply = <&vdd_5v_in_reg>;
422 };
423
424 sys_3v3_pexs_reg: regulator@7 {
425 compatible = "regulator-fixed";
426 reg = <7>;
427 regulator-name = "sys_3v3_pexs";
428 regulator-min-microvolt = <3300000>;
429 regulator-max-microvolt = <3300000>;
430 regulator-always-on;
431 regulator-boot-on;
432 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700433 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800434 vin-supply = <&sys_3v3_reg>;
435 };
436 };
Eric Browerb4dd3e02013-05-10 14:40:29 +0000437
438 gpio-leds {
439 compatible = "gpio-leds";
440
441 gpled1 {
442 label = "LED1"; /* CR5A1 (blue) */
Stephen Warren3325f1b2013-02-12 17:25:15 -0700443 gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
Eric Browerb4dd3e02013-05-10 14:40:29 +0000444 };
445 gpled2 {
446 label = "LED2"; /* CR4A2 (green) */
Stephen Warren3325f1b2013-02-12 17:25:15 -0700447 gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
Eric Browerb4dd3e02013-05-10 14:40:29 +0000448 };
449 };
Stephen Warren23037bb2013-03-27 16:53:20 -0600450
451 sound {
452 compatible = "nvidia,tegra-audio-rt5640-beaver",
453 "nvidia,tegra-audio-rt5640";
454 nvidia,model = "NVIDIA Tegra Beaver";
455
456 nvidia,audio-routing =
457 "Headphones", "HPOR",
458 "Headphones", "HPOL";
459
460 nvidia,i2s-controller = <&tegra_i2s1>;
461 nvidia,audio-codec = <&rt5640>;
462
463 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
464
465 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
466 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
467 <&tegra_car TEGRA30_CLK_EXTERN1>;
468 clock-names = "pll_a", "pll_a_out0", "mclk";
469 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800470};