Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 1 | #ifndef _SPARC64_PAGE_H |
| 2 | #define _SPARC64_PAGE_H |
| 3 | |
| 4 | #include <linux/const.h> |
| 5 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 6 | #define PAGE_SHIFT 13 |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 7 | |
| 8 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) |
| 9 | #define PAGE_MASK (~(PAGE_SIZE-1)) |
| 10 | |
| 11 | /* Flushing for D-cache alias handling is only needed if |
| 12 | * the page size is smaller than 16K. |
| 13 | */ |
| 14 | #if PAGE_SHIFT < 14 |
| 15 | #define DCACHE_ALIASING_POSSIBLE |
| 16 | #endif |
| 17 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 18 | #define HPAGE_SHIFT 22 |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 19 | |
David Miller | 9e695d2 | 2012-10-08 16:34:29 -0700 | [diff] [blame] | 20 | #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 21 | #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) |
| 22 | #define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) |
| 23 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) |
| 24 | #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA |
| 25 | #endif |
| 26 | |
| 27 | #ifndef __ASSEMBLY__ |
| 28 | |
David Miller | 9e695d2 | 2012-10-08 16:34:29 -0700 | [diff] [blame] | 29 | #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) |
David S. Miller | 0fbebed | 2013-02-19 22:34:10 -0800 | [diff] [blame] | 30 | struct pt_regs; |
| 31 | extern void hugetlb_setup(struct pt_regs *regs); |
David Miller | 9e695d2 | 2012-10-08 16:34:29 -0700 | [diff] [blame] | 32 | #endif |
| 33 | |
David S. Miller | b0f1e79 | 2008-09-11 23:36:32 -0700 | [diff] [blame] | 34 | #define WANT_PAGE_VIRTUAL |
| 35 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 36 | extern void _clear_page(void *page); |
| 37 | #define clear_page(X) _clear_page((void *)(X)) |
| 38 | struct page; |
| 39 | extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); |
| 40 | #define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) |
| 41 | extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); |
| 42 | |
| 43 | /* Unlike sparc32, sparc64's parameter passing API is more |
| 44 | * sane in that structures which as small enough are passed |
| 45 | * in registers instead of on the stack. Thus, setting |
| 46 | * STRICT_MM_TYPECHECKS does not generate worse code so |
| 47 | * let's enable it to get the type checking. |
| 48 | */ |
| 49 | |
| 50 | #define STRICT_MM_TYPECHECKS |
| 51 | |
| 52 | #ifdef STRICT_MM_TYPECHECKS |
| 53 | /* These are used to make use of C type-checking.. */ |
| 54 | typedef struct { unsigned long pte; } pte_t; |
| 55 | typedef struct { unsigned long iopte; } iopte_t; |
| 56 | typedef struct { unsigned int pmd; } pmd_t; |
| 57 | typedef struct { unsigned int pgd; } pgd_t; |
| 58 | typedef struct { unsigned long pgprot; } pgprot_t; |
| 59 | |
| 60 | #define pte_val(x) ((x).pte) |
| 61 | #define iopte_val(x) ((x).iopte) |
| 62 | #define pmd_val(x) ((x).pmd) |
| 63 | #define pgd_val(x) ((x).pgd) |
| 64 | #define pgprot_val(x) ((x).pgprot) |
| 65 | |
| 66 | #define __pte(x) ((pte_t) { (x) } ) |
| 67 | #define __iopte(x) ((iopte_t) { (x) } ) |
| 68 | #define __pmd(x) ((pmd_t) { (x) } ) |
| 69 | #define __pgd(x) ((pgd_t) { (x) } ) |
| 70 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
| 71 | |
| 72 | #else |
| 73 | /* .. while these make it easier on the compiler */ |
| 74 | typedef unsigned long pte_t; |
| 75 | typedef unsigned long iopte_t; |
| 76 | typedef unsigned int pmd_t; |
| 77 | typedef unsigned int pgd_t; |
| 78 | typedef unsigned long pgprot_t; |
| 79 | |
| 80 | #define pte_val(x) (x) |
| 81 | #define iopte_val(x) (x) |
| 82 | #define pmd_val(x) (x) |
| 83 | #define pgd_val(x) (x) |
| 84 | #define pgprot_val(x) (x) |
| 85 | |
| 86 | #define __pte(x) (x) |
| 87 | #define __iopte(x) (x) |
| 88 | #define __pmd(x) (x) |
| 89 | #define __pgd(x) (x) |
| 90 | #define __pgprot(x) (x) |
| 91 | |
| 92 | #endif /* (STRICT_MM_TYPECHECKS) */ |
| 93 | |
David Miller | c460bec | 2012-10-08 16:34:22 -0700 | [diff] [blame] | 94 | typedef pte_t *pgtable_t; |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 95 | |
David S. Miller | c920745 | 2013-09-18 11:58:32 -0700 | [diff] [blame] | 96 | /* These two values define the virtual address space range in which we |
| 97 | * must forbid 64-bit user processes from making mappings. It |
| 98 | * represents the virtual address space hole present in most early |
| 99 | * sparc64 chips including UltraSPARC-I. The next two defines specify |
| 100 | * the actual exclusion region we enforce, wherein we use a 4GB red |
| 101 | * zone on each side of the VA hole. |
| 102 | */ |
| 103 | #define SPARC64_VA_HOLE_TOP _AC(0xfffff80000000000,UL) |
| 104 | #define SPARC64_VA_HOLE_BOTTOM _AC(0x0000080000000000,UL) |
| 105 | |
| 106 | #define VA_EXCLUDE_START (SPARC64_VA_HOLE_BOTTOM - (1UL << 32UL)) |
| 107 | #define VA_EXCLUDE_END (SPARC64_VA_HOLE_TOP + (1UL << 32UL)) |
| 108 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 109 | #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ |
David S. Miller | c920745 | 2013-09-18 11:58:32 -0700 | [diff] [blame] | 110 | _AC(0x0000000070000000,UL) : \ |
| 111 | VA_EXCLUDE_END) |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 112 | |
| 113 | #include <asm-generic/memory_model.h> |
| 114 | |
| 115 | #endif /* !(__ASSEMBLY__) */ |
| 116 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 117 | /* We used to stick this into a hard-coded global register (%g4) |
| 118 | * but that does not make sense anymore. |
| 119 | */ |
David S. Miller | e0a45e3 | 2013-09-18 14:22:34 -0700 | [diff] [blame] | 120 | #define MAX_SUPPORTED_PA_BITS 43 |
| 121 | #define PAGE_OFFSET_BY_BITS(X) (-(_AC(1,UL) << (X))) |
| 122 | #define PAGE_OFFSET PAGE_OFFSET_BY_BITS(MAX_SUPPORTED_PA_BITS) |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 123 | |
David S. Miller | bb7b435 | 2013-09-18 15:39:06 -0700 | [diff] [blame^] | 124 | /* The "virtual" portion of PAGE_OFFSET, used to clip off the non-physical |
| 125 | * bits of a linear kernel address. |
| 126 | */ |
| 127 | #define PAGE_OFFSET_VA_BITS (64 - MAX_SUPPORTED_PA_BITS) |
| 128 | |
| 129 | /* The actual number of physical memory address bits we support, this is |
| 130 | * used to size various tables used to manage kernel TLB misses. |
| 131 | */ |
| 132 | #define MAX_PHYS_ADDRESS_BITS 41 |
| 133 | |
| 134 | /* These two shift counts are used when indexing sparc64_valid_addr_bitmap |
| 135 | * and kpte_linear_bitmap. |
| 136 | */ |
| 137 | #define ILOG2_4MB 22 |
| 138 | #define ILOG2_256MB 28 |
| 139 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 140 | #ifndef __ASSEMBLY__ |
| 141 | |
| 142 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) |
| 143 | #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) |
| 144 | |
| 145 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
| 146 | |
| 147 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) |
| 148 | |
| 149 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) |
| 150 | |
| 151 | #define virt_to_phys __pa |
| 152 | #define phys_to_virt __va |
| 153 | |
| 154 | #endif /* !(__ASSEMBLY__) */ |
| 155 | |
| 156 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ |
| 157 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) |
| 158 | |
Arnd Bergmann | 5b17e1c | 2009-05-13 22:56:30 +0000 | [diff] [blame] | 159 | #include <asm-generic/getorder.h> |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 160 | |
| 161 | #endif /* _SPARC64_PAGE_H */ |