Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/include/asm/uaccess.h |
| 3 | * |
| 4 | * Copyright (C) 2012 ARM Ltd. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | #ifndef __ASM_UACCESS_H |
| 19 | #define __ASM_UACCESS_H |
| 20 | |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 21 | #include <asm/alternative.h> |
| 22 | #include <asm/sysreg.h> |
| 23 | |
| 24 | #ifndef __ASSEMBLY__ |
| 25 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 26 | /* |
| 27 | * User space memory access functions |
| 28 | */ |
Andre Przywara | 87261d1 | 2016-10-19 14:40:54 +0100 | [diff] [blame] | 29 | #include <linux/bitops.h> |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 30 | #include <linux/kasan-checks.h> |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 31 | #include <linux/string.h> |
| 32 | #include <linux/thread_info.h> |
| 33 | |
James Morse | 338d4f4 | 2015-07-22 19:05:54 +0100 | [diff] [blame] | 34 | #include <asm/cpufeature.h> |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 35 | #include <asm/ptrace.h> |
| 36 | #include <asm/errno.h> |
| 37 | #include <asm/memory.h> |
| 38 | #include <asm/compiler.h> |
| 39 | |
| 40 | #define VERIFY_READ 0 |
| 41 | #define VERIFY_WRITE 1 |
| 42 | |
| 43 | /* |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 44 | * The exception table consists of pairs of relative offsets: the first |
| 45 | * is the relative offset to an instruction that is allowed to fault, |
| 46 | * and the second is the relative offset at which the program should |
| 47 | * continue. No registers are modified, so it is entirely up to the |
| 48 | * continuation code to figure out what to do. |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 49 | * |
| 50 | * All the routines below use bits of fixup code that are out of line |
| 51 | * with the main instruction path. This means when everything is well, |
| 52 | * we don't even have to jump over them. Further, they do not intrude |
| 53 | * on our cache or tlb entries. |
| 54 | */ |
| 55 | |
| 56 | struct exception_table_entry |
| 57 | { |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 58 | int insn, fixup; |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 59 | }; |
| 60 | |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 61 | #define ARCH_HAS_RELATIVE_EXTABLE |
| 62 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 63 | extern int fixup_exception(struct pt_regs *regs); |
| 64 | |
| 65 | #define KERNEL_DS (-1UL) |
| 66 | #define get_ds() (KERNEL_DS) |
| 67 | |
| 68 | #define USER_DS TASK_SIZE_64 |
| 69 | #define get_fs() (current_thread_info()->addr_limit) |
| 70 | |
| 71 | static inline void set_fs(mm_segment_t fs) |
| 72 | { |
| 73 | current_thread_info()->addr_limit = fs; |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 74 | |
| 75 | /* |
| 76 | * Enable/disable UAO so that copy_to_user() etc can access |
| 77 | * kernel memory with the unprivileged instructions. |
| 78 | */ |
| 79 | if (IS_ENABLED(CONFIG_ARM64_UAO) && fs == KERNEL_DS) |
| 80 | asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO)); |
| 81 | else |
| 82 | asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO, |
| 83 | CONFIG_ARM64_UAO)); |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 84 | } |
| 85 | |
Michael S. Tsirkin | 967f0e5 | 2015-01-06 15:11:13 +0200 | [diff] [blame] | 86 | #define segment_eq(a, b) ((a) == (b)) |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 87 | |
| 88 | /* |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 89 | * Test whether a block of memory is a valid user space address. |
| 90 | * Returns 1 if the range is valid, 0 otherwise. |
| 91 | * |
| 92 | * This is equivalent to the following test: |
Christopher Covington | 31b1e94 | 2014-03-19 16:29:37 +0000 | [diff] [blame] | 93 | * (u65)addr + (u65)size <= current->addr_limit |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 94 | * |
| 95 | * This needs 65-bit arithmetic. |
| 96 | */ |
| 97 | #define __range_ok(addr, size) \ |
| 98 | ({ \ |
| 99 | unsigned long flag, roksum; \ |
| 100 | __chk_user_ptr(addr); \ |
Christopher Covington | 31b1e94 | 2014-03-19 16:29:37 +0000 | [diff] [blame] | 101 | asm("adds %1, %1, %3; ccmp %1, %4, #2, cc; cset %0, ls" \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 102 | : "=&r" (flag), "=&r" (roksum) \ |
| 103 | : "1" (addr), "Ir" (size), \ |
| 104 | "r" (current_thread_info()->addr_limit) \ |
| 105 | : "cc"); \ |
| 106 | flag; \ |
| 107 | }) |
| 108 | |
Andre Przywara | 87261d1 | 2016-10-19 14:40:54 +0100 | [diff] [blame] | 109 | /* |
| 110 | * When dealing with data aborts or instruction traps we may end up with |
| 111 | * a tagged userland pointer. Clear the tag to get a sane pointer to pass |
| 112 | * on to access_ok(), for instance. |
| 113 | */ |
| 114 | #define untagged_addr(addr) sign_extend64(addr, 55) |
| 115 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 116 | #define access_ok(type, addr, size) __range_ok(addr, size) |
Will Deacon | 12a0ef7 | 2013-11-06 17:20:22 +0000 | [diff] [blame] | 117 | #define user_addr_max get_fs |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 118 | |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 119 | #define _ASM_EXTABLE(from, to) \ |
| 120 | " .pushsection __ex_table, \"a\"\n" \ |
| 121 | " .align 3\n" \ |
| 122 | " .long (" #from " - .), (" #to " - .)\n" \ |
| 123 | " .popsection\n" |
| 124 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 125 | /* |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 126 | * User access enabling/disabling. |
| 127 | */ |
| 128 | #define __uaccess_disable(alt) \ |
| 129 | do { \ |
| 130 | asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \ |
| 131 | CONFIG_ARM64_PAN)); \ |
| 132 | } while (0) |
| 133 | |
| 134 | #define __uaccess_enable(alt) \ |
| 135 | do { \ |
| 136 | asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \ |
| 137 | CONFIG_ARM64_PAN)); \ |
| 138 | } while (0) |
| 139 | |
| 140 | static inline void uaccess_disable(void) |
| 141 | { |
| 142 | __uaccess_disable(ARM64_HAS_PAN); |
| 143 | } |
| 144 | |
| 145 | static inline void uaccess_enable(void) |
| 146 | { |
| 147 | __uaccess_enable(ARM64_HAS_PAN); |
| 148 | } |
| 149 | |
| 150 | /* |
| 151 | * These functions are no-ops when UAO is present. |
| 152 | */ |
| 153 | static inline void uaccess_disable_not_uao(void) |
| 154 | { |
| 155 | __uaccess_disable(ARM64_ALT_PAN_NOT_UAO); |
| 156 | } |
| 157 | |
| 158 | static inline void uaccess_enable_not_uao(void) |
| 159 | { |
| 160 | __uaccess_enable(ARM64_ALT_PAN_NOT_UAO); |
| 161 | } |
| 162 | |
| 163 | /* |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 164 | * The "__xxx" versions of the user access functions do not verify the address |
| 165 | * space - it must have been done previously with a separate "access_ok()" |
| 166 | * call. |
| 167 | * |
| 168 | * The "__xxx_error" versions set the third argument to -EFAULT if an error |
| 169 | * occurs, and leave it unchanged on success. |
| 170 | */ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 171 | #define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 172 | asm volatile( \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 173 | "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \ |
| 174 | alt_instr " " reg "1, [%2]\n", feature) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 175 | "2:\n" \ |
| 176 | " .section .fixup, \"ax\"\n" \ |
| 177 | " .align 2\n" \ |
| 178 | "3: mov %w0, %3\n" \ |
| 179 | " mov %1, #0\n" \ |
| 180 | " b 2b\n" \ |
| 181 | " .previous\n" \ |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 182 | _ASM_EXTABLE(1b, 3b) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 183 | : "+r" (err), "=&r" (x) \ |
| 184 | : "r" (addr), "i" (-EFAULT)) |
| 185 | |
| 186 | #define __get_user_err(x, ptr, err) \ |
| 187 | do { \ |
| 188 | unsigned long __gu_val; \ |
| 189 | __chk_user_ptr(ptr); \ |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 190 | uaccess_enable_not_uao(); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 191 | switch (sizeof(*(ptr))) { \ |
| 192 | case 1: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 193 | __get_user_asm("ldrb", "ldtrb", "%w", __gu_val, (ptr), \ |
| 194 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 195 | break; \ |
| 196 | case 2: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 197 | __get_user_asm("ldrh", "ldtrh", "%w", __gu_val, (ptr), \ |
| 198 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 199 | break; \ |
| 200 | case 4: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 201 | __get_user_asm("ldr", "ldtr", "%w", __gu_val, (ptr), \ |
| 202 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 203 | break; \ |
| 204 | case 8: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 205 | __get_user_asm("ldr", "ldtr", "%", __gu_val, (ptr), \ |
| 206 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 207 | break; \ |
| 208 | default: \ |
| 209 | BUILD_BUG(); \ |
| 210 | } \ |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 211 | uaccess_disable_not_uao(); \ |
Michael S. Tsirkin | 58fff51 | 2014-12-12 01:56:04 +0200 | [diff] [blame] | 212 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 213 | } while (0) |
| 214 | |
| 215 | #define __get_user(x, ptr) \ |
| 216 | ({ \ |
| 217 | int __gu_err = 0; \ |
| 218 | __get_user_err((x), (ptr), __gu_err); \ |
| 219 | __gu_err; \ |
| 220 | }) |
| 221 | |
| 222 | #define __get_user_error(x, ptr, err) \ |
| 223 | ({ \ |
| 224 | __get_user_err((x), (ptr), (err)); \ |
| 225 | (void)0; \ |
| 226 | }) |
| 227 | |
| 228 | #define __get_user_unaligned __get_user |
| 229 | |
| 230 | #define get_user(x, ptr) \ |
| 231 | ({ \ |
AKASHI Takahiro | 1f65c13 | 2013-09-24 10:00:50 +0100 | [diff] [blame] | 232 | __typeof__(*(ptr)) __user *__p = (ptr); \ |
Michael S. Tsirkin | 56d2ef7 | 2013-05-26 17:30:42 +0300 | [diff] [blame] | 233 | might_fault(); \ |
AKASHI Takahiro | 1f65c13 | 2013-09-24 10:00:50 +0100 | [diff] [blame] | 234 | access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \ |
| 235 | __get_user((x), __p) : \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 236 | ((x) = 0, -EFAULT); \ |
| 237 | }) |
| 238 | |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 239 | #define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 240 | asm volatile( \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 241 | "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \ |
| 242 | alt_instr " " reg "1, [%2]\n", feature) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 243 | "2:\n" \ |
| 244 | " .section .fixup,\"ax\"\n" \ |
| 245 | " .align 2\n" \ |
| 246 | "3: mov %w0, %3\n" \ |
| 247 | " b 2b\n" \ |
| 248 | " .previous\n" \ |
Ard Biesheuvel | 6c94f27 | 2016-01-01 15:02:12 +0100 | [diff] [blame] | 249 | _ASM_EXTABLE(1b, 3b) \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 250 | : "+r" (err) \ |
| 251 | : "r" (x), "r" (addr), "i" (-EFAULT)) |
| 252 | |
| 253 | #define __put_user_err(x, ptr, err) \ |
| 254 | do { \ |
| 255 | __typeof__(*(ptr)) __pu_val = (x); \ |
| 256 | __chk_user_ptr(ptr); \ |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 257 | uaccess_enable_not_uao(); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 258 | switch (sizeof(*(ptr))) { \ |
| 259 | case 1: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 260 | __put_user_asm("strb", "sttrb", "%w", __pu_val, (ptr), \ |
| 261 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 262 | break; \ |
| 263 | case 2: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 264 | __put_user_asm("strh", "sttrh", "%w", __pu_val, (ptr), \ |
| 265 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 266 | break; \ |
| 267 | case 4: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 268 | __put_user_asm("str", "sttr", "%w", __pu_val, (ptr), \ |
| 269 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 270 | break; \ |
| 271 | case 8: \ |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 272 | __put_user_asm("str", "sttr", "%", __pu_val, (ptr), \ |
| 273 | (err), ARM64_HAS_UAO); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 274 | break; \ |
| 275 | default: \ |
| 276 | BUILD_BUG(); \ |
| 277 | } \ |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 278 | uaccess_disable_not_uao(); \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 279 | } while (0) |
| 280 | |
| 281 | #define __put_user(x, ptr) \ |
| 282 | ({ \ |
| 283 | int __pu_err = 0; \ |
| 284 | __put_user_err((x), (ptr), __pu_err); \ |
| 285 | __pu_err; \ |
| 286 | }) |
| 287 | |
| 288 | #define __put_user_error(x, ptr, err) \ |
| 289 | ({ \ |
| 290 | __put_user_err((x), (ptr), (err)); \ |
| 291 | (void)0; \ |
| 292 | }) |
| 293 | |
| 294 | #define __put_user_unaligned __put_user |
| 295 | |
| 296 | #define put_user(x, ptr) \ |
| 297 | ({ \ |
AKASHI Takahiro | 1f65c13 | 2013-09-24 10:00:50 +0100 | [diff] [blame] | 298 | __typeof__(*(ptr)) __user *__p = (ptr); \ |
Michael S. Tsirkin | 56d2ef7 | 2013-05-26 17:30:42 +0300 | [diff] [blame] | 299 | might_fault(); \ |
AKASHI Takahiro | 1f65c13 | 2013-09-24 10:00:50 +0100 | [diff] [blame] | 300 | access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \ |
| 301 | __put_user((x), __p) : \ |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 302 | -EFAULT; \ |
| 303 | }) |
| 304 | |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 305 | extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n); |
| 306 | extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n); |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 307 | extern unsigned long __must_check __copy_in_user(void __user *to, const void __user *from, unsigned long n); |
| 308 | extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n); |
| 309 | |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 310 | static inline unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n) |
| 311 | { |
| 312 | kasan_check_write(to, n); |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 313 | check_object_size(to, n, false); |
| 314 | return __arch_copy_from_user(to, from, n); |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 315 | } |
| 316 | |
| 317 | static inline unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n) |
| 318 | { |
| 319 | kasan_check_read(from, n); |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 320 | check_object_size(from, n, true); |
| 321 | return __arch_copy_to_user(to, from, n); |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 322 | } |
| 323 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 324 | static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) |
| 325 | { |
Al Viro | 4855bd2 | 2016-09-10 16:50:00 -0400 | [diff] [blame] | 326 | unsigned long res = n; |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 327 | kasan_check_write(to, n); |
| 328 | |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 329 | if (access_ok(VERIFY_READ, from, n)) { |
| 330 | check_object_size(to, n, false); |
Al Viro | 4855bd2 | 2016-09-10 16:50:00 -0400 | [diff] [blame] | 331 | res = __arch_copy_from_user(to, from, n); |
| 332 | } |
| 333 | if (unlikely(res)) |
| 334 | memset(to + (n - res), 0, res); |
| 335 | return res; |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n) |
| 339 | { |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 340 | kasan_check_read(from, n); |
| 341 | |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 342 | if (access_ok(VERIFY_WRITE, to, n)) { |
| 343 | check_object_size(from, n, true); |
Yang Shi | bffe1ba | 2016-06-08 14:40:56 -0700 | [diff] [blame] | 344 | n = __arch_copy_to_user(to, from, n); |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 345 | } |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 346 | return n; |
| 347 | } |
| 348 | |
| 349 | static inline unsigned long __must_check copy_in_user(void __user *to, const void __user *from, unsigned long n) |
| 350 | { |
| 351 | if (access_ok(VERIFY_READ, from, n) && access_ok(VERIFY_WRITE, to, n)) |
| 352 | n = __copy_in_user(to, from, n); |
| 353 | return n; |
| 354 | } |
| 355 | |
| 356 | #define __copy_to_user_inatomic __copy_to_user |
| 357 | #define __copy_from_user_inatomic __copy_from_user |
| 358 | |
| 359 | static inline unsigned long __must_check clear_user(void __user *to, unsigned long n) |
| 360 | { |
| 361 | if (access_ok(VERIFY_WRITE, to, n)) |
| 362 | n = __clear_user(to, n); |
| 363 | return n; |
| 364 | } |
| 365 | |
Will Deacon | 12a0ef7 | 2013-11-06 17:20:22 +0000 | [diff] [blame] | 366 | extern long strncpy_from_user(char *dest, const char __user *src, long count); |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 367 | |
Will Deacon | 12a0ef7 | 2013-11-06 17:20:22 +0000 | [diff] [blame] | 368 | extern __must_check long strlen_user(const char __user *str); |
| 369 | extern __must_check long strnlen_user(const char __user *str, long n); |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 370 | |
Catalin Marinas | bd38967 | 2016-07-01 14:58:21 +0100 | [diff] [blame^] | 371 | #else /* __ASSEMBLY__ */ |
| 372 | |
| 373 | #include <asm/assembler.h> |
| 374 | |
| 375 | /* |
| 376 | * User access enabling/disabling macros. These are no-ops when UAO is |
| 377 | * present. |
| 378 | */ |
| 379 | .macro uaccess_disable_not_uao, tmp1 |
| 380 | alternative_if ARM64_ALT_PAN_NOT_UAO |
| 381 | SET_PSTATE_PAN(1) |
| 382 | alternative_else_nop_endif |
| 383 | .endm |
| 384 | |
| 385 | .macro uaccess_enable_not_uao, tmp1, tmp2 |
| 386 | alternative_if ARM64_ALT_PAN_NOT_UAO |
| 387 | SET_PSTATE_PAN(0) |
| 388 | alternative_else_nop_endif |
| 389 | .endm |
| 390 | |
| 391 | #endif /* __ASSEMBLY__ */ |
| 392 | |
Catalin Marinas | 0aea86a | 2012-03-05 11:49:32 +0000 | [diff] [blame] | 393 | #endif /* __ASM_UACCESS_H */ |