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Viresh Kumarf56aad12016-03-30 13:45:26 +05301/*
2 * Copyright (C) 2016 Linaro.
3 * Viresh Kumar <viresh.kumar@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/err.h>
11#include <linux/of.h>
Viresh Kumaredeec422017-08-16 11:07:27 +053012#include <linux/of_device.h>
Viresh Kumarf56aad12016-03-30 13:45:26 +053013#include <linux/platform_device.h>
14
Viresh Kumar297a6622016-09-09 16:48:08 +053015#include "cpufreq-dt.h"
16
Viresh Kumaredeec422017-08-16 11:07:27 +053017/*
18 * Machines for which the cpufreq device is *always* created, mostly used for
19 * platforms using "operating-points" (V1) property.
20 */
21static const struct of_device_id whitelist[] __initconst = {
Viresh Kumar117d4f52016-04-22 16:58:45 +053022 { .compatible = "allwinner,sun4i-a10", },
23 { .compatible = "allwinner,sun5i-a10s", },
24 { .compatible = "allwinner,sun5i-a13", },
25 { .compatible = "allwinner,sun5i-r8", },
26 { .compatible = "allwinner,sun6i-a31", },
27 { .compatible = "allwinner,sun6i-a31s", },
28 { .compatible = "allwinner,sun7i-a20", },
29 { .compatible = "allwinner,sun8i-a23", },
Viresh Kumar117d4f52016-04-22 16:58:45 +053030 { .compatible = "allwinner,sun8i-a83t", },
31 { .compatible = "allwinner,sun8i-h3", },
32
Hoan Trane11b6292016-12-15 14:55:00 -080033 { .compatible = "apm,xgene-shadowcat", },
34
Linus Walleij650ec6c2016-10-25 09:21:24 +020035 { .compatible = "arm,integrator-ap", },
36 { .compatible = "arm,integrator-cp", },
37
Tao Wanga0df7732017-05-23 16:13:18 +080038 { .compatible = "hisilicon,hi3660", },
Viresh Kumar3920be42016-04-22 16:58:47 +053039
Viresh Kumar7ead83f2016-04-22 16:58:41 +053040 { .compatible = "fsl,imx27", },
41 { .compatible = "fsl,imx51", },
42 { .compatible = "fsl,imx53", },
43 { .compatible = "fsl,imx7d", },
44
Viresh Kumara59511d2016-04-22 16:58:40 +053045 { .compatible = "marvell,berlin", },
Robert Jarzmikdcd2ea42016-10-31 20:54:53 +010046 { .compatible = "marvell,pxa250", },
47 { .compatible = "marvell,pxa270", },
Viresh Kumara59511d2016-04-22 16:58:40 +053048
Viresh Kumar2249c002016-03-30 13:45:28 +053049 { .compatible = "samsung,exynos3250", },
50 { .compatible = "samsung,exynos4210", },
Viresh Kumar2249c002016-03-30 13:45:28 +053051 { .compatible = "samsung,exynos5250", },
52#ifndef CONFIG_BL_SWITCHER
Viresh Kumar2249c002016-03-30 13:45:28 +053053 { .compatible = "samsung,exynos5800", },
54#endif
Viresh Kumar7694ca62016-04-22 16:58:42 +053055
Viresh Kumara399dc92016-04-22 16:58:44 +053056 { .compatible = "renesas,emev2", },
57 { .compatible = "renesas,r7s72100", },
58 { .compatible = "renesas,r8a73a4", },
59 { .compatible = "renesas,r8a7740", },
Geert Uytterhoevenf0da8982016-11-16 11:05:51 +010060 { .compatible = "renesas,r8a7743", },
61 { .compatible = "renesas,r8a7745", },
Viresh Kumara399dc92016-04-22 16:58:44 +053062 { .compatible = "renesas,r8a7778", },
63 { .compatible = "renesas,r8a7779", },
64 { .compatible = "renesas,r8a7790", },
65 { .compatible = "renesas,r8a7791", },
Geert Uytterhoevenffdf8b82016-09-06 14:18:20 +020066 { .compatible = "renesas,r8a7792", },
Viresh Kumara399dc92016-04-22 16:58:44 +053067 { .compatible = "renesas,r8a7793", },
68 { .compatible = "renesas,r8a7794", },
Khiem Nguyen034def52017-08-04 15:18:00 +020069 { .compatible = "renesas,r8a7795", },
Khiem Nguyenbea2ebc2017-08-11 17:36:57 +020070 { .compatible = "renesas,r8a7796", },
Viresh Kumara399dc92016-04-22 16:58:44 +053071 { .compatible = "renesas,sh73a0", },
72
Finley Xiao014400c2016-04-22 16:58:43 +053073 { .compatible = "rockchip,rk2928", },
74 { .compatible = "rockchip,rk3036", },
75 { .compatible = "rockchip,rk3066a", },
76 { .compatible = "rockchip,rk3066b", },
77 { .compatible = "rockchip,rk3188", },
78 { .compatible = "rockchip,rk3228", },
79 { .compatible = "rockchip,rk3288", },
Finley Xiao319af402017-08-04 09:52:31 +080080 { .compatible = "rockchip,rk3328", },
Finley Xiao014400c2016-04-22 16:58:43 +053081 { .compatible = "rockchip,rk3366", },
82 { .compatible = "rockchip,rk3368", },
83 { .compatible = "rockchip,rk3399", },
84
Linus Walleijff6c3492017-08-16 10:19:12 +020085 { .compatible = "st-ericsson,u8500", },
86 { .compatible = "st-ericsson,u8540", },
87 { .compatible = "st-ericsson,u9500", },
88 { .compatible = "st-ericsson,u9540", },
89
Viresh Kumar7694ca62016-04-22 16:58:42 +053090 { .compatible = "ti,omap2", },
91 { .compatible = "ti,omap3", },
92 { .compatible = "ti,omap4", },
93 { .compatible = "ti,omap5", },
Viresh Kumar5e4249c2016-04-22 16:58:46 +053094
95 { .compatible = "xlnx,zynq-7000", },
Shubhrajyoti Dattaa5685782017-07-13 11:19:10 +020096 { .compatible = "xlnx,zynqmp", },
Wei Yongjunbd37e022016-08-21 15:41:44 +000097
98 { }
Viresh Kumarf56aad12016-03-30 13:45:26 +053099};
100
Viresh Kumaredeec422017-08-16 11:07:27 +0530101/*
102 * Machines for which the cpufreq device is *not* created, mostly used for
103 * platforms using "operating-points-v2" property.
104 */
105static const struct of_device_id blacklist[] __initconst = {
Viresh Kumarff768982017-09-19 08:23:22 -0700106 { .compatible = "calxeda,highbank", },
107 { .compatible = "calxeda,ecx-2000", },
108
109 { .compatible = "marvell,armadaxp", },
110
111 { .compatible = "nvidia,tegra124", },
112
113 { .compatible = "st,stih407", },
114 { .compatible = "st,stih410", },
115
116 { .compatible = "sigma,tango4", },
117
Suniel Maheshd477bf32017-09-21 19:09:03 +0530118 { .compatible = "ti,am33xx", },
119 { .compatible = "ti,am43", },
120 { .compatible = "ti,dra7", },
121
Viresh Kumaredeec422017-08-16 11:07:27 +0530122 { }
123};
124
125static bool __init cpu0_node_has_opp_v2_prop(void)
126{
127 struct device_node *np = of_cpu_device_node_get(0);
128 bool ret = false;
129
130 if (of_get_property(np, "operating-points-v2", NULL))
131 ret = true;
132
133 of_node_put(np);
134 return ret;
135}
136
Viresh Kumarf56aad12016-03-30 13:45:26 +0530137static int __init cpufreq_dt_platdev_init(void)
138{
139 struct device_node *np = of_find_node_by_path("/");
Masahiro Yamadaca5eda52016-06-27 14:50:13 +0900140 const struct of_device_id *match;
Viresh Kumaredeec422017-08-16 11:07:27 +0530141 const void *data = NULL;
Viresh Kumarf56aad12016-03-30 13:45:26 +0530142
143 if (!np)
144 return -ENODEV;
145
Viresh Kumaredeec422017-08-16 11:07:27 +0530146 match = of_match_node(whitelist, np);
147 if (match) {
148 data = match->data;
149 goto create_pdev;
150 }
Viresh Kumarf56aad12016-03-30 13:45:26 +0530151
Viresh Kumaredeec422017-08-16 11:07:27 +0530152 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
153 goto create_pdev;
154
155 of_node_put(np);
156 return -ENODEV;
157
158create_pdev:
159 of_node_put(np);
Viresh Kumar297a6622016-09-09 16:48:08 +0530160 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
Viresh Kumaredeec422017-08-16 11:07:27 +0530161 -1, data,
Viresh Kumar297a6622016-09-09 16:48:08 +0530162 sizeof(struct cpufreq_dt_platform_data)));
Viresh Kumarf56aad12016-03-30 13:45:26 +0530163}
164device_initcall(cpufreq_dt_platdev_init);