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Andrew Victor8fc5ffa2006-06-29 16:06:33 +01001if ARCH_AT91
SAN People73a59c12006-01-09 17:05:41 +00002
Boris BREZILLONf090fb32013-10-11 12:22:06 +02003config HAVE_AT91_UTMI
4 bool
5
Boris BREZILLONc84a61d2013-10-17 18:55:41 +02006config HAVE_AT91_USB_CLK
7 bool
8
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +08009config HAVE_AT91_DBGU0
10 bool
11
12config HAVE_AT91_DBGU1
13 bool
14
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020015config HAVE_AT91_DBGU2
16 bool
17
Boris BREZILLONc8a8c632013-10-11 09:37:46 +020018config COMMON_CLK_AT91
19 bool
Boris BREZILLONc8a8c632013-10-11 09:37:46 +020020 select COMMON_CLK
21
Boris BREZILLONa9c06882013-10-11 13:27:06 +020022config HAVE_AT91_SMD
23 bool
24
Alexandre Bellonibcc5fd42014-09-15 18:15:53 +020025config HAVE_AT91_H32MX
26 bool
27
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080028config SOC_AT91SAM9
29 bool
Nicolas Ferreef7eda22014-11-21 17:10:06 +010030 select ATMEL_AIC_IRQ
31 select COMMON_CLK_AT91
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080032 select CPU_ARM926T
Russell Kingb1b3f492012-10-06 17:12:25 +010033 select GENERIC_CLOCKEVENTS
Nicolas Ferreef7eda22014-11-21 17:10:06 +010034 select MEMORY
35 select ATMEL_SDRAMC
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080036
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000037config SOC_SAMA5
38 bool
Boris BREZILLON3b26f392014-07-10 19:14:21 +020039 select ATMEL_AIC5_IRQ
Nicolas Ferreef7eda22014-11-21 17:10:06 +010040 select COMMON_CLK_AT91
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000041 select CPU_V7
42 select GENERIC_CLOCKEVENTS
Alexandre Belloni63e60362014-07-08 18:21:13 +020043 select MEMORY
44 select ATMEL_SDRAMC
Alexandre Belloni93d2cf42014-11-10 21:45:53 +010045 select PHYLIB if NETDEVICES
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000046
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010047menu "Atmel AT91 System-on-Chip"
48
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000049choice
50
51 prompt "Core type"
52
Arnd Bergmannfe138c22014-03-13 15:18:31 +010053config SOC_SAM_V4_V5
54 bool "ARM9 AT91SAM9/AT91RM9200"
55 help
56 Select this if you are using one of Atmel's AT91SAM9 or
57 AT91RM9200 SoC.
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000058
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000059config SOC_SAM_V7
60 bool "Cortex A5"
61 help
62 Select this if you are using one of Atmel's SAMA5D3 SoC.
63
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000064endchoice
65
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080066comment "Atmel AT91 Processor"
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010067
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000068if SOC_SAM_V7
69config SOC_SAMA5D3
70 bool "SAMA5D3 family"
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000071 select SOC_SAMA5
72 select HAVE_FB_ATMEL
73 select HAVE_AT91_DBGU1
Boris BREZILLONf090fb32013-10-11 12:22:06 +020074 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +020075 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020076 select HAVE_AT91_USB_CLK
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000077 help
78 Select this if you are using one of Atmel's SAMA5D3 family SoC.
Josh Wu7f457162013-11-06 18:01:11 +080079 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020080
81config SOC_SAMA5D4
82 bool "SAMA5D4 family"
83 select SOC_SAMA5
84 select HAVE_AT91_DBGU2
85 select CLKSRC_MMIO
86 select CACHE_L2X0
87 select CACHE_PL310
88 select HAVE_FB_ATMEL
89 select HAVE_AT91_UTMI
90 select HAVE_AT91_SMD
91 select HAVE_AT91_USB_CLK
92 select HAVE_AT91_H32MX
93 help
94 Select this if you are using one of Atmel's SAMA5D4 family SoC.
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000095endif
96
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000097if SOC_SAM_V4_V5
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080098config SOC_AT91RM9200
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010099 bool "AT91RM9200"
Nicolas Ferreef7eda22014-11-21 17:10:06 +0100100 select ATMEL_AIC_IRQ
101 select COMMON_CLK_AT91
Russell Kingc7508152008-10-26 10:55:14 +0000102 select CPU_ARM920T
David Brownell5e802df2007-07-31 01:41:26 +0100103 select GENERIC_CLOCKEVENTS
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800104 select HAVE_AT91_DBGU0
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200105 select HAVE_AT91_USB_CLK
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100106
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800107config SOC_AT91SAM9260
108 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800109 select HAVE_AT91_DBGU0
Russell Kingb1b3f492012-10-06 17:12:25 +0100110 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200111 select HAVE_AT91_USB_CLK
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800112 help
113 Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
114 or AT91SAM9G20 SoC.
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100115
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800116config SOC_AT91SAM9261
117 bool "AT91SAM9261 or AT91SAM9G10"
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800118 select HAVE_AT91_DBGU0
Nicolas Ferre0912e532009-06-23 16:30:56 +0200119 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100120 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200121 select HAVE_AT91_USB_CLK
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800122 help
123 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
Nicolas Ferreb319ff82009-06-26 15:37:01 +0100124
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800125config SOC_AT91SAM9263
Andrew Victorb2c65612007-02-08 09:42:40 +0100126 bool "AT91SAM9263"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800127 select HAVE_AT91_DBGU1
Nicolas Ferre0912e532009-06-23 16:30:56 +0200128 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100129 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200130 select HAVE_AT91_USB_CLK
Andrew Victorb2c65612007-02-08 09:42:40 +0100131
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800132config SOC_AT91SAM9RL
Andrew Victor877d7722007-05-11 20:49:56 +0100133 bool "AT91SAM9RL"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800134 select HAVE_AT91_DBGU0
Nicolas Ferre0912e532009-06-23 16:30:56 +0200135 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100136 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200137 select HAVE_AT91_UTMI
Andrew Victor877d7722007-05-11 20:49:56 +0100138
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800139config SOC_AT91SAM9G45
Nicolas Ferreca1dcbf2012-03-15 12:26:43 +0100140 bool "AT91SAM9G45 or AT91SAM9M10 families"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800141 select HAVE_AT91_DBGU1
Nicolas Ferre0912e532009-06-23 16:30:56 +0200142 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100143 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200144 select HAVE_AT91_UTMI
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200145 select HAVE_AT91_USB_CLK
Nicolas Ferreca1dcbf2012-03-15 12:26:43 +0100146 help
147 Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
148 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
Nicolas Ferre789b23b2009-06-26 15:36:58 +0100149
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800150config SOC_AT91SAM9X5
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100151 bool "AT91SAM9x5 family"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800152 select HAVE_AT91_DBGU0
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100153 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100154 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200155 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +0200156 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200157 select HAVE_AT91_USB_CLK
Nicolas Ferrea26e1af2012-03-15 12:48:41 +0100158 help
159 Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
160 This means that your SAM9 name finishes with a '5' (except if it is
161 AT91SAM9G45!).
162 This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
163 and AT91SAM9X35.
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100164
Hong Xu74db4fb2012-04-17 14:26:31 +0800165config SOC_AT91SAM9N12
166 bool "AT91SAM9N12 family"
Hong Xu74db4fb2012-04-17 14:26:31 +0800167 select HAVE_AT91_DBGU0
168 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100169 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200170 select HAVE_AT91_USB_CLK
Hong Xu74db4fb2012-04-17 14:26:31 +0800171 help
172 Select this if you are using Atmel's AT91SAM9N12 SoC.
173
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100174# ----------------------------------------------------------
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +0000175endif # SOC_SAM_V4_V5
Greg Ungerer9f1ccef2007-07-30 02:39:21 +0100176
Joachim Eastwood397f8c32012-10-28 18:31:09 +0000177config MACH_AT91RM9200_DT
Arnd Bergmanne093d7cf2014-12-02 10:32:52 +0100178 def_bool SOC_AT91RM9200
Joachim Eastwood397f8c32012-10-28 18:31:09 +0000179
Jean-Christophe PLAGNIOL-VILLARD4afcd1d2013-02-19 18:30:29 +0800180config MACH_AT91SAM9_DT
Arnd Bergmanne093d7cf2014-12-02 10:32:52 +0100181 def_bool SOC_AT91SAM9
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200182
183# ----------------------------------------------------------
184
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100185comment "AT91 Feature Selections"
SAN People73a59c12006-01-09 17:05:41 +0000186
Andrew Victoreaad2db2008-09-21 21:35:18 +0100187config AT91_SLOW_CLOCK
188 bool "Suspend-to-RAM disables main oscillator"
189 depends on SUSPEND
190 help
191 Select this if you want Suspend-to-RAM to save the most power
192 possible (without powering off the CPU) by disabling the PLLs
193 and main oscillator so that only the 32 KiHz clock is available.
194
195 When only that slow-clock is available, some peripherals lose
196 functionality. Many can't issue wakeup events unless faster
197 clocks are available. Some lose their operating state and
198 need to be completely re-initialized.
199
David Brownell5248c652007-11-12 17:59:10 +0100200config AT91_TIMER_HZ
201 int "Kernel HZ (jiffies per second)"
202 range 32 1024
203 depends on ARCH_AT91
Nicolas Ferree1520152014-11-21 16:22:17 +0100204 default "128" if SOC_AT91RM9200
David Brownell5248c652007-11-12 17:59:10 +0100205 default "100"
206 help
207 On AT91rm9200 chips where you're using a system clock derived
208 from the 32768 Hz hardware clock, this tick rate should divide
209 it exactly: use a power-of-two value, such as 128 or 256, to
210 reduce timing errors caused by rounding.
211
212 On AT91sam926x chips, or otherwise when using a higher precision
213 system clock (of at least several MHz), rounding is less of a
214 problem so it can be safer to use a decimal values like 100.
215
SAN People73a59c12006-01-09 17:05:41 +0000216endmenu
217
218endif