Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 1 | if ARCH_AT91 |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 2 | |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 3 | config HAVE_AT91_UTMI |
| 4 | bool |
| 5 | |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 6 | config HAVE_AT91_USB_CLK |
| 7 | bool |
| 8 | |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 9 | config HAVE_AT91_DBGU0 |
| 10 | bool |
| 11 | |
| 12 | config HAVE_AT91_DBGU1 |
| 13 | bool |
| 14 | |
Nicolas Ferre | 2dc850b | 2014-09-15 18:15:54 +0200 | [diff] [blame] | 15 | config HAVE_AT91_DBGU2 |
| 16 | bool |
| 17 | |
Boris BREZILLON | c8a8c63 | 2013-10-11 09:37:46 +0200 | [diff] [blame] | 18 | config COMMON_CLK_AT91 |
| 19 | bool |
Boris BREZILLON | c8a8c63 | 2013-10-11 09:37:46 +0200 | [diff] [blame] | 20 | select COMMON_CLK |
| 21 | |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 22 | config HAVE_AT91_SMD |
| 23 | bool |
| 24 | |
Alexandre Belloni | bcc5fd4 | 2014-09-15 18:15:53 +0200 | [diff] [blame] | 25 | config HAVE_AT91_H32MX |
| 26 | bool |
| 27 | |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 28 | config SOC_AT91SAM9 |
| 29 | bool |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 30 | select ATMEL_AIC_IRQ |
| 31 | select COMMON_CLK_AT91 |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 32 | select CPU_ARM926T |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 33 | select GENERIC_CLOCKEVENTS |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 34 | select MEMORY |
| 35 | select ATMEL_SDRAMC |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 36 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 37 | config SOC_SAMA5 |
| 38 | bool |
Boris BREZILLON | 3b26f39 | 2014-07-10 19:14:21 +0200 | [diff] [blame] | 39 | select ATMEL_AIC5_IRQ |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 40 | select COMMON_CLK_AT91 |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 41 | select CPU_V7 |
| 42 | select GENERIC_CLOCKEVENTS |
Alexandre Belloni | 63e6036 | 2014-07-08 18:21:13 +0200 | [diff] [blame] | 43 | select MEMORY |
| 44 | select ATMEL_SDRAMC |
Alexandre Belloni | 93d2cf4 | 2014-11-10 21:45:53 +0100 | [diff] [blame] | 45 | select PHYLIB if NETDEVICES |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 46 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 47 | menu "Atmel AT91 System-on-Chip" |
| 48 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 49 | choice |
| 50 | |
| 51 | prompt "Core type" |
| 52 | |
Arnd Bergmann | fe138c2 | 2014-03-13 15:18:31 +0100 | [diff] [blame] | 53 | config SOC_SAM_V4_V5 |
| 54 | bool "ARM9 AT91SAM9/AT91RM9200" |
| 55 | help |
| 56 | Select this if you are using one of Atmel's AT91SAM9 or |
| 57 | AT91RM9200 SoC. |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 58 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 59 | config SOC_SAM_V7 |
| 60 | bool "Cortex A5" |
| 61 | help |
| 62 | Select this if you are using one of Atmel's SAMA5D3 SoC. |
| 63 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 64 | endchoice |
| 65 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 66 | comment "Atmel AT91 Processor" |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 67 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 68 | if SOC_SAM_V7 |
| 69 | config SOC_SAMA5D3 |
| 70 | bool "SAMA5D3 family" |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 71 | select SOC_SAMA5 |
| 72 | select HAVE_FB_ATMEL |
| 73 | select HAVE_AT91_DBGU1 |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 74 | select HAVE_AT91_UTMI |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 75 | select HAVE_AT91_SMD |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 76 | select HAVE_AT91_USB_CLK |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 77 | help |
| 78 | Select this if you are using one of Atmel's SAMA5D3 family SoC. |
Josh Wu | 7f45716 | 2013-11-06 18:01:11 +0800 | [diff] [blame] | 79 | This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36. |
Nicolas Ferre | 2dc850b | 2014-09-15 18:15:54 +0200 | [diff] [blame] | 80 | |
| 81 | config SOC_SAMA5D4 |
| 82 | bool "SAMA5D4 family" |
| 83 | select SOC_SAMA5 |
| 84 | select HAVE_AT91_DBGU2 |
| 85 | select CLKSRC_MMIO |
| 86 | select CACHE_L2X0 |
| 87 | select CACHE_PL310 |
| 88 | select HAVE_FB_ATMEL |
| 89 | select HAVE_AT91_UTMI |
| 90 | select HAVE_AT91_SMD |
| 91 | select HAVE_AT91_USB_CLK |
| 92 | select HAVE_AT91_H32MX |
| 93 | help |
| 94 | Select this if you are using one of Atmel's SAMA5D4 family SoC. |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 95 | endif |
| 96 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 97 | if SOC_SAM_V4_V5 |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 98 | config SOC_AT91RM9200 |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 99 | bool "AT91RM9200" |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 100 | select ATMEL_AIC_IRQ |
| 101 | select COMMON_CLK_AT91 |
Russell King | c750815 | 2008-10-26 10:55:14 +0000 | [diff] [blame] | 102 | select CPU_ARM920T |
David Brownell | 5e802df | 2007-07-31 01:41:26 +0100 | [diff] [blame] | 103 | select GENERIC_CLOCKEVENTS |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 104 | select HAVE_AT91_DBGU0 |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 105 | select HAVE_AT91_USB_CLK |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 106 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 107 | config SOC_AT91SAM9260 |
| 108 | bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 109 | select HAVE_AT91_DBGU0 |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 110 | select SOC_AT91SAM9 |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 111 | select HAVE_AT91_USB_CLK |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 112 | help |
| 113 | Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE |
| 114 | or AT91SAM9G20 SoC. |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 115 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 116 | config SOC_AT91SAM9261 |
| 117 | bool "AT91SAM9261 or AT91SAM9G10" |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 118 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 119 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 120 | select SOC_AT91SAM9 |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 121 | select HAVE_AT91_USB_CLK |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 122 | help |
| 123 | Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. |
Nicolas Ferre | b319ff8 | 2009-06-26 15:37:01 +0100 | [diff] [blame] | 124 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 125 | config SOC_AT91SAM9263 |
Andrew Victor | b2c6561 | 2007-02-08 09:42:40 +0100 | [diff] [blame] | 126 | bool "AT91SAM9263" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 127 | select HAVE_AT91_DBGU1 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 128 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 129 | select SOC_AT91SAM9 |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 130 | select HAVE_AT91_USB_CLK |
Andrew Victor | b2c6561 | 2007-02-08 09:42:40 +0100 | [diff] [blame] | 131 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 132 | config SOC_AT91SAM9RL |
Andrew Victor | 877d772 | 2007-05-11 20:49:56 +0100 | [diff] [blame] | 133 | bool "AT91SAM9RL" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 134 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 135 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 136 | select SOC_AT91SAM9 |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 137 | select HAVE_AT91_UTMI |
Andrew Victor | 877d772 | 2007-05-11 20:49:56 +0100 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 139 | config SOC_AT91SAM9G45 |
Nicolas Ferre | ca1dcbf | 2012-03-15 12:26:43 +0100 | [diff] [blame] | 140 | bool "AT91SAM9G45 or AT91SAM9M10 families" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 141 | select HAVE_AT91_DBGU1 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 142 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 143 | select SOC_AT91SAM9 |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 144 | select HAVE_AT91_UTMI |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 145 | select HAVE_AT91_USB_CLK |
Nicolas Ferre | ca1dcbf | 2012-03-15 12:26:43 +0100 | [diff] [blame] | 146 | help |
| 147 | Select this if you are using one of Atmel's AT91SAM9G45 family SoC. |
| 148 | This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. |
Nicolas Ferre | 789b23b | 2009-06-26 15:36:58 +0100 | [diff] [blame] | 149 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 150 | config SOC_AT91SAM9X5 |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 151 | bool "AT91SAM9x5 family" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 152 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 153 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 154 | select SOC_AT91SAM9 |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 155 | select HAVE_AT91_UTMI |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 156 | select HAVE_AT91_SMD |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 157 | select HAVE_AT91_USB_CLK |
Nicolas Ferre | a26e1af | 2012-03-15 12:48:41 +0100 | [diff] [blame] | 158 | help |
| 159 | Select this if you are using one of Atmel's AT91SAM9x5 family SoC. |
| 160 | This means that your SAM9 name finishes with a '5' (except if it is |
| 161 | AT91SAM9G45!). |
| 162 | This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35 |
| 163 | and AT91SAM9X35. |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 164 | |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 165 | config SOC_AT91SAM9N12 |
| 166 | bool "AT91SAM9N12 family" |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 167 | select HAVE_AT91_DBGU0 |
| 168 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 169 | select SOC_AT91SAM9 |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 170 | select HAVE_AT91_USB_CLK |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 171 | help |
| 172 | Select this if you are using Atmel's AT91SAM9N12 SoC. |
| 173 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 174 | # ---------------------------------------------------------- |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 175 | endif # SOC_SAM_V4_V5 |
Greg Ungerer | 9f1ccef | 2007-07-30 02:39:21 +0100 | [diff] [blame] | 176 | |
Joachim Eastwood | 397f8c3 | 2012-10-28 18:31:09 +0000 | [diff] [blame] | 177 | config MACH_AT91RM9200_DT |
Arnd Bergmann | e093d7cf | 2014-12-02 10:32:52 +0100 | [diff] [blame] | 178 | def_bool SOC_AT91RM9200 |
Joachim Eastwood | 397f8c3 | 2012-10-28 18:31:09 +0000 | [diff] [blame] | 179 | |
Jean-Christophe PLAGNIOL-VILLARD | 4afcd1d | 2013-02-19 18:30:29 +0800 | [diff] [blame] | 180 | config MACH_AT91SAM9_DT |
Arnd Bergmann | e093d7cf | 2014-12-02 10:32:52 +0100 | [diff] [blame] | 181 | def_bool SOC_AT91SAM9 |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 182 | |
| 183 | # ---------------------------------------------------------- |
| 184 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 185 | comment "AT91 Feature Selections" |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 186 | |
Andrew Victor | eaad2db | 2008-09-21 21:35:18 +0100 | [diff] [blame] | 187 | config AT91_SLOW_CLOCK |
| 188 | bool "Suspend-to-RAM disables main oscillator" |
| 189 | depends on SUSPEND |
| 190 | help |
| 191 | Select this if you want Suspend-to-RAM to save the most power |
| 192 | possible (without powering off the CPU) by disabling the PLLs |
| 193 | and main oscillator so that only the 32 KiHz clock is available. |
| 194 | |
| 195 | When only that slow-clock is available, some peripherals lose |
| 196 | functionality. Many can't issue wakeup events unless faster |
| 197 | clocks are available. Some lose their operating state and |
| 198 | need to be completely re-initialized. |
| 199 | |
David Brownell | 5248c65 | 2007-11-12 17:59:10 +0100 | [diff] [blame] | 200 | config AT91_TIMER_HZ |
| 201 | int "Kernel HZ (jiffies per second)" |
| 202 | range 32 1024 |
| 203 | depends on ARCH_AT91 |
Nicolas Ferre | e152015 | 2014-11-21 16:22:17 +0100 | [diff] [blame] | 204 | default "128" if SOC_AT91RM9200 |
David Brownell | 5248c65 | 2007-11-12 17:59:10 +0100 | [diff] [blame] | 205 | default "100" |
| 206 | help |
| 207 | On AT91rm9200 chips where you're using a system clock derived |
| 208 | from the 32768 Hz hardware clock, this tick rate should divide |
| 209 | it exactly: use a power-of-two value, such as 128 or 256, to |
| 210 | reduce timing errors caused by rounding. |
| 211 | |
| 212 | On AT91sam926x chips, or otherwise when using a higher precision |
| 213 | system clock (of at least several MHz), rounding is less of a |
| 214 | problem so it can be safer to use a decimal values like 100. |
| 215 | |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 216 | endmenu |
| 217 | |
| 218 | endif |