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gerrit-public.fairphone.software / kernel / msm-5.4 / bde8a8f23bbe6db51fa4e81644273af18fef3d7a / . / sound / firewire / fireworks / fireworks.h
blob: e999802ab47041721591f20a865fff82446bd560 [file] [log] [blame]
Takashi Sakamotob5b04332014-04-25 22:45:00 +0900[diff] [blame]1/*
2 * fireworks.h - a part of driver for Fireworks based devices
3 *
4 * Copyright (c) 2009-2010 Clemens Ladisch
5 * Copyright (c) 2013-2014 Takashi Sakamoto
6 *
7 * Licensed under the terms of the GNU General Public License, version 2.
8 */
9#ifndef SOUND_FIREWORKS_H_INCLUDED
10#define SOUND_FIREWORKS_H_INCLUDED
11
12#include <linux/compat.h>
13#include <linux/device.h>
14#include <linux/firewire.h>
15#include <linux/firewire-constants.h>
16#include <linux/module.h>
17#include <linux/mod_devicetable.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20
21#include <sound/core.h>
22#include <sound/initval.h>
Takashi Sakamotobde8a8f2014-04-25 22:45:01 +0900[diff] [blame^]23#include <sound/pcm.h>
24
25#include "../cmp.h"
26#include "../lib.h"
27
28#define SND_EFW_MULTIPLIER_MODES 3
29#define HWINFO_NAME_SIZE_BYTES 32
30#define HWINFO_MAX_CAPS_GROUPS 8
31
32/*
33 * This should be greater than maximum bytes for EFW response content.
34 * Currently response against command for isochronous channel mapping is
35 * confirmed to be the maximum one. But for flexibility, use maximum data
36 * payload for asynchronous primary packets at S100 (Cable base rate) in
37 * IEEE Std 1394-1995.
38 */
39#define SND_EFW_RESPONSE_MAXIMUM_BYTES 0x200U
40
41struct snd_efw_phys_grp {
42 u8 type; /* see enum snd_efw_grp_type */
43 u8 count;
44} __packed;
Takashi Sakamotob5b04332014-04-25 22:45:00 +0900[diff] [blame]45
46struct snd_efw {
47 struct snd_card *card;
48 struct fw_unit *unit;
49 int card_index;
50
51 struct mutex mutex;
52 spinlock_t lock;
Takashi Sakamotobde8a8f2014-04-25 22:45:01 +0900[diff] [blame^]53
54 /* for transaction */
55 u32 seqnum;
56 bool resp_addr_changable;
Takashi Sakamotob5b04332014-04-25 22:45:00 +0900[diff] [blame]57};
58
Takashi Sakamotobde8a8f2014-04-25 22:45:01 +0900[diff] [blame^]59struct snd_efw_transaction {
60 __be32 length;
61 __be32 version;
62 __be32 seqnum;
63 __be32 category;
64 __be32 command;
65 __be32 status;
66 __be32 params[0];
67};
68int snd_efw_transaction_run(struct fw_unit *unit,
69 const void *cmd, unsigned int cmd_size,
70 void *resp, unsigned int resp_size);
71int snd_efw_transaction_register(void);
72void snd_efw_transaction_unregister(void);
73void snd_efw_transaction_bus_reset(struct fw_unit *unit);
74
75struct snd_efw_hwinfo {
76 u32 flags;
77 u32 guid_hi;
78 u32 guid_lo;
79 u32 type;
80 u32 version;
81 char vendor_name[HWINFO_NAME_SIZE_BYTES];
82 char model_name[HWINFO_NAME_SIZE_BYTES];
83 u32 supported_clocks;
84 u32 amdtp_rx_pcm_channels;
85 u32 amdtp_tx_pcm_channels;
86 u32 phys_out;
87 u32 phys_in;
88 u32 phys_out_grp_count;
89 struct snd_efw_phys_grp phys_out_grps[HWINFO_MAX_CAPS_GROUPS];
90 u32 phys_in_grp_count;
91 struct snd_efw_phys_grp phys_in_grps[HWINFO_MAX_CAPS_GROUPS];
92 u32 midi_out_ports;
93 u32 midi_in_ports;
94 u32 max_sample_rate;
95 u32 min_sample_rate;
96 u32 dsp_version;
97 u32 arm_version;
98 u32 mixer_playback_channels;
99 u32 mixer_capture_channels;
100 u32 fpga_version;
101 u32 amdtp_rx_pcm_channels_2x;
102 u32 amdtp_tx_pcm_channels_2x;
103 u32 amdtp_rx_pcm_channels_4x;
104 u32 amdtp_tx_pcm_channels_4x;
105 u32 reserved[16];
106} __packed;
107enum snd_efw_grp_type {
108 SND_EFW_CH_TYPE_ANALOG = 0,
109 SND_EFW_CH_TYPE_SPDIF = 1,
110 SND_EFW_CH_TYPE_ADAT = 2,
111 SND_EFW_CH_TYPE_SPDIF_OR_ADAT = 3,
112 SND_EFW_CH_TYPE_ANALOG_MIRRORING = 4,
113 SND_EFW_CH_TYPE_HEADPHONES = 5,
114 SND_EFW_CH_TYPE_I2S = 6,
115 SND_EFW_CH_TYPE_GUITAR = 7,
116 SND_EFW_CH_TYPE_PIEZO_GUITAR = 8,
117 SND_EFW_CH_TYPE_GUITAR_STRING = 9,
118 SND_EFW_CH_TYPE_VIRTUAL = 0x10000,
119 SND_EFW_CH_TYPE_DUMMY
120};
121struct snd_efw_phys_meters {
122 u32 status; /* guitar state/midi signal/clock input detect */
123 u32 reserved0;
124 u32 reserved1;
125 u32 reserved2;
126 u32 reserved3;
127 u32 out_meters;
128 u32 in_meters;
129 u32 reserved4;
130 u32 reserved5;
131 u32 values[0];
132} __packed;
133enum snd_efw_clock_source {
134 SND_EFW_CLOCK_SOURCE_INTERNAL = 0,
135 SND_EFW_CLOCK_SOURCE_SYTMATCH = 1,
136 SND_EFW_CLOCK_SOURCE_WORDCLOCK = 2,
137 SND_EFW_CLOCK_SOURCE_SPDIF = 3,
138 SND_EFW_CLOCK_SOURCE_ADAT_1 = 4,
139 SND_EFW_CLOCK_SOURCE_ADAT_2 = 5,
140 SND_EFW_CLOCK_SOURCE_CONTINUOUS = 6 /* internal variable clock */
141};
142enum snd_efw_transport_mode {
143 SND_EFW_TRANSPORT_MODE_WINDOWS = 0,
144 SND_EFW_TRANSPORT_MODE_IEC61883 = 1,
145};
146int snd_efw_command_set_resp_addr(struct snd_efw *efw,
147 u16 addr_high, u32 addr_low);
148int snd_efw_command_set_tx_mode(struct snd_efw *efw, unsigned int mode);
149int snd_efw_command_get_hwinfo(struct snd_efw *efw,
150 struct snd_efw_hwinfo *hwinfo);
151int snd_efw_command_get_phys_meters(struct snd_efw *efw,
152 struct snd_efw_phys_meters *meters,
153 unsigned int len);
154int snd_efw_command_get_clock_source(struct snd_efw *efw,
155 enum snd_efw_clock_source *source);
156int snd_efw_command_get_sampling_rate(struct snd_efw *efw, unsigned int *rate);
157int snd_efw_command_set_sampling_rate(struct snd_efw *efw, unsigned int rate);
158
Takashi Sakamotob5b04332014-04-25 22:45:00 +0900[diff] [blame]159#define SND_EFW_DEV_ENTRY(vendor, model) \
160{ \
161 .match_flags = IEEE1394_MATCH_VENDOR_ID | \
162 IEEE1394_MATCH_MODEL_ID, \
163 .vendor_id = vendor,\
164 .model_id = model \
165}
166
167#endif