Pete Popov | bdf21b1 | 2005-07-14 17:47:57 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * |
| 3 | * 2.6 port, Embedded Alley Solutions, Inc |
| 4 | * |
| 5 | * Based on Per Hallsmark, per.hallsmark@mvista.com |
| 6 | * |
| 7 | * This program is free software; you can distribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License (Version 2) as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 14 | * for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along |
| 17 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 19 | */ |
| 20 | #include <linux/config.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/mm.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/serial_ip3106.h> |
| 28 | |
| 29 | #include <asm/cpu.h> |
| 30 | #include <asm/bootinfo.h> |
| 31 | #include <asm/irq.h> |
| 32 | #include <asm/mipsregs.h> |
| 33 | #include <asm/reboot.h> |
| 34 | #include <asm/pgtable.h> |
| 35 | #include <asm/time.h> |
| 36 | |
| 37 | #include <glb.h> |
| 38 | #include <int.h> |
| 39 | #include <pci.h> |
| 40 | #include <uart.h> |
| 41 | #include <nand.h> |
| 42 | |
| 43 | extern void prom_printf(char *fmt, ...); |
| 44 | |
| 45 | extern void __init board_setup(void); |
| 46 | extern void pnx8550_machine_restart(char *); |
| 47 | extern void pnx8550_machine_halt(void); |
| 48 | extern void pnx8550_machine_power_off(void); |
| 49 | extern struct resource ioport_resource; |
| 50 | extern struct resource iomem_resource; |
| 51 | extern void (*board_time_init)(void); |
| 52 | extern void pnx8550_time_init(void); |
| 53 | extern void (*board_timer_setup)(struct irqaction *irq); |
| 54 | extern void pnx8550_timer_setup(struct irqaction *irq); |
| 55 | extern void rs_kgdb_hook(int tty_no); |
| 56 | extern void prom_printf(char *fmt, ...); |
| 57 | extern char *prom_getcmdline(void); |
| 58 | |
| 59 | struct resource standard_io_resources[] = { |
| 60 | {"dma1", 0x00, 0x1f, IORESOURCE_BUSY}, |
| 61 | {"timer", 0x40, 0x5f, IORESOURCE_BUSY}, |
| 62 | {"dma page reg", 0x80, 0x8f, IORESOURCE_BUSY}, |
| 63 | {"dma2", 0xc0, 0xdf, IORESOURCE_BUSY}, |
| 64 | }; |
| 65 | |
| 66 | #define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) |
| 67 | |
| 68 | extern struct resource pci_io_resource; |
| 69 | extern struct resource pci_mem_resource; |
| 70 | |
| 71 | /* Return the total size of DRAM-memory, (RANK0 + RANK1) */ |
| 72 | unsigned long get_system_mem_size(void) |
| 73 | { |
| 74 | /* Read IP2031_RANK0_ADDR_LO */ |
| 75 | unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010); |
| 76 | /* Read IP2031_RANK1_ADDR_HI */ |
| 77 | unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018); |
| 78 | |
| 79 | return dram_r1_hi - dram_r0_lo + 1; |
| 80 | } |
| 81 | |
| 82 | int pnx8550_console_port = -1; |
| 83 | |
| 84 | void __init plat_setup(void) |
| 85 | { |
| 86 | int i; |
| 87 | char* argptr; |
| 88 | |
| 89 | board_setup(); /* board specific setup */ |
| 90 | |
| 91 | _machine_restart = pnx8550_machine_restart; |
| 92 | _machine_halt = pnx8550_machine_halt; |
| 93 | _machine_power_off = pnx8550_machine_power_off; |
| 94 | |
| 95 | board_time_init = pnx8550_time_init; |
| 96 | board_timer_setup = pnx8550_timer_setup; |
| 97 | |
| 98 | /* Clear the Global 2 Register, PCI Inta Output Enable Registers |
| 99 | Bit 1:Enable DAC Powerdown |
| 100 | -> 0:DACs are enabled and are working normally |
| 101 | 1:DACs are powerdown |
| 102 | Bit 0:Enable of PCI inta output |
| 103 | -> 0 = Disable PCI inta output |
| 104 | 1 = Enable PCI inta output |
| 105 | */ |
| 106 | PNX8550_GLB2_ENAB_INTA_O = 0; |
| 107 | |
| 108 | /* IO/MEM resources. */ |
| 109 | set_io_port_base(KSEG1); |
| 110 | ioport_resource.start = 0; |
| 111 | ioport_resource.end = ~0; |
| 112 | iomem_resource.start = 0; |
| 113 | iomem_resource.end = ~0; |
| 114 | |
| 115 | /* Request I/O space for devices on this board */ |
| 116 | for (i = 0; i < STANDARD_IO_RESOURCES; i++) |
| 117 | request_resource(&ioport_resource, standard_io_resources + i); |
| 118 | |
| 119 | /* Place the Mode Control bit for GPIO pin 16 in primary function */ |
| 120 | /* Pin 16 is used by UART1, UA1_TX */ |
| 121 | outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) | |
| 122 | (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT), |
| 123 | PNX8550_GPIO_MC1); |
| 124 | |
| 125 | argptr = prom_getcmdline(); |
| 126 | if ((argptr = strstr(argptr, "console=ttyS")) != NULL) { |
| 127 | argptr += strlen("console=ttyS"); |
| 128 | pnx8550_console_port = *argptr == '0' ? 0 : 1; |
| 129 | |
| 130 | /* We must initialize the UART (console) before prom_printf */ |
| 131 | /* Set LCR to 8-bit and BAUD to 38400 (no 5) */ |
| 132 | ip3106_lcr(UART_BASE, pnx8550_console_port) = |
| 133 | IP3106_UART_LCR_8BIT; |
| 134 | ip3106_baud(UART_BASE, pnx8550_console_port) = 5; |
| 135 | } |
| 136 | |
| 137 | #ifdef CONFIG_KGDB |
| 138 | argptr = prom_getcmdline(); |
| 139 | if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) { |
| 140 | int line; |
| 141 | argptr += strlen("kgdb=ttyS"); |
| 142 | line = *argptr == '0' ? 0 : 1; |
| 143 | rs_kgdb_hook(line); |
| 144 | prom_printf("KGDB: Using ttyS%i for session, " |
| 145 | "please connect your debugger\n", line ? 1 : 0); |
| 146 | } |
| 147 | #endif |
| 148 | return; |
| 149 | } |