Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #ifndef __ND_H__ |
| 14 | #define __ND_H__ |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 15 | #include <linux/libnvdimm.h> |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 16 | #include <linux/badblocks.h> |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 17 | #include <linux/blkdev.h> |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 18 | #include <linux/device.h> |
| 19 | #include <linux/mutex.h> |
| 20 | #include <linux/ndctl.h> |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 21 | #include <linux/types.h> |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 22 | #include <linux/nd.h> |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 23 | #include "label.h" |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 24 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 25 | enum { |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 26 | /* |
| 27 | * Limits the maximum number of block apertures a dimm can |
| 28 | * support and is an input to the geometry/on-disk-format of a |
| 29 | * BTT instance |
| 30 | */ |
| 31 | ND_MAX_LANES = 256, |
Vishal Verma | fcae695 | 2015-06-25 04:22:39 -0400 | [diff] [blame] | 32 | INT_LBASIZE_ALIGNMENT = 64, |
Vishal Verma | 3ae3d67 | 2017-05-10 15:01:30 -0600 | [diff] [blame] | 33 | NVDIMM_IO_ATOMIC = 1, |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 34 | }; |
| 35 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 36 | struct nvdimm_drvdata { |
| 37 | struct device *dev; |
Dan Williams | 0288176 | 2017-08-29 18:28:18 -0700 | [diff] [blame] | 38 | int nslabel_size; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 39 | struct nd_cmd_get_config_size nsarea; |
| 40 | void *data; |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 41 | int ns_current, ns_next; |
| 42 | struct resource dpa; |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 43 | struct kref kref; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 44 | }; |
| 45 | |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 46 | struct nd_region_data { |
| 47 | int ns_count; |
| 48 | int ns_active; |
Dan Williams | 595c730 | 2016-09-23 17:53:52 -0700 | [diff] [blame] | 49 | unsigned int hints_shift; |
| 50 | void __iomem *flush_wpq[0]; |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 51 | }; |
| 52 | |
Dan Williams | 595c730 | 2016-09-23 17:53:52 -0700 | [diff] [blame] | 53 | static inline void __iomem *ndrd_get_flush_wpq(struct nd_region_data *ndrd, |
| 54 | int dimm, int hint) |
| 55 | { |
| 56 | unsigned int num = 1 << ndrd->hints_shift; |
| 57 | unsigned int mask = num - 1; |
| 58 | |
| 59 | return ndrd->flush_wpq[dimm * num + (hint & mask)]; |
| 60 | } |
| 61 | |
| 62 | static inline void ndrd_set_flush_wpq(struct nd_region_data *ndrd, int dimm, |
| 63 | int hint, void __iomem *flush) |
| 64 | { |
| 65 | unsigned int num = 1 << ndrd->hints_shift; |
| 66 | unsigned int mask = num - 1; |
| 67 | |
| 68 | ndrd->flush_wpq[dimm * num + (hint & mask)] = flush; |
| 69 | } |
| 70 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 71 | static inline struct nd_namespace_index *to_namespace_index( |
| 72 | struct nvdimm_drvdata *ndd, int i) |
| 73 | { |
| 74 | if (i < 0) |
| 75 | return NULL; |
| 76 | |
| 77 | return ndd->data + sizeof_namespace_index(ndd) * i; |
| 78 | } |
| 79 | |
| 80 | static inline struct nd_namespace_index *to_current_namespace_index( |
| 81 | struct nvdimm_drvdata *ndd) |
| 82 | { |
| 83 | return to_namespace_index(ndd, ndd->ns_current); |
| 84 | } |
| 85 | |
| 86 | static inline struct nd_namespace_index *to_next_namespace_index( |
| 87 | struct nvdimm_drvdata *ndd) |
| 88 | { |
| 89 | return to_namespace_index(ndd, ndd->ns_next); |
| 90 | } |
| 91 | |
Dan Williams | 564e871 | 2017-06-03 18:30:43 +0900 | [diff] [blame] | 92 | unsigned sizeof_namespace_label(struct nvdimm_drvdata *ndd); |
| 93 | |
| 94 | #define namespace_label_has(ndd, field) \ |
| 95 | (offsetof(struct nd_namespace_label, field) \ |
| 96 | < sizeof_namespace_label(ndd)) |
| 97 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 98 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ |
| 99 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ |
| 100 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ |
| 101 | (unsigned long long) (res ? resource_size(res) : 0), \ |
| 102 | (unsigned long long) (res ? res->start : 0), ##arg) |
| 103 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 104 | #define for_each_dpa_resource(ndd, res) \ |
| 105 | for (res = (ndd)->dpa.child; res; res = res->sibling) |
| 106 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 107 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
| 108 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ |
| 109 | res; res = next, next = next ? next->sibling : NULL) |
| 110 | |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 111 | struct nd_percpu_lane { |
| 112 | int count; |
| 113 | spinlock_t lock; |
| 114 | }; |
| 115 | |
Dan Williams | ae8219f | 2016-09-19 16:04:21 -0700 | [diff] [blame] | 116 | struct nd_label_ent { |
| 117 | struct list_head list; |
| 118 | struct nd_namespace_label *label; |
| 119 | }; |
| 120 | |
| 121 | enum nd_mapping_lock_class { |
| 122 | ND_MAPPING_CLASS0, |
| 123 | ND_MAPPING_UUID_SCAN, |
| 124 | }; |
| 125 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 126 | struct nd_mapping { |
| 127 | struct nvdimm *nvdimm; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 128 | u64 start; |
| 129 | u64 size; |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 130 | int position; |
Dan Williams | ae8219f | 2016-09-19 16:04:21 -0700 | [diff] [blame] | 131 | struct list_head labels; |
| 132 | struct mutex lock; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 133 | /* |
| 134 | * @ndd is for private use at region enable / disable time for |
| 135 | * get_ndd() + put_ndd(), all other nd_mapping to ndd |
| 136 | * conversions use to_ndd() which respects enabled state of the |
| 137 | * nvdimm. |
| 138 | */ |
| 139 | struct nvdimm_drvdata *ndd; |
| 140 | }; |
| 141 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 142 | struct nd_region { |
| 143 | struct device dev; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 144 | struct ida ns_ida; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 145 | struct ida btt_ida; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 146 | struct ida pfn_ida; |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 147 | struct ida dax_ida; |
Dan Williams | 004f1af | 2015-08-24 19:20:23 -0400 | [diff] [blame] | 148 | unsigned long flags; |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 149 | struct device *ns_seed; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 150 | struct device *btt_seed; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 151 | struct device *pfn_seed; |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 152 | struct device *dax_seed; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 153 | u16 ndr_mappings; |
| 154 | u64 ndr_size; |
| 155 | u64 ndr_start; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 156 | int id, num_lanes, ro, numa_node; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 157 | void *provider_data; |
Toshi Kani | 975750a | 2017-06-12 16:25:11 -0600 | [diff] [blame] | 158 | struct kernfs_node *bb_state; |
Dave Jiang | 6a6bef9 | 2017-04-07 15:33:20 -0700 | [diff] [blame] | 159 | struct badblocks bb; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 160 | struct nd_interleave_set *nd_set; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 161 | struct nd_percpu_lane __percpu *lane; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 162 | struct nd_mapping mapping[0]; |
| 163 | }; |
| 164 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 165 | struct nd_blk_region { |
| 166 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 167 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
| 168 | void *iobuf, u64 len, int rw); |
| 169 | void *blk_provider_data; |
| 170 | struct nd_region nd_region; |
| 171 | }; |
| 172 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 173 | /* |
| 174 | * Lookup next in the repeating sequence of 01, 10, and 11. |
| 175 | */ |
| 176 | static inline unsigned nd_inc_seq(unsigned seq) |
| 177 | { |
| 178 | static const unsigned next[] = { 0, 2, 3, 1 }; |
| 179 | |
| 180 | return next[seq & 3]; |
| 181 | } |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 182 | |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 183 | struct btt; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 184 | struct nd_btt { |
| 185 | struct device dev; |
| 186 | struct nd_namespace_common *ndns; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 187 | struct btt *btt; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 188 | unsigned long lbasize; |
Vishal Verma | abe8b4e | 2016-07-27 16:38:59 -0600 | [diff] [blame] | 189 | u64 size; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 190 | u8 *uuid; |
| 191 | int id; |
Vishal Verma | 14e4945 | 2017-06-28 14:25:00 -0600 | [diff] [blame] | 192 | int initial_offset; |
| 193 | u16 version_major; |
| 194 | u16 version_minor; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 195 | }; |
| 196 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 197 | enum nd_pfn_mode { |
| 198 | PFN_MODE_NONE, |
| 199 | PFN_MODE_RAM, |
| 200 | PFN_MODE_PMEM, |
| 201 | }; |
| 202 | |
| 203 | struct nd_pfn { |
| 204 | int id; |
| 205 | u8 *uuid; |
| 206 | struct device dev; |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 207 | unsigned long align; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 208 | unsigned long npfns; |
| 209 | enum nd_pfn_mode mode; |
| 210 | struct nd_pfn_sb *pfn_sb; |
| 211 | struct nd_namespace_common *ndns; |
| 212 | }; |
| 213 | |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 214 | struct nd_dax { |
| 215 | struct nd_pfn nd_pfn; |
| 216 | }; |
| 217 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 218 | enum nd_async_mode { |
| 219 | ND_SYNC, |
| 220 | ND_ASYNC, |
| 221 | }; |
| 222 | |
Vishal Verma | 41cd8b7 | 2015-06-25 04:21:52 -0400 | [diff] [blame] | 223 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 224 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 225 | void nd_device_register(struct device *dev); |
| 226 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); |
Dan Williams | 7199946 | 2016-02-18 10:29:49 -0800 | [diff] [blame] | 227 | void nd_device_notify(struct device *dev, enum nvdimm_event event); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 228 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
| 229 | size_t len); |
Dan Williams | b2c48f9 | 2017-08-11 17:36:54 -0700 | [diff] [blame] | 230 | ssize_t nd_size_select_show(unsigned long current_size, |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 231 | const unsigned long *supported, char *buf); |
Dan Williams | b2c48f9 | 2017-08-11 17:36:54 -0700 | [diff] [blame] | 232 | ssize_t nd_size_select_store(struct device *dev, const char *buf, |
| 233 | unsigned long *current_size, const unsigned long *supported); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 234 | int __init nvdimm_init(void); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 235 | int __init nd_region_init(void); |
Dan Williams | b3fde74 | 2017-06-04 10:18:39 +0900 | [diff] [blame] | 236 | int __init nd_label_init(void); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 237 | void nvdimm_exit(void); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 238 | void nd_region_exit(void); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 239 | struct nvdimm; |
| 240 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 241 | int nvdimm_check_config_data(struct device *dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 242 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
| 243 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 244 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
| 245 | void *buf, size_t len); |
Dan Williams | 59e6473 | 2016-03-08 07:16:07 -0800 | [diff] [blame] | 246 | long nvdimm_clear_poison(struct device *dev, phys_addr_t phys, |
| 247 | unsigned int len); |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 248 | void nvdimm_set_aliasing(struct device *dev); |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 249 | void nvdimm_set_locked(struct device *dev); |
Dan Williams | d34cb80 | 2017-09-25 11:01:31 -0700 | [diff] [blame] | 250 | void nvdimm_clear_locked(struct device *dev); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 251 | struct nd_btt *to_nd_btt(struct device *dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 252 | |
| 253 | struct nd_gen_sb { |
| 254 | char reserved[SZ_4K - 8]; |
| 255 | __le64 checksum; |
| 256 | }; |
| 257 | |
| 258 | u64 nd_sb_checksum(struct nd_gen_sb *sb); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 259 | #if IS_ENABLED(CONFIG_BTT) |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 260 | int nd_btt_probe(struct device *dev, struct nd_namespace_common *ndns); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 261 | bool is_nd_btt(struct device *dev); |
| 262 | struct device *nd_btt_create(struct nd_region *nd_region); |
| 263 | #else |
Dan Williams | e32bc72 | 2016-03-17 18:23:09 -0700 | [diff] [blame] | 264 | static inline int nd_btt_probe(struct device *dev, |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 265 | struct nd_namespace_common *ndns) |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 266 | { |
| 267 | return -ENODEV; |
| 268 | } |
| 269 | |
| 270 | static inline bool is_nd_btt(struct device *dev) |
| 271 | { |
| 272 | return false; |
| 273 | } |
| 274 | |
| 275 | static inline struct device *nd_btt_create(struct nd_region *nd_region) |
| 276 | { |
| 277 | return NULL; |
| 278 | } |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 279 | #endif |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 280 | |
| 281 | struct nd_pfn *to_nd_pfn(struct device *dev); |
| 282 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) |
Oliver O'Halloran | 0dd6964 | 2017-06-27 19:56:33 +1000 | [diff] [blame] | 283 | |
| 284 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
| 285 | #define PFN_DEFAULT_ALIGNMENT HPAGE_PMD_SIZE |
| 286 | #else |
| 287 | #define PFN_DEFAULT_ALIGNMENT PAGE_SIZE |
| 288 | #endif |
| 289 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 290 | int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 291 | bool is_nd_pfn(struct device *dev); |
| 292 | struct device *nd_pfn_create(struct nd_region *nd_region); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 293 | struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn, |
| 294 | struct nd_namespace_common *ndns); |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 295 | int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 296 | extern struct attribute_group nd_pfn_attribute_group; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 297 | #else |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 298 | static inline int nd_pfn_probe(struct device *dev, |
| 299 | struct nd_namespace_common *ndns) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 300 | { |
| 301 | return -ENODEV; |
| 302 | } |
| 303 | |
| 304 | static inline bool is_nd_pfn(struct device *dev) |
| 305 | { |
| 306 | return false; |
| 307 | } |
| 308 | |
| 309 | static inline struct device *nd_pfn_create(struct nd_region *nd_region) |
| 310 | { |
| 311 | return NULL; |
| 312 | } |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 313 | |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 314 | static inline int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 315 | { |
| 316 | return -ENODEV; |
| 317 | } |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 318 | #endif |
| 319 | |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 320 | struct nd_dax *to_nd_dax(struct device *dev); |
| 321 | #if IS_ENABLED(CONFIG_NVDIMM_DAX) |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 322 | int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 323 | bool is_nd_dax(struct device *dev); |
| 324 | struct device *nd_dax_create(struct nd_region *nd_region); |
| 325 | #else |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 326 | static inline int nd_dax_probe(struct device *dev, |
| 327 | struct nd_namespace_common *ndns) |
| 328 | { |
| 329 | return -ENODEV; |
| 330 | } |
| 331 | |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 332 | static inline bool is_nd_dax(struct device *dev) |
| 333 | { |
| 334 | return false; |
| 335 | } |
| 336 | |
| 337 | static inline struct device *nd_dax_create(struct nd_region *nd_region) |
| 338 | { |
| 339 | return NULL; |
| 340 | } |
| 341 | #endif |
| 342 | |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 343 | int nd_region_to_nstype(struct nd_region *nd_region); |
| 344 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 345 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region, |
| 346 | struct nd_namespace_index *nsindex); |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 347 | u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 348 | void nvdimm_bus_lock(struct device *dev); |
| 349 | void nvdimm_bus_unlock(struct device *dev); |
| 350 | bool is_nvdimm_bus_locked(struct device *dev); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 351 | int nvdimm_revalidate_disk(struct gendisk *disk); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 352 | void nvdimm_drvdata_release(struct kref *kref); |
| 353 | void put_ndd(struct nvdimm_drvdata *ndd); |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 354 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
| 355 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); |
| 356 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, |
| 357 | struct nd_label_id *label_id, resource_size_t start, |
| 358 | resource_size_t n); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 359 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
| 360 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 361 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
Dan Williams | 298f2bc | 2016-03-15 16:41:04 -0700 | [diff] [blame] | 362 | int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt); |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 363 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, |
| 364 | char *name); |
Dan Williams | f979b13 | 2017-06-04 12:12:07 +0900 | [diff] [blame] | 365 | unsigned int pmem_sector_size(struct nd_namespace_common *ndns); |
Dan Williams | a390180 | 2016-04-07 20:02:06 -0700 | [diff] [blame] | 366 | void nvdimm_badblocks_populate(struct nd_region *nd_region, |
| 367 | struct badblocks *bb, const struct resource *res); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 368 | #if IS_ENABLED(CONFIG_ND_CLAIM) |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 369 | int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap); |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 370 | int devm_nsio_enable(struct device *dev, struct nd_namespace_io *nsio); |
| 371 | void devm_nsio_disable(struct device *dev, struct nd_namespace_io *nsio); |
| 372 | #else |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 373 | static inline int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, |
| 374 | struct dev_pagemap *pgmap) |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 375 | { |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 376 | return -ENXIO; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 377 | } |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 378 | static inline int devm_nsio_enable(struct device *dev, |
| 379 | struct nd_namespace_io *nsio) |
| 380 | { |
| 381 | return -ENXIO; |
| 382 | } |
| 383 | static inline void devm_nsio_disable(struct device *dev, |
| 384 | struct nd_namespace_io *nsio) |
| 385 | { |
| 386 | } |
| 387 | #endif |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 388 | int nd_blk_region_init(struct nd_region *nd_region); |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 389 | int nd_region_activate(struct nd_region *nd_region); |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 390 | void __nd_iostat_start(struct bio *bio, unsigned long *start); |
| 391 | static inline bool nd_iostat_start(struct bio *bio, unsigned long *start) |
| 392 | { |
Christoph Hellwig | 74d4699 | 2017-08-23 19:10:32 +0200 | [diff] [blame] | 393 | struct gendisk *disk = bio->bi_disk; |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 394 | |
| 395 | if (!blk_queue_io_stat(disk->queue)) |
| 396 | return false; |
| 397 | |
Toshi Kani | 8d7c22a | 2016-10-19 08:19:44 -0600 | [diff] [blame] | 398 | *start = jiffies; |
Jens Axboe | d62e26b | 2017-06-30 21:55:08 -0600 | [diff] [blame] | 399 | generic_start_io_acct(disk->queue, bio_data_dir(bio), |
Toshi Kani | 8d7c22a | 2016-10-19 08:19:44 -0600 | [diff] [blame] | 400 | bio_sectors(bio), &disk->part0); |
Dan Williams | f0dc089 | 2015-05-16 12:28:53 -0400 | [diff] [blame] | 401 | return true; |
| 402 | } |
Toshi Kani | 8d7c22a | 2016-10-19 08:19:44 -0600 | [diff] [blame] | 403 | static inline void nd_iostat_end(struct bio *bio, unsigned long start) |
| 404 | { |
Christoph Hellwig | 74d4699 | 2017-08-23 19:10:32 +0200 | [diff] [blame] | 405 | struct gendisk *disk = bio->bi_disk; |
Toshi Kani | 8d7c22a | 2016-10-19 08:19:44 -0600 | [diff] [blame] | 406 | |
Jens Axboe | d62e26b | 2017-06-30 21:55:08 -0600 | [diff] [blame] | 407 | generic_end_io_acct(disk->queue, bio_data_dir(bio), &disk->part0, |
| 408 | start); |
Toshi Kani | 8d7c22a | 2016-10-19 08:19:44 -0600 | [diff] [blame] | 409 | } |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 410 | static inline bool is_bad_pmem(struct badblocks *bb, sector_t sector, |
| 411 | unsigned int len) |
| 412 | { |
| 413 | if (bb->count) { |
| 414 | sector_t first_bad; |
| 415 | int num_bad; |
| 416 | |
| 417 | return !!badblocks_check(bb, sector, len / 512, &first_bad, |
| 418 | &num_bad); |
| 419 | } |
| 420 | |
| 421 | return false; |
| 422 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 423 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
Vishal Verma | 6ec6895 | 2015-07-29 14:58:09 -0600 | [diff] [blame] | 424 | const u8 *nd_dev_to_uuid(struct device *dev); |
Dan Williams | 004f1af | 2015-08-24 19:20:23 -0400 | [diff] [blame] | 425 | bool pmem_should_map_pages(struct device *dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 426 | #endif /* __ND_H__ */ |