Greg Kroah-Hartman | 5fd54ac | 2017-11-03 11:28:30 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 2 | /* |
| 3 | * MUSB OTG driver - support for Mentor's DMA controller |
| 4 | * |
| 5 | * Copyright 2005 Mentor Graphics Corporation |
| 6 | * Copyright (C) 2005-2007 by Texas Instruments |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 9 | #define MUSB_HSDMA_BASE 0x200 |
| 10 | #define MUSB_HSDMA_INTR (MUSB_HSDMA_BASE + 0) |
| 11 | #define MUSB_HSDMA_CONTROL 0x4 |
| 12 | #define MUSB_HSDMA_ADDRESS 0x8 |
| 13 | #define MUSB_HSDMA_COUNT 0xc |
| 14 | |
| 15 | #define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \ |
| 16 | (MUSB_HSDMA_BASE + (_bchannel << 4) + _offset) |
| 17 | |
| 18 | #define musb_read_hsdma_addr(mbase, bchannel) \ |
| 19 | musb_readl(mbase, \ |
| 20 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS)) |
| 21 | |
| 22 | #define musb_write_hsdma_addr(mbase, bchannel, addr) \ |
| 23 | musb_writel(mbase, \ |
| 24 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS), \ |
| 25 | addr) |
| 26 | |
Anand Gadiyar | 452f039 | 2009-12-28 13:40:35 +0200 | [diff] [blame] | 27 | #define musb_read_hsdma_count(mbase, bchannel) \ |
| 28 | musb_readl(mbase, \ |
| 29 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT)) |
| 30 | |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 31 | #define musb_write_hsdma_count(mbase, bchannel, len) \ |
| 32 | musb_writel(mbase, \ |
| 33 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT), \ |
| 34 | len) |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 35 | /* control register (16-bit): */ |
| 36 | #define MUSB_HSDMA_ENABLE_SHIFT 0 |
| 37 | #define MUSB_HSDMA_TRANSMIT_SHIFT 1 |
| 38 | #define MUSB_HSDMA_MODE1_SHIFT 2 |
| 39 | #define MUSB_HSDMA_IRQENABLE_SHIFT 3 |
| 40 | #define MUSB_HSDMA_ENDPOINT_SHIFT 4 |
| 41 | #define MUSB_HSDMA_BUSERROR_SHIFT 8 |
| 42 | #define MUSB_HSDMA_BURSTMODE_SHIFT 9 |
| 43 | #define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT) |
| 44 | #define MUSB_HSDMA_BURSTMODE_UNSPEC 0 |
| 45 | #define MUSB_HSDMA_BURSTMODE_INCR4 1 |
| 46 | #define MUSB_HSDMA_BURSTMODE_INCR8 2 |
| 47 | #define MUSB_HSDMA_BURSTMODE_INCR16 3 |
| 48 | |
| 49 | #define MUSB_HSDMA_CHANNELS 8 |
| 50 | |
| 51 | struct musb_dma_controller; |
| 52 | |
| 53 | struct musb_dma_channel { |
| 54 | struct dma_channel channel; |
| 55 | struct musb_dma_controller *controller; |
| 56 | u32 start_addr; |
| 57 | u32 len; |
| 58 | u16 max_packet_sz; |
| 59 | u8 idx; |
| 60 | u8 epnum; |
| 61 | u8 transmit; |
| 62 | }; |
| 63 | |
| 64 | struct musb_dma_controller { |
| 65 | struct dma_controller controller; |
| 66 | struct musb_dma_channel channel[MUSB_HSDMA_CHANNELS]; |
| 67 | void *private_data; |
| 68 | void __iomem *base; |
| 69 | u8 channel_count; |
| 70 | u8 used_channels; |
Tony Lindgren | 8c300fe | 2017-01-03 18:13:48 -0600 | [diff] [blame] | 71 | int irq; |
Bryan Wu | 6995eb6 | 2008-12-02 21:33:47 +0200 | [diff] [blame] | 72 | }; |