Philippe CORNU | 46fc515 | 2017-07-17 09:40:20 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) STMicroelectronics SA 2017 |
| 3 | * |
| 4 | * Authors: Philippe Cornu <philippe.cornu@st.com> |
| 5 | * Yannick Fertre <yannick.fertre@st.com> |
| 6 | * |
| 7 | * License terms: GNU General Public License (GPL), version 2 |
| 8 | */ |
| 9 | |
| 10 | #ifndef __DW_MIPI_DSI__ |
| 11 | #define __DW_MIPI_DSI__ |
| 12 | |
Brian Norris | 8242ecb | 2017-11-27 17:05:38 -0800 | [diff] [blame] | 13 | struct dw_mipi_dsi; |
| 14 | |
Philippe CORNU | 46fc515 | 2017-07-17 09:40:20 +0200 | [diff] [blame] | 15 | struct dw_mipi_dsi_phy_ops { |
| 16 | int (*init)(void *priv_data); |
| 17 | int (*get_lane_mbps)(void *priv_data, struct drm_display_mode *mode, |
| 18 | unsigned long mode_flags, u32 lanes, u32 format, |
| 19 | unsigned int *lane_mbps); |
| 20 | }; |
| 21 | |
| 22 | struct dw_mipi_dsi_plat_data { |
| 23 | void __iomem *base; |
| 24 | unsigned int max_data_lanes; |
| 25 | |
| 26 | enum drm_mode_status (*mode_valid)(void *priv_data, |
| 27 | const struct drm_display_mode *mode); |
| 28 | |
| 29 | const struct dw_mipi_dsi_phy_ops *phy_ops; |
| 30 | |
| 31 | void *priv_data; |
| 32 | }; |
| 33 | |
Brian Norris | 8242ecb | 2017-11-27 17:05:38 -0800 | [diff] [blame] | 34 | struct dw_mipi_dsi *dw_mipi_dsi_probe(struct platform_device *pdev, |
| 35 | const struct dw_mipi_dsi_plat_data |
| 36 | *plat_data); |
| 37 | void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi); |
| 38 | struct dw_mipi_dsi *dw_mipi_dsi_bind(struct platform_device *pdev, |
| 39 | struct drm_encoder *encoder, |
| 40 | const struct dw_mipi_dsi_plat_data |
| 41 | *plat_data); |
| 42 | void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi); |
Philippe CORNU | 46fc515 | 2017-07-17 09:40:20 +0200 | [diff] [blame] | 43 | |
| 44 | #endif /* __DW_MIPI_DSI__ */ |