Jeeja KP | d255b09 | 2015-07-21 23:53:56 +0530 | [diff] [blame] | 1 | /* |
| 2 | * skl-message.c - HDA DSP interface for FW registration, Pipe and Module |
| 3 | * configurations |
| 4 | * |
| 5 | * Copyright (C) 2015 Intel Corp |
| 6 | * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> |
| 7 | * Jeeja KP <jeeja.kp@intel.com> |
| 8 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as version 2, as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/pci.h> |
| 22 | #include <sound/core.h> |
| 23 | #include <sound/pcm.h> |
| 24 | #include "skl-sst-dsp.h" |
| 25 | #include "skl-sst-ipc.h" |
| 26 | #include "skl.h" |
| 27 | #include "../common/sst-dsp.h" |
| 28 | #include "../common/sst-dsp-priv.h" |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 29 | #include "skl-topology.h" |
| 30 | #include "skl-tplg-interface.h" |
Jeeja KP | d255b09 | 2015-07-21 23:53:56 +0530 | [diff] [blame] | 31 | |
| 32 | static int skl_alloc_dma_buf(struct device *dev, |
| 33 | struct snd_dma_buffer *dmab, size_t size) |
| 34 | { |
| 35 | struct hdac_ext_bus *ebus = dev_get_drvdata(dev); |
| 36 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 37 | |
| 38 | if (!bus) |
| 39 | return -ENODEV; |
| 40 | |
| 41 | return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab); |
| 42 | } |
| 43 | |
| 44 | static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab) |
| 45 | { |
| 46 | struct hdac_ext_bus *ebus = dev_get_drvdata(dev); |
| 47 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 48 | |
| 49 | if (!bus) |
| 50 | return -ENODEV; |
| 51 | |
| 52 | bus->io_ops->dma_free_pages(bus, dmab); |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | int skl_init_dsp(struct skl *skl) |
| 58 | { |
| 59 | void __iomem *mmio_base; |
| 60 | struct hdac_ext_bus *ebus = &skl->ebus; |
| 61 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 62 | int irq = bus->irq; |
| 63 | struct skl_dsp_loader_ops loader_ops; |
| 64 | int ret; |
| 65 | |
| 66 | loader_ops.alloc_dma_buf = skl_alloc_dma_buf; |
| 67 | loader_ops.free_dma_buf = skl_free_dma_buf; |
| 68 | |
| 69 | /* enable ppcap interrupt */ |
| 70 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); |
| 71 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); |
| 72 | |
| 73 | /* read the BAR of the ADSP MMIO */ |
| 74 | mmio_base = pci_ioremap_bar(skl->pci, 4); |
| 75 | if (mmio_base == NULL) { |
| 76 | dev_err(bus->dev, "ioremap error\n"); |
| 77 | return -ENXIO; |
| 78 | } |
| 79 | |
| 80 | ret = skl_sst_dsp_init(bus->dev, mmio_base, irq, |
| 81 | loader_ops, &skl->skl_sst); |
| 82 | |
| 83 | dev_dbg(bus->dev, "dsp registration status=%d\n", ret); |
| 84 | |
| 85 | return ret; |
| 86 | } |
| 87 | |
| 88 | void skl_free_dsp(struct skl *skl) |
| 89 | { |
| 90 | struct hdac_ext_bus *ebus = &skl->ebus; |
| 91 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 92 | struct skl_sst *ctx = skl->skl_sst; |
| 93 | |
| 94 | /* disable ppcap interrupt */ |
| 95 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); |
| 96 | |
| 97 | skl_sst_dsp_cleanup(bus->dev, ctx); |
| 98 | if (ctx->dsp->addr.lpe) |
| 99 | iounmap(ctx->dsp->addr.lpe); |
| 100 | } |
| 101 | |
| 102 | int skl_suspend_dsp(struct skl *skl) |
| 103 | { |
| 104 | struct skl_sst *ctx = skl->skl_sst; |
| 105 | int ret; |
| 106 | |
| 107 | /* if ppcap is not supported return 0 */ |
| 108 | if (!skl->ebus.ppcap) |
| 109 | return 0; |
| 110 | |
| 111 | ret = skl_dsp_sleep(ctx->dsp); |
| 112 | if (ret < 0) |
| 113 | return ret; |
| 114 | |
| 115 | /* disable ppcap interrupt */ |
| 116 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); |
| 117 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false); |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | int skl_resume_dsp(struct skl *skl) |
| 123 | { |
| 124 | struct skl_sst *ctx = skl->skl_sst; |
| 125 | |
| 126 | /* if ppcap is not supported return 0 */ |
| 127 | if (!skl->ebus.ppcap) |
| 128 | return 0; |
| 129 | |
| 130 | /* enable ppcap interrupt */ |
| 131 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); |
| 132 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); |
| 133 | |
| 134 | return skl_dsp_wake(ctx->dsp); |
| 135 | } |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 136 | |
| 137 | enum skl_bitdepth skl_get_bit_depth(int params) |
| 138 | { |
| 139 | switch (params) { |
| 140 | case 8: |
| 141 | return SKL_DEPTH_8BIT; |
| 142 | |
| 143 | case 16: |
| 144 | return SKL_DEPTH_16BIT; |
| 145 | |
| 146 | case 24: |
| 147 | return SKL_DEPTH_24BIT; |
| 148 | |
| 149 | case 32: |
| 150 | return SKL_DEPTH_32BIT; |
| 151 | |
| 152 | default: |
| 153 | return SKL_DEPTH_INVALID; |
| 154 | |
| 155 | } |
| 156 | } |
| 157 | |
| 158 | static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg) |
| 159 | { |
| 160 | u32 config; |
| 161 | |
| 162 | switch (ch_cfg) { |
| 163 | case SKL_CH_CFG_MONO: |
| 164 | config = (0xFFFFFFF0 | SKL_CHANNEL_LEFT); |
| 165 | break; |
| 166 | |
| 167 | case SKL_CH_CFG_STEREO: |
| 168 | config = (0xFFFFFF00 | SKL_CHANNEL_LEFT |
| 169 | | (SKL_CHANNEL_RIGHT << 4)); |
| 170 | break; |
| 171 | |
| 172 | case SKL_CH_CFG_2_1: |
| 173 | config = (0xFFFFF000 | SKL_CHANNEL_LEFT |
| 174 | | (SKL_CHANNEL_RIGHT << 4) |
| 175 | | (SKL_CHANNEL_LFE << 8)); |
| 176 | break; |
| 177 | |
| 178 | case SKL_CH_CFG_3_0: |
| 179 | config = (0xFFFFF000 | SKL_CHANNEL_LEFT |
| 180 | | (SKL_CHANNEL_CENTER << 4) |
| 181 | | (SKL_CHANNEL_RIGHT << 8)); |
| 182 | break; |
| 183 | |
| 184 | case SKL_CH_CFG_3_1: |
| 185 | config = (0xFFFF0000 | SKL_CHANNEL_LEFT |
| 186 | | (SKL_CHANNEL_CENTER << 4) |
| 187 | | (SKL_CHANNEL_RIGHT << 8) |
| 188 | | (SKL_CHANNEL_LFE << 12)); |
| 189 | break; |
| 190 | |
| 191 | case SKL_CH_CFG_QUATRO: |
| 192 | config = (0xFFFF0000 | SKL_CHANNEL_LEFT |
| 193 | | (SKL_CHANNEL_RIGHT << 4) |
| 194 | | (SKL_CHANNEL_LEFT_SURROUND << 8) |
| 195 | | (SKL_CHANNEL_RIGHT_SURROUND << 12)); |
| 196 | break; |
| 197 | |
| 198 | case SKL_CH_CFG_4_0: |
| 199 | config = (0xFFFF0000 | SKL_CHANNEL_LEFT |
| 200 | | (SKL_CHANNEL_CENTER << 4) |
| 201 | | (SKL_CHANNEL_RIGHT << 8) |
| 202 | | (SKL_CHANNEL_CENTER_SURROUND << 12)); |
| 203 | break; |
| 204 | |
| 205 | case SKL_CH_CFG_5_0: |
| 206 | config = (0xFFF00000 | SKL_CHANNEL_LEFT |
| 207 | | (SKL_CHANNEL_CENTER << 4) |
| 208 | | (SKL_CHANNEL_RIGHT << 8) |
| 209 | | (SKL_CHANNEL_LEFT_SURROUND << 12) |
| 210 | | (SKL_CHANNEL_RIGHT_SURROUND << 16)); |
| 211 | break; |
| 212 | |
| 213 | case SKL_CH_CFG_5_1: |
| 214 | config = (0xFF000000 | SKL_CHANNEL_CENTER |
| 215 | | (SKL_CHANNEL_LEFT << 4) |
| 216 | | (SKL_CHANNEL_RIGHT << 8) |
| 217 | | (SKL_CHANNEL_LEFT_SURROUND << 12) |
| 218 | | (SKL_CHANNEL_RIGHT_SURROUND << 16) |
| 219 | | (SKL_CHANNEL_LFE << 20)); |
| 220 | break; |
| 221 | |
| 222 | case SKL_CH_CFG_DUAL_MONO: |
| 223 | config = (0xFFFFFF00 | SKL_CHANNEL_LEFT |
| 224 | | (SKL_CHANNEL_LEFT << 4)); |
| 225 | break; |
| 226 | |
| 227 | case SKL_CH_CFG_I2S_DUAL_STEREO_0: |
| 228 | config = (0xFFFFFF00 | SKL_CHANNEL_LEFT |
| 229 | | (SKL_CHANNEL_RIGHT << 4)); |
| 230 | break; |
| 231 | |
| 232 | case SKL_CH_CFG_I2S_DUAL_STEREO_1: |
| 233 | config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8) |
| 234 | | (SKL_CHANNEL_RIGHT << 12)); |
| 235 | break; |
| 236 | |
| 237 | default: |
| 238 | config = 0xFFFFFFFF; |
| 239 | break; |
| 240 | |
| 241 | } |
| 242 | |
| 243 | return config; |
| 244 | } |
| 245 | |
| 246 | /* |
| 247 | * Each module in DSP expects a base module configuration, which consists of |
| 248 | * PCM format information, which we calculate in driver and resource values |
| 249 | * which are read from widget information passed through topology binary |
| 250 | * This is send when we create a module with INIT_INSTANCE IPC msg |
| 251 | */ |
| 252 | static void skl_set_base_module_format(struct skl_sst *ctx, |
| 253 | struct skl_module_cfg *mconfig, |
| 254 | struct skl_base_cfg *base_cfg) |
| 255 | { |
| 256 | struct skl_module_fmt *format = &mconfig->in_fmt; |
| 257 | |
| 258 | base_cfg->audio_fmt.number_of_channels = (u8)format->channels; |
| 259 | |
| 260 | base_cfg->audio_fmt.s_freq = format->s_freq; |
| 261 | base_cfg->audio_fmt.bit_depth = format->bit_depth; |
| 262 | base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth; |
| 263 | base_cfg->audio_fmt.ch_cfg = format->ch_cfg; |
| 264 | |
| 265 | dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n", |
| 266 | format->bit_depth, format->valid_bit_depth, |
| 267 | format->ch_cfg); |
| 268 | |
| 269 | base_cfg->audio_fmt.channel_map = skl_create_channel_map( |
| 270 | base_cfg->audio_fmt.ch_cfg); |
| 271 | |
| 272 | base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL; |
| 273 | |
| 274 | base_cfg->cps = mconfig->mcps; |
| 275 | base_cfg->ibs = mconfig->ibs; |
| 276 | base_cfg->obs = mconfig->obs; |
| 277 | } |
| 278 | |
| 279 | /* |
| 280 | * Copies copier capabilities into copier module and updates copier module |
| 281 | * config size. |
| 282 | */ |
| 283 | static void skl_copy_copier_caps(struct skl_module_cfg *mconfig, |
| 284 | struct skl_cpr_cfg *cpr_mconfig) |
| 285 | { |
| 286 | if (mconfig->formats_config.caps_size == 0) |
| 287 | return; |
| 288 | |
| 289 | memcpy(cpr_mconfig->gtw_cfg.config_data, |
| 290 | mconfig->formats_config.caps, |
| 291 | mconfig->formats_config.caps_size); |
| 292 | |
| 293 | cpr_mconfig->gtw_cfg.config_length = |
| 294 | (mconfig->formats_config.caps_size) / 4; |
| 295 | } |
| 296 | |
| 297 | /* |
| 298 | * Calculate the gatewat settings required for copier module, type of |
| 299 | * gateway and index of gateway to use |
| 300 | */ |
| 301 | static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, |
| 302 | struct skl_module_cfg *mconfig, |
| 303 | struct skl_cpr_cfg *cpr_mconfig) |
| 304 | { |
| 305 | union skl_connector_node_id node_id = {0}; |
| 306 | struct skl_pipe_params *params = mconfig->pipe->p_params; |
| 307 | |
| 308 | switch (mconfig->dev_type) { |
| 309 | case SKL_DEVICE_BT: |
| 310 | node_id.node.dma_type = |
| 311 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? |
| 312 | SKL_DMA_I2S_LINK_OUTPUT_CLASS : |
| 313 | SKL_DMA_I2S_LINK_INPUT_CLASS; |
| 314 | node_id.node.vindex = params->host_dma_id + |
| 315 | (mconfig->vbus_id << 3); |
| 316 | break; |
| 317 | |
| 318 | case SKL_DEVICE_I2S: |
| 319 | node_id.node.dma_type = |
| 320 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? |
| 321 | SKL_DMA_I2S_LINK_OUTPUT_CLASS : |
| 322 | SKL_DMA_I2S_LINK_INPUT_CLASS; |
| 323 | node_id.node.vindex = params->host_dma_id + |
| 324 | (mconfig->time_slot << 1) + |
| 325 | (mconfig->vbus_id << 3); |
| 326 | break; |
| 327 | |
| 328 | case SKL_DEVICE_DMIC: |
| 329 | node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS; |
| 330 | node_id.node.vindex = mconfig->vbus_id + |
| 331 | (mconfig->time_slot); |
| 332 | break; |
| 333 | |
| 334 | case SKL_DEVICE_HDALINK: |
| 335 | node_id.node.dma_type = |
| 336 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? |
| 337 | SKL_DMA_HDA_LINK_OUTPUT_CLASS : |
| 338 | SKL_DMA_HDA_LINK_INPUT_CLASS; |
| 339 | node_id.node.vindex = params->link_dma_id; |
| 340 | break; |
| 341 | |
| 342 | default: |
| 343 | node_id.node.dma_type = |
| 344 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? |
| 345 | SKL_DMA_HDA_HOST_OUTPUT_CLASS : |
| 346 | SKL_DMA_HDA_HOST_INPUT_CLASS; |
| 347 | node_id.node.vindex = params->host_dma_id; |
| 348 | break; |
| 349 | } |
| 350 | |
| 351 | cpr_mconfig->gtw_cfg.node_id = node_id.val; |
| 352 | |
| 353 | if (SKL_CONN_SOURCE == mconfig->hw_conn_type) |
| 354 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; |
| 355 | else |
| 356 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs; |
| 357 | |
| 358 | cpr_mconfig->cpr_feature_mask = 0; |
| 359 | cpr_mconfig->gtw_cfg.config_length = 0; |
| 360 | |
| 361 | skl_copy_copier_caps(mconfig, cpr_mconfig); |
| 362 | } |
| 363 | |
| 364 | static void skl_setup_out_format(struct skl_sst *ctx, |
| 365 | struct skl_module_cfg *mconfig, |
| 366 | struct skl_audio_data_format *out_fmt) |
| 367 | { |
| 368 | struct skl_module_fmt *format = &mconfig->out_fmt; |
| 369 | |
| 370 | out_fmt->number_of_channels = (u8)format->channels; |
| 371 | out_fmt->s_freq = format->s_freq; |
| 372 | out_fmt->bit_depth = format->bit_depth; |
| 373 | out_fmt->valid_bit_depth = format->valid_bit_depth; |
| 374 | out_fmt->ch_cfg = format->ch_cfg; |
| 375 | |
| 376 | out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg); |
| 377 | out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL; |
| 378 | |
| 379 | dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n", |
| 380 | out_fmt->number_of_channels, format->s_freq, format->bit_depth); |
| 381 | } |
| 382 | |
| 383 | /* |
Hardik T Shah | a0ffe48 | 2015-08-01 19:40:42 +0530 | [diff] [blame] | 384 | * DSP needs SRC module for frequency conversion, SRC takes base module |
| 385 | * configuration and the target frequency as extra parameter passed as src |
| 386 | * config |
| 387 | */ |
| 388 | static void skl_set_src_format(struct skl_sst *ctx, |
| 389 | struct skl_module_cfg *mconfig, |
| 390 | struct skl_src_module_cfg *src_mconfig) |
| 391 | { |
| 392 | struct skl_module_fmt *fmt = &mconfig->out_fmt; |
| 393 | |
| 394 | skl_set_base_module_format(ctx, mconfig, |
| 395 | (struct skl_base_cfg *)src_mconfig); |
| 396 | |
| 397 | src_mconfig->src_cfg = fmt->s_freq; |
| 398 | } |
| 399 | |
| 400 | /* |
| 401 | * DSP needs updown module to do channel conversion. updown module take base |
| 402 | * module configuration and channel configuration |
| 403 | * It also take coefficients and now we have defaults applied here |
| 404 | */ |
| 405 | static void skl_set_updown_mixer_format(struct skl_sst *ctx, |
| 406 | struct skl_module_cfg *mconfig, |
| 407 | struct skl_up_down_mixer_cfg *mixer_mconfig) |
| 408 | { |
| 409 | struct skl_module_fmt *fmt = &mconfig->out_fmt; |
| 410 | int i = 0; |
| 411 | |
| 412 | skl_set_base_module_format(ctx, mconfig, |
| 413 | (struct skl_base_cfg *)mixer_mconfig); |
| 414 | mixer_mconfig->out_ch_cfg = fmt->ch_cfg; |
| 415 | |
| 416 | /* Select F/W default coefficient */ |
| 417 | mixer_mconfig->coeff_sel = 0x0; |
| 418 | |
| 419 | /* User coeff, don't care since we are selecting F/W defaults */ |
| 420 | for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++) |
| 421 | mixer_mconfig->coeff[i] = 0xDEADBEEF; |
| 422 | } |
| 423 | |
| 424 | /* |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 425 | * 'copier' is DSP internal module which copies data from Host DMA (HDA host |
| 426 | * dma) or link (hda link, SSP, PDM) |
| 427 | * Here we calculate the copier module parameters, like PCM format, output |
| 428 | * format, gateway settings |
| 429 | * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg |
| 430 | */ |
| 431 | static void skl_set_copier_format(struct skl_sst *ctx, |
| 432 | struct skl_module_cfg *mconfig, |
| 433 | struct skl_cpr_cfg *cpr_mconfig) |
| 434 | { |
| 435 | struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt; |
| 436 | struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig; |
| 437 | |
| 438 | skl_set_base_module_format(ctx, mconfig, base_cfg); |
| 439 | |
| 440 | skl_setup_out_format(ctx, mconfig, out_fmt); |
| 441 | skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig); |
| 442 | } |
| 443 | |
| 444 | static u16 skl_get_module_param_size(struct skl_sst *ctx, |
| 445 | struct skl_module_cfg *mconfig) |
| 446 | { |
| 447 | u16 param_size; |
| 448 | |
| 449 | switch (mconfig->m_type) { |
| 450 | case SKL_MODULE_TYPE_COPIER: |
| 451 | param_size = sizeof(struct skl_cpr_cfg); |
| 452 | param_size += mconfig->formats_config.caps_size; |
| 453 | return param_size; |
| 454 | |
Hardik T Shah | a0ffe48 | 2015-08-01 19:40:42 +0530 | [diff] [blame] | 455 | case SKL_MODULE_TYPE_SRCINT: |
| 456 | return sizeof(struct skl_src_module_cfg); |
| 457 | |
| 458 | case SKL_MODULE_TYPE_UPDWMIX: |
| 459 | return sizeof(struct skl_up_down_mixer_cfg); |
| 460 | |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 461 | default: |
| 462 | /* |
| 463 | * return only base cfg when no specific module type is |
| 464 | * specified |
| 465 | */ |
| 466 | return sizeof(struct skl_base_cfg); |
| 467 | } |
| 468 | |
| 469 | return 0; |
| 470 | } |
| 471 | |
| 472 | /* |
Hardik T Shah | a0ffe48 | 2015-08-01 19:40:42 +0530 | [diff] [blame] | 473 | * DSP firmware supports various modules like copier, SRC, updown etc. |
| 474 | * These modules required various parameters to be calculated and sent for |
| 475 | * the module initialization to DSP. By default a generic module needs only |
| 476 | * base module format configuration |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 477 | */ |
Hardik T Shah | a0ffe48 | 2015-08-01 19:40:42 +0530 | [diff] [blame] | 478 | |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 479 | static int skl_set_module_format(struct skl_sst *ctx, |
| 480 | struct skl_module_cfg *module_config, |
| 481 | u16 *module_config_size, |
| 482 | void **param_data) |
| 483 | { |
| 484 | u16 param_size; |
| 485 | |
| 486 | param_size = skl_get_module_param_size(ctx, module_config); |
| 487 | |
| 488 | *param_data = kzalloc(param_size, GFP_KERNEL); |
| 489 | if (NULL == *param_data) |
| 490 | return -ENOMEM; |
| 491 | |
| 492 | *module_config_size = param_size; |
| 493 | |
| 494 | switch (module_config->m_type) { |
| 495 | case SKL_MODULE_TYPE_COPIER: |
| 496 | skl_set_copier_format(ctx, module_config, *param_data); |
| 497 | break; |
| 498 | |
Hardik T Shah | a0ffe48 | 2015-08-01 19:40:42 +0530 | [diff] [blame] | 499 | case SKL_MODULE_TYPE_SRCINT: |
| 500 | skl_set_src_format(ctx, module_config, *param_data); |
| 501 | break; |
| 502 | |
| 503 | case SKL_MODULE_TYPE_UPDWMIX: |
| 504 | skl_set_updown_mixer_format(ctx, module_config, *param_data); |
| 505 | break; |
| 506 | |
Jeeja KP | 23db472 | 2015-08-01 19:40:41 +0530 | [diff] [blame] | 507 | default: |
| 508 | skl_set_base_module_format(ctx, module_config, *param_data); |
| 509 | break; |
| 510 | |
| 511 | } |
| 512 | |
| 513 | dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n", |
| 514 | module_config->id.module_id, param_size); |
| 515 | print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4, |
| 516 | *param_data, param_size, false); |
| 517 | return 0; |
| 518 | } |
| 519 | |
| 520 | static int skl_get_queue_index(struct skl_module_pin *mpin, |
| 521 | struct skl_module_inst_id id, int max) |
| 522 | { |
| 523 | int i; |
| 524 | |
| 525 | for (i = 0; i < max; i++) { |
| 526 | if (mpin[i].id.module_id == id.module_id && |
| 527 | mpin[i].id.instance_id == id.instance_id) |
| 528 | return i; |
| 529 | } |
| 530 | |
| 531 | return -EINVAL; |
| 532 | } |
| 533 | |
| 534 | /* |
| 535 | * Allocates queue for each module. |
| 536 | * if dynamic, the pin_index is allocated 0 to max_pin. |
| 537 | * In static, the pin_index is fixed based on module_id and instance id |
| 538 | */ |
| 539 | static int skl_alloc_queue(struct skl_module_pin *mpin, |
| 540 | struct skl_module_inst_id id, int max) |
| 541 | { |
| 542 | int i; |
| 543 | |
| 544 | /* |
| 545 | * if pin in dynamic, find first free pin |
| 546 | * otherwise find match module and instance id pin as topology will |
| 547 | * ensure a unique pin is assigned to this so no need to |
| 548 | * allocate/free |
| 549 | */ |
| 550 | for (i = 0; i < max; i++) { |
| 551 | if (mpin[i].is_dynamic) { |
| 552 | if (!mpin[i].in_use) { |
| 553 | mpin[i].in_use = true; |
| 554 | mpin[i].id.module_id = id.module_id; |
| 555 | mpin[i].id.instance_id = id.instance_id; |
| 556 | return i; |
| 557 | } |
| 558 | } else { |
| 559 | if (mpin[i].id.module_id == id.module_id && |
| 560 | mpin[i].id.instance_id == id.instance_id) |
| 561 | return i; |
| 562 | } |
| 563 | } |
| 564 | |
| 565 | return -EINVAL; |
| 566 | } |
| 567 | |
| 568 | static void skl_free_queue(struct skl_module_pin *mpin, int q_index) |
| 569 | { |
| 570 | if (mpin[q_index].is_dynamic) { |
| 571 | mpin[q_index].in_use = false; |
| 572 | mpin[q_index].id.module_id = 0; |
| 573 | mpin[q_index].id.instance_id = 0; |
| 574 | } |
| 575 | } |
Jeeja KP | beb73b2 | 2015-08-01 19:40:43 +0530 | [diff] [blame^] | 576 | |
| 577 | /* |
| 578 | * A module needs to be instanataited in DSP. A mdoule is present in a |
| 579 | * collection of module referred as a PIPE. |
| 580 | * We first calculate the module format, based on module type and then |
| 581 | * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper |
| 582 | */ |
| 583 | int skl_init_module(struct skl_sst *ctx, |
| 584 | struct skl_module_cfg *mconfig, char *param) |
| 585 | { |
| 586 | u16 module_config_size = 0; |
| 587 | void *param_data = NULL; |
| 588 | int ret; |
| 589 | struct skl_ipc_init_instance_msg msg; |
| 590 | |
| 591 | dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__, |
| 592 | mconfig->id.module_id, mconfig->id.instance_id); |
| 593 | |
| 594 | if (mconfig->pipe->state != SKL_PIPE_CREATED) { |
| 595 | dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n", |
| 596 | mconfig->pipe->state, mconfig->pipe->ppl_id); |
| 597 | return -EIO; |
| 598 | } |
| 599 | |
| 600 | ret = skl_set_module_format(ctx, mconfig, |
| 601 | &module_config_size, ¶m_data); |
| 602 | if (ret < 0) { |
| 603 | dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret); |
| 604 | return ret; |
| 605 | } |
| 606 | |
| 607 | msg.module_id = mconfig->id.module_id; |
| 608 | msg.instance_id = mconfig->id.instance_id; |
| 609 | msg.ppl_instance_id = mconfig->pipe->ppl_id; |
| 610 | msg.param_data_size = module_config_size; |
| 611 | msg.core_id = mconfig->core_id; |
| 612 | |
| 613 | ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data); |
| 614 | if (ret < 0) { |
| 615 | dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret); |
| 616 | kfree(param_data); |
| 617 | return ret; |
| 618 | } |
| 619 | mconfig->m_state = SKL_MODULE_INIT_DONE; |
| 620 | |
| 621 | return ret; |
| 622 | } |
| 623 | |
| 624 | static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg |
| 625 | *src_module, struct skl_module_cfg *dst_module) |
| 626 | { |
| 627 | dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n", |
| 628 | __func__, src_module->id.module_id, src_module->id.instance_id); |
| 629 | dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__, |
| 630 | dst_module->id.module_id, dst_module->id.instance_id); |
| 631 | |
| 632 | dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n", |
| 633 | src_module->m_state, dst_module->m_state); |
| 634 | } |
| 635 | |
| 636 | /* |
| 637 | * On module freeup, we need to unbind the module with modules |
| 638 | * it is already bind. |
| 639 | * Find the pin allocated and unbind then using bind_unbind IPC |
| 640 | */ |
| 641 | int skl_unbind_modules(struct skl_sst *ctx, |
| 642 | struct skl_module_cfg *src_mcfg, |
| 643 | struct skl_module_cfg *dst_mcfg) |
| 644 | { |
| 645 | int ret; |
| 646 | struct skl_ipc_bind_unbind_msg msg; |
| 647 | struct skl_module_inst_id src_id = src_mcfg->id; |
| 648 | struct skl_module_inst_id dst_id = dst_mcfg->id; |
| 649 | int in_max = dst_mcfg->max_in_queue; |
| 650 | int out_max = src_mcfg->max_out_queue; |
| 651 | int src_index, dst_index; |
| 652 | |
| 653 | skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); |
| 654 | |
| 655 | if (src_mcfg->m_state != SKL_MODULE_BIND_DONE) |
| 656 | return 0; |
| 657 | |
| 658 | /* |
| 659 | * if intra module unbind, check if both modules are BIND, |
| 660 | * then send unbind |
| 661 | */ |
| 662 | if ((src_mcfg->pipe->ppl_id != dst_mcfg->pipe->ppl_id) && |
| 663 | dst_mcfg->m_state != SKL_MODULE_BIND_DONE) |
| 664 | return 0; |
| 665 | else if (src_mcfg->m_state < SKL_MODULE_INIT_DONE && |
| 666 | dst_mcfg->m_state < SKL_MODULE_INIT_DONE) |
| 667 | return 0; |
| 668 | |
| 669 | /* get src queue index */ |
| 670 | src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max); |
| 671 | if (src_index < 0) |
| 672 | return -EINVAL; |
| 673 | |
| 674 | msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index; |
| 675 | |
| 676 | /* get dst queue index */ |
| 677 | dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max); |
| 678 | if (dst_index < 0) |
| 679 | return -EINVAL; |
| 680 | |
| 681 | msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index; |
| 682 | |
| 683 | msg.module_id = src_mcfg->id.module_id; |
| 684 | msg.instance_id = src_mcfg->id.instance_id; |
| 685 | msg.dst_module_id = dst_mcfg->id.module_id; |
| 686 | msg.dst_instance_id = dst_mcfg->id.instance_id; |
| 687 | msg.bind = false; |
| 688 | |
| 689 | ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); |
| 690 | if (!ret) { |
| 691 | src_mcfg->m_state = SKL_MODULE_UNINIT; |
| 692 | /* free queue only if unbind is success */ |
| 693 | skl_free_queue(src_mcfg->m_out_pin, src_index); |
| 694 | skl_free_queue(dst_mcfg->m_in_pin, dst_index); |
| 695 | } |
| 696 | |
| 697 | return ret; |
| 698 | } |
| 699 | |
| 700 | /* |
| 701 | * Once a module is instantiated it need to be 'bind' with other modules in |
| 702 | * the pipeline. For binding we need to find the module pins which are bind |
| 703 | * together |
| 704 | * This function finds the pins and then sends bund_unbind IPC message to |
| 705 | * DSP using IPC helper |
| 706 | */ |
| 707 | int skl_bind_modules(struct skl_sst *ctx, |
| 708 | struct skl_module_cfg *src_mcfg, |
| 709 | struct skl_module_cfg *dst_mcfg) |
| 710 | { |
| 711 | int ret; |
| 712 | struct skl_ipc_bind_unbind_msg msg; |
| 713 | struct skl_module_inst_id src_id = src_mcfg->id; |
| 714 | struct skl_module_inst_id dst_id = dst_mcfg->id; |
| 715 | int in_max = dst_mcfg->max_in_queue; |
| 716 | int out_max = src_mcfg->max_out_queue; |
| 717 | int src_index, dst_index; |
| 718 | |
| 719 | skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); |
| 720 | |
| 721 | if (src_mcfg->m_state < SKL_MODULE_INIT_DONE && |
| 722 | dst_mcfg->m_state < SKL_MODULE_INIT_DONE) |
| 723 | return 0; |
| 724 | |
| 725 | src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_id, out_max); |
| 726 | if (src_index < 0) |
| 727 | return -EINVAL; |
| 728 | |
| 729 | msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index; |
| 730 | dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_id, in_max); |
| 731 | if (dst_index < 0) { |
| 732 | skl_free_queue(src_mcfg->m_out_pin, src_index); |
| 733 | return -EINVAL; |
| 734 | } |
| 735 | |
| 736 | msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index; |
| 737 | |
| 738 | dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n", |
| 739 | msg.src_queue, msg.dst_queue); |
| 740 | |
| 741 | msg.module_id = src_mcfg->id.module_id; |
| 742 | msg.instance_id = src_mcfg->id.instance_id; |
| 743 | msg.dst_module_id = dst_mcfg->id.module_id; |
| 744 | msg.dst_instance_id = dst_mcfg->id.instance_id; |
| 745 | msg.bind = true; |
| 746 | |
| 747 | ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); |
| 748 | |
| 749 | if (!ret) { |
| 750 | src_mcfg->m_state = SKL_MODULE_BIND_DONE; |
| 751 | } else { |
| 752 | /* error case , if IPC fails, clear the queue index */ |
| 753 | skl_free_queue(src_mcfg->m_out_pin, src_index); |
| 754 | skl_free_queue(dst_mcfg->m_in_pin, dst_index); |
| 755 | } |
| 756 | |
| 757 | return ret; |
| 758 | } |