Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * Driver for Solarflare Solarstorm network controllers and boards |
Ben Hutchings | 0a6f40c | 2011-02-25 00:01:34 +0000 | [diff] [blame] | 3 | * Copyright 2008-2011 Solarflare Communications Inc. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | |
| 10 | #include <linux/delay.h> |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 11 | #include <asm/cmpxchg.h> |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 12 | #include "net_driver.h" |
| 13 | #include "nic.h" |
| 14 | #include "io.h" |
Ben Hutchings | 8b8a95a | 2012-09-18 01:57:07 +0100 | [diff] [blame] | 15 | #include "farch_regs.h" |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 16 | #include "mcdi_pcol.h" |
| 17 | #include "phy.h" |
| 18 | |
| 19 | /************************************************************************** |
| 20 | * |
| 21 | * Management-Controller-to-Driver Interface |
| 22 | * |
| 23 | ************************************************************************** |
| 24 | */ |
| 25 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 26 | #define MCDI_RPC_TIMEOUT (10 * HZ) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 27 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 28 | /* A reboot/assertion causes the MCDI status word to be set after the |
| 29 | * command word is set or a REBOOT event is sent. If we notice a reboot |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 30 | * via these mechanisms then wait 20ms for the status word to be set. |
| 31 | */ |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 32 | #define MCDI_STATUS_DELAY_US 100 |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 33 | #define MCDI_STATUS_DELAY_COUNT 200 |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 34 | #define MCDI_STATUS_SLEEP_MS \ |
| 35 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 36 | |
| 37 | #define SEQ_MASK \ |
| 38 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) |
| 39 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 40 | struct efx_mcdi_async_param { |
| 41 | struct list_head list; |
| 42 | unsigned int cmd; |
| 43 | size_t inlen; |
| 44 | size_t outlen; |
| 45 | efx_mcdi_async_completer *complete; |
| 46 | unsigned long cookie; |
| 47 | /* followed by request/response buffer */ |
| 48 | }; |
| 49 | |
| 50 | static void efx_mcdi_timeout_async(unsigned long context); |
| 51 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 52 | static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx) |
| 53 | { |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 54 | EFX_BUG_ON_PARANOID(!efx->mcdi); |
| 55 | return &efx->mcdi->iface; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 56 | } |
| 57 | |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 58 | int efx_mcdi_init(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 59 | { |
| 60 | struct efx_mcdi_iface *mcdi; |
| 61 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 62 | efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); |
| 63 | if (!efx->mcdi) |
| 64 | return -ENOMEM; |
| 65 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 66 | mcdi = efx_mcdi(efx); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 67 | mcdi->efx = efx; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 68 | init_waitqueue_head(&mcdi->wq); |
| 69 | spin_lock_init(&mcdi->iface_lock); |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 70 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 71 | mcdi->mode = MCDI_MODE_POLL; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 72 | spin_lock_init(&mcdi->async_lock); |
| 73 | INIT_LIST_HEAD(&mcdi->async_list); |
| 74 | setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async, |
| 75 | (unsigned long)mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 76 | |
| 77 | (void) efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 78 | mcdi->new_epoch = true; |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 79 | |
| 80 | /* Recover from a failed assertion before probing */ |
| 81 | return efx_mcdi_handle_assertion(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 84 | void efx_mcdi_fini(struct efx_nic *efx) |
| 85 | { |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 86 | BUG_ON(efx->mcdi && efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 87 | kfree(efx->mcdi); |
| 88 | } |
| 89 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 90 | static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, |
| 91 | const efx_dword_t *inbuf, size_t inlen) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 92 | { |
| 93 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 94 | efx_dword_t hdr[2]; |
| 95 | size_t hdr_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 96 | u32 xflags, seqno; |
| 97 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 98 | BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 99 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 100 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ |
| 101 | spin_lock_bh(&mcdi->iface_lock); |
| 102 | ++mcdi->seqno; |
| 103 | spin_unlock_bh(&mcdi->iface_lock); |
| 104 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 105 | seqno = mcdi->seqno & SEQ_MASK; |
| 106 | xflags = 0; |
| 107 | if (mcdi->mode == MCDI_MODE_EVENTS) |
| 108 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; |
| 109 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 110 | if (efx->type->mcdi_max_ver == 1) { |
| 111 | /* MCDI v1 */ |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 112 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 113 | MCDI_HEADER_RESPONSE, 0, |
| 114 | MCDI_HEADER_RESYNC, 1, |
| 115 | MCDI_HEADER_CODE, cmd, |
| 116 | MCDI_HEADER_DATALEN, inlen, |
| 117 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 118 | MCDI_HEADER_XFLAGS, xflags, |
| 119 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 120 | hdr_len = 4; |
| 121 | } else { |
| 122 | /* MCDI v2 */ |
| 123 | BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 124 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 125 | MCDI_HEADER_RESPONSE, 0, |
| 126 | MCDI_HEADER_RESYNC, 1, |
| 127 | MCDI_HEADER_CODE, MC_CMD_V2_EXTN, |
| 128 | MCDI_HEADER_DATALEN, 0, |
| 129 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 130 | MCDI_HEADER_XFLAGS, xflags, |
| 131 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 132 | EFX_POPULATE_DWORD_2(hdr[1], |
| 133 | MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, |
| 134 | MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); |
| 135 | hdr_len = 8; |
| 136 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 137 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 138 | efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 139 | |
| 140 | mcdi->new_epoch = false; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 141 | } |
| 142 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 143 | static int efx_mcdi_errno(unsigned int mcdi_err) |
| 144 | { |
| 145 | switch (mcdi_err) { |
| 146 | case 0: |
| 147 | return 0; |
| 148 | #define TRANSLATE_ERROR(name) \ |
| 149 | case MC_CMD_ERR_ ## name: \ |
| 150 | return -name; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 151 | TRANSLATE_ERROR(EPERM); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 152 | TRANSLATE_ERROR(ENOENT); |
| 153 | TRANSLATE_ERROR(EINTR); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 154 | TRANSLATE_ERROR(EAGAIN); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 155 | TRANSLATE_ERROR(EACCES); |
| 156 | TRANSLATE_ERROR(EBUSY); |
| 157 | TRANSLATE_ERROR(EINVAL); |
| 158 | TRANSLATE_ERROR(EDEADLK); |
| 159 | TRANSLATE_ERROR(ENOSYS); |
| 160 | TRANSLATE_ERROR(ETIME); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 161 | TRANSLATE_ERROR(EALREADY); |
| 162 | TRANSLATE_ERROR(ENOSPC); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 163 | #undef TRANSLATE_ERROR |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 164 | case MC_CMD_ERR_ALLOC_FAIL: |
| 165 | return -ENOBUFS; |
| 166 | case MC_CMD_ERR_MAC_EXIST: |
| 167 | return -EADDRINUSE; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 168 | default: |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 169 | return -EPROTO; |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | static void efx_mcdi_read_response_header(struct efx_nic *efx) |
| 174 | { |
| 175 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 176 | unsigned int respseq, respcmd, error; |
| 177 | efx_dword_t hdr; |
| 178 | |
| 179 | efx->type->mcdi_read_response(efx, &hdr, 0, 4); |
| 180 | respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); |
| 181 | respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); |
| 182 | error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); |
| 183 | |
| 184 | if (respcmd != MC_CMD_V2_EXTN) { |
| 185 | mcdi->resp_hdr_len = 4; |
| 186 | mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); |
| 187 | } else { |
| 188 | efx->type->mcdi_read_response(efx, &hdr, 4, 4); |
| 189 | mcdi->resp_hdr_len = 8; |
| 190 | mcdi->resp_data_len = |
| 191 | EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); |
| 192 | } |
| 193 | |
| 194 | if (error && mcdi->resp_data_len == 0) { |
| 195 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); |
| 196 | mcdi->resprc = -EIO; |
| 197 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { |
| 198 | netif_err(efx, hw, efx->net_dev, |
| 199 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", |
| 200 | respseq, mcdi->seqno); |
| 201 | mcdi->resprc = -EIO; |
| 202 | } else if (error) { |
| 203 | efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); |
| 204 | mcdi->resprc = |
| 205 | efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0)); |
| 206 | } else { |
| 207 | mcdi->resprc = 0; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 208 | } |
| 209 | } |
| 210 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 211 | static int efx_mcdi_poll(struct efx_nic *efx) |
| 212 | { |
| 213 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 214 | unsigned long time, finish; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 215 | unsigned int spins; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 216 | int rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 217 | |
| 218 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 219 | rc = efx_mcdi_poll_reboot(efx); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 220 | if (rc) { |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 221 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 222 | mcdi->resprc = rc; |
| 223 | mcdi->resp_hdr_len = 0; |
| 224 | mcdi->resp_data_len = 0; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 225 | spin_unlock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 226 | return 0; |
| 227 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 228 | |
| 229 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, |
| 230 | * because generally mcdi responses are fast. After that, back off |
| 231 | * and poll once a jiffy (approximately) |
| 232 | */ |
| 233 | spins = TICK_USEC; |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 234 | finish = jiffies + MCDI_RPC_TIMEOUT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 235 | |
| 236 | while (1) { |
| 237 | if (spins != 0) { |
| 238 | --spins; |
| 239 | udelay(1); |
Ben Hutchings | 55029c1 | 2010-01-13 04:34:25 +0000 | [diff] [blame] | 240 | } else { |
| 241 | schedule_timeout_uninterruptible(1); |
| 242 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 243 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 244 | time = jiffies; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 245 | |
Ben Hutchings | 86c432c | 2011-09-01 12:09:29 +0000 | [diff] [blame] | 246 | rmb(); |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 247 | if (efx->type->mcdi_poll_response(efx)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 248 | break; |
| 249 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 250 | if (time_after(time, finish)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 251 | return -ETIMEDOUT; |
| 252 | } |
| 253 | |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 254 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 255 | efx_mcdi_read_response_header(efx); |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 256 | spin_unlock_bh(&mcdi->iface_lock); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 257 | |
| 258 | /* Return rc=0 like wait_event_timeout() */ |
| 259 | return 0; |
| 260 | } |
| 261 | |
Ben Hutchings | 876be08 | 2012-10-01 20:58:35 +0100 | [diff] [blame] | 262 | /* Test and clear MC-rebooted flag for this port/function; reset |
| 263 | * software state as necessary. |
| 264 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 265 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
| 266 | { |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 267 | if (!efx->mcdi) |
| 268 | return 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 269 | |
Ben Hutchings | cd0ecc9 | 2012-12-14 21:52:56 +0000 | [diff] [blame] | 270 | return efx->type->mcdi_poll_reboot(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 273 | static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) |
| 274 | { |
| 275 | return cmpxchg(&mcdi->state, |
| 276 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == |
| 277 | MCDI_STATE_QUIESCENT; |
| 278 | } |
| 279 | |
| 280 | static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 281 | { |
| 282 | /* Wait until the interface becomes QUIESCENT and we win the race |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 283 | * to mark it RUNNING_SYNC. |
| 284 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 285 | wait_event(mcdi->wq, |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 286 | cmpxchg(&mcdi->state, |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 287 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 288 | MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | static int efx_mcdi_await_completion(struct efx_nic *efx) |
| 292 | { |
| 293 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 294 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 295 | if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, |
| 296 | MCDI_RPC_TIMEOUT) == 0) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 297 | return -ETIMEDOUT; |
| 298 | |
| 299 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. |
| 300 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() |
| 301 | * completed the request first, then we'll just end up completing the |
| 302 | * request again, which is safe. |
| 303 | * |
| 304 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which |
| 305 | * wait_event_timeout() implicitly provides. |
| 306 | */ |
| 307 | if (mcdi->mode == MCDI_MODE_POLL) |
| 308 | return efx_mcdi_poll(efx); |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 313 | /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the |
| 314 | * requester. Return whether this was done. Does not take any locks. |
| 315 | */ |
| 316 | static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 317 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 318 | if (cmpxchg(&mcdi->state, |
| 319 | MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == |
| 320 | MCDI_STATE_RUNNING_SYNC) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 321 | wake_up(&mcdi->wq); |
| 322 | return true; |
| 323 | } |
| 324 | |
| 325 | return false; |
| 326 | } |
| 327 | |
| 328 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) |
| 329 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 330 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 331 | struct efx_mcdi_async_param *async; |
| 332 | struct efx_nic *efx = mcdi->efx; |
| 333 | |
| 334 | /* Process the asynchronous request queue */ |
| 335 | spin_lock_bh(&mcdi->async_lock); |
| 336 | async = list_first_entry_or_null( |
| 337 | &mcdi->async_list, struct efx_mcdi_async_param, list); |
| 338 | if (async) { |
| 339 | mcdi->state = MCDI_STATE_RUNNING_ASYNC; |
| 340 | efx_mcdi_send_request(efx, async->cmd, |
| 341 | (const efx_dword_t *)(async + 1), |
| 342 | async->inlen); |
| 343 | mod_timer(&mcdi->async_timer, |
| 344 | jiffies + MCDI_RPC_TIMEOUT); |
| 345 | } |
| 346 | spin_unlock_bh(&mcdi->async_lock); |
| 347 | |
| 348 | if (async) |
| 349 | return; |
| 350 | } |
| 351 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 352 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 353 | wake_up(&mcdi->wq); |
| 354 | } |
| 355 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 356 | /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the |
| 357 | * asynchronous completion function, and release the interface. |
| 358 | * Return whether this was done. Must be called in bh-disabled |
| 359 | * context. Will take iface_lock and async_lock. |
| 360 | */ |
| 361 | static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) |
| 362 | { |
| 363 | struct efx_nic *efx = mcdi->efx; |
| 364 | struct efx_mcdi_async_param *async; |
| 365 | size_t hdr_len, data_len; |
| 366 | efx_dword_t *outbuf; |
| 367 | int rc; |
| 368 | |
| 369 | if (cmpxchg(&mcdi->state, |
| 370 | MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != |
| 371 | MCDI_STATE_RUNNING_ASYNC) |
| 372 | return false; |
| 373 | |
| 374 | spin_lock(&mcdi->iface_lock); |
| 375 | if (timeout) { |
| 376 | /* Ensure that if the completion event arrives later, |
| 377 | * the seqno check in efx_mcdi_ev_cpl() will fail |
| 378 | */ |
| 379 | ++mcdi->seqno; |
| 380 | ++mcdi->credits; |
| 381 | rc = -ETIMEDOUT; |
| 382 | hdr_len = 0; |
| 383 | data_len = 0; |
| 384 | } else { |
| 385 | rc = mcdi->resprc; |
| 386 | hdr_len = mcdi->resp_hdr_len; |
| 387 | data_len = mcdi->resp_data_len; |
| 388 | } |
| 389 | spin_unlock(&mcdi->iface_lock); |
| 390 | |
| 391 | /* Stop the timer. In case the timer function is running, we |
| 392 | * must wait for it to return so that there is no possibility |
| 393 | * of it aborting the next request. |
| 394 | */ |
| 395 | if (!timeout) |
| 396 | del_timer_sync(&mcdi->async_timer); |
| 397 | |
| 398 | spin_lock(&mcdi->async_lock); |
| 399 | async = list_first_entry(&mcdi->async_list, |
| 400 | struct efx_mcdi_async_param, list); |
| 401 | list_del(&async->list); |
| 402 | spin_unlock(&mcdi->async_lock); |
| 403 | |
| 404 | outbuf = (efx_dword_t *)(async + 1); |
| 405 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 406 | min(async->outlen, data_len)); |
| 407 | async->complete(efx, async->cookie, rc, outbuf, data_len); |
| 408 | kfree(async); |
| 409 | |
| 410 | efx_mcdi_release(mcdi); |
| 411 | |
| 412 | return true; |
| 413 | } |
| 414 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 415 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 416 | unsigned int datalen, unsigned int mcdi_err) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 417 | { |
| 418 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 419 | bool wake = false; |
| 420 | |
| 421 | spin_lock(&mcdi->iface_lock); |
| 422 | |
| 423 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { |
| 424 | if (mcdi->credits) |
| 425 | /* The request has been cancelled */ |
| 426 | --mcdi->credits; |
| 427 | else |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 428 | netif_err(efx, hw, efx->net_dev, |
| 429 | "MC response mismatch tx seq 0x%x rx " |
| 430 | "seq 0x%x\n", seqno, mcdi->seqno); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 431 | } else { |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 432 | if (efx->type->mcdi_max_ver >= 2) { |
| 433 | /* MCDI v2 responses don't fit in an event */ |
| 434 | efx_mcdi_read_response_header(efx); |
| 435 | } else { |
| 436 | mcdi->resprc = efx_mcdi_errno(mcdi_err); |
| 437 | mcdi->resp_hdr_len = 4; |
| 438 | mcdi->resp_data_len = datalen; |
| 439 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 440 | |
| 441 | wake = true; |
| 442 | } |
| 443 | |
| 444 | spin_unlock(&mcdi->iface_lock); |
| 445 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 446 | if (wake) { |
| 447 | if (!efx_mcdi_complete_async(mcdi, false)) |
| 448 | (void) efx_mcdi_complete_sync(mcdi); |
| 449 | |
| 450 | /* If the interface isn't RUNNING_ASYNC or |
| 451 | * RUNNING_SYNC then we've received a duplicate |
| 452 | * completion after we've already transitioned back to |
| 453 | * QUIESCENT. [A subsequent invocation would increment |
| 454 | * seqno, so would have failed the seqno check]. |
| 455 | */ |
| 456 | } |
| 457 | } |
| 458 | |
| 459 | static void efx_mcdi_timeout_async(unsigned long context) |
| 460 | { |
| 461 | struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context; |
| 462 | |
| 463 | efx_mcdi_complete_async(mcdi, true); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 464 | } |
| 465 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 466 | static int |
| 467 | efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) |
| 468 | { |
| 469 | if (efx->type->mcdi_max_ver < 0 || |
| 470 | (efx->type->mcdi_max_ver < 2 && |
| 471 | cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) |
| 472 | return -EINVAL; |
| 473 | |
| 474 | if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || |
| 475 | (efx->type->mcdi_max_ver < 2 && |
| 476 | inlen > MCDI_CTL_SDU_LEN_MAX_V1)) |
| 477 | return -EMSGSIZE; |
| 478 | |
| 479 | return 0; |
| 480 | } |
| 481 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 482 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
Ben Hutchings | 9528b92 | 2012-09-14 17:31:41 +0100 | [diff] [blame] | 483 | const efx_dword_t *inbuf, size_t inlen, |
| 484 | efx_dword_t *outbuf, size_t outlen, |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 485 | size_t *outlen_actual) |
| 486 | { |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 487 | int rc; |
| 488 | |
| 489 | rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); |
| 490 | if (rc) |
| 491 | return rc; |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 492 | return efx_mcdi_rpc_finish(efx, cmd, inlen, |
| 493 | outbuf, outlen, outlen_actual); |
| 494 | } |
| 495 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 496 | int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, |
| 497 | const efx_dword_t *inbuf, size_t inlen) |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 498 | { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 499 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 500 | int rc; |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 501 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 502 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 503 | if (rc) |
| 504 | return rc; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 505 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 506 | efx_mcdi_acquire_sync(mcdi); |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 507 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 508 | return 0; |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 509 | } |
| 510 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 511 | /** |
| 512 | * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously |
| 513 | * @efx: NIC through which to issue the command |
| 514 | * @cmd: Command type number |
| 515 | * @inbuf: Command parameters |
| 516 | * @inlen: Length of command parameters, in bytes |
| 517 | * @outlen: Length to allocate for response buffer, in bytes |
| 518 | * @complete: Function to be called on completion or cancellation. |
| 519 | * @cookie: Arbitrary value to be passed to @complete. |
| 520 | * |
| 521 | * This function does not sleep and therefore may be called in atomic |
| 522 | * context. It will fail if event queues are disabled or if MCDI |
| 523 | * event completions have been disabled due to an error. |
| 524 | * |
| 525 | * If it succeeds, the @complete function will be called exactly once |
| 526 | * in atomic context, when one of the following occurs: |
| 527 | * (a) the completion event is received (in NAPI context) |
| 528 | * (b) event queues are disabled (in the process that disables them) |
| 529 | * (c) the request times-out (in timer context) |
| 530 | */ |
| 531 | int |
| 532 | efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
| 533 | const efx_dword_t *inbuf, size_t inlen, size_t outlen, |
| 534 | efx_mcdi_async_completer *complete, unsigned long cookie) |
| 535 | { |
| 536 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 537 | struct efx_mcdi_async_param *async; |
| 538 | int rc; |
| 539 | |
| 540 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 541 | if (rc) |
| 542 | return rc; |
| 543 | |
| 544 | async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), |
| 545 | GFP_ATOMIC); |
| 546 | if (!async) |
| 547 | return -ENOMEM; |
| 548 | |
| 549 | async->cmd = cmd; |
| 550 | async->inlen = inlen; |
| 551 | async->outlen = outlen; |
| 552 | async->complete = complete; |
| 553 | async->cookie = cookie; |
| 554 | memcpy(async + 1, inbuf, inlen); |
| 555 | |
| 556 | spin_lock_bh(&mcdi->async_lock); |
| 557 | |
| 558 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 559 | list_add_tail(&async->list, &mcdi->async_list); |
| 560 | |
| 561 | /* If this is at the front of the queue, try to start it |
| 562 | * immediately |
| 563 | */ |
| 564 | if (mcdi->async_list.next == &async->list && |
| 565 | efx_mcdi_acquire_async(mcdi)) { |
| 566 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 567 | mod_timer(&mcdi->async_timer, |
| 568 | jiffies + MCDI_RPC_TIMEOUT); |
| 569 | } |
| 570 | } else { |
| 571 | kfree(async); |
| 572 | rc = -ENETDOWN; |
| 573 | } |
| 574 | |
| 575 | spin_unlock_bh(&mcdi->async_lock); |
| 576 | |
| 577 | return rc; |
| 578 | } |
| 579 | |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 580 | int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
Ben Hutchings | 9528b92 | 2012-09-14 17:31:41 +0100 | [diff] [blame] | 581 | efx_dword_t *outbuf, size_t outlen, |
| 582 | size_t *outlen_actual) |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 583 | { |
| 584 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 585 | int rc; |
| 586 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 587 | if (mcdi->mode == MCDI_MODE_POLL) |
| 588 | rc = efx_mcdi_poll(efx); |
| 589 | else |
| 590 | rc = efx_mcdi_await_completion(efx); |
| 591 | |
| 592 | if (rc != 0) { |
| 593 | /* Close the race with efx_mcdi_ev_cpl() executing just too late |
| 594 | * and completing a request we've just cancelled, by ensuring |
| 595 | * that the seqno check therein fails. |
| 596 | */ |
| 597 | spin_lock_bh(&mcdi->iface_lock); |
| 598 | ++mcdi->seqno; |
| 599 | ++mcdi->credits; |
| 600 | spin_unlock_bh(&mcdi->iface_lock); |
| 601 | |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 602 | netif_err(efx, hw, efx->net_dev, |
| 603 | "MC command 0x%x inlen %d mode %d timed out\n", |
| 604 | cmd, (int)inlen, mcdi->mode); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 605 | } else { |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 606 | size_t hdr_len, data_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 607 | |
| 608 | /* At the very least we need a memory barrier here to ensure |
| 609 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against |
| 610 | * a spurious efx_mcdi_ev_cpl() running concurrently by |
| 611 | * acquiring the iface_lock. */ |
| 612 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 613 | rc = mcdi->resprc; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 614 | hdr_len = mcdi->resp_hdr_len; |
| 615 | data_len = mcdi->resp_data_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 616 | spin_unlock_bh(&mcdi->iface_lock); |
| 617 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 618 | BUG_ON(rc > 0); |
| 619 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 620 | if (rc == 0) { |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 621 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 622 | min(outlen, data_len)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 623 | if (outlen_actual != NULL) |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 624 | *outlen_actual = data_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 625 | } else if (cmd == MC_CMD_REBOOT && rc == -EIO) |
| 626 | ; /* Don't reset if MC_CMD_REBOOT returns EIO */ |
| 627 | else if (rc == -EIO || rc == -EINTR) { |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 628 | netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", |
| 629 | -rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 630 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
| 631 | } else |
Ben Hutchings | f18ca36 | 2010-12-02 13:46:09 +0000 | [diff] [blame] | 632 | netif_dbg(efx, hw, efx->net_dev, |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 633 | "MC command 0x%x inlen %d failed rc=%d\n", |
| 634 | cmd, (int)inlen, -rc); |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 635 | |
| 636 | if (rc == -EIO || rc == -EINTR) { |
| 637 | msleep(MCDI_STATUS_SLEEP_MS); |
| 638 | efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 639 | mcdi->new_epoch = true; |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 640 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 641 | } |
| 642 | |
| 643 | efx_mcdi_release(mcdi); |
| 644 | return rc; |
| 645 | } |
| 646 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 647 | /* Switch to polled MCDI completions. This can be called in various |
| 648 | * error conditions with various locks held, so it must be lockless. |
| 649 | * Caller is responsible for flushing asynchronous requests later. |
| 650 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 651 | void efx_mcdi_mode_poll(struct efx_nic *efx) |
| 652 | { |
| 653 | struct efx_mcdi_iface *mcdi; |
| 654 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 655 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 656 | return; |
| 657 | |
| 658 | mcdi = efx_mcdi(efx); |
| 659 | if (mcdi->mode == MCDI_MODE_POLL) |
| 660 | return; |
| 661 | |
| 662 | /* We can switch from event completion to polled completion, because |
| 663 | * mcdi requests are always completed in shared memory. We do this by |
| 664 | * switching the mode to POLL'd then completing the request. |
| 665 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). |
| 666 | * |
| 667 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 668 | * which efx_mcdi_complete_sync() provides for us. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 669 | */ |
| 670 | mcdi->mode = MCDI_MODE_POLL; |
| 671 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 672 | efx_mcdi_complete_sync(mcdi); |
| 673 | } |
| 674 | |
| 675 | /* Flush any running or queued asynchronous requests, after event processing |
| 676 | * is stopped |
| 677 | */ |
| 678 | void efx_mcdi_flush_async(struct efx_nic *efx) |
| 679 | { |
| 680 | struct efx_mcdi_async_param *async, *next; |
| 681 | struct efx_mcdi_iface *mcdi; |
| 682 | |
| 683 | if (!efx->mcdi) |
| 684 | return; |
| 685 | |
| 686 | mcdi = efx_mcdi(efx); |
| 687 | |
| 688 | /* We must be in polling mode so no more requests can be queued */ |
| 689 | BUG_ON(mcdi->mode != MCDI_MODE_POLL); |
| 690 | |
| 691 | del_timer_sync(&mcdi->async_timer); |
| 692 | |
| 693 | /* If a request is still running, make sure we give the MC |
| 694 | * time to complete it so that the response won't overwrite our |
| 695 | * next request. |
| 696 | */ |
| 697 | if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { |
| 698 | efx_mcdi_poll(efx); |
| 699 | mcdi->state = MCDI_STATE_QUIESCENT; |
| 700 | } |
| 701 | |
| 702 | /* Nothing else will access the async list now, so it is safe |
| 703 | * to walk it without holding async_lock. If we hold it while |
| 704 | * calling a completer then lockdep may warn that we have |
| 705 | * acquired locks in the wrong order. |
| 706 | */ |
| 707 | list_for_each_entry_safe(async, next, &mcdi->async_list, list) { |
| 708 | async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); |
| 709 | list_del(&async->list); |
| 710 | kfree(async); |
| 711 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 712 | } |
| 713 | |
| 714 | void efx_mcdi_mode_event(struct efx_nic *efx) |
| 715 | { |
| 716 | struct efx_mcdi_iface *mcdi; |
| 717 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 718 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 719 | return; |
| 720 | |
| 721 | mcdi = efx_mcdi(efx); |
| 722 | |
| 723 | if (mcdi->mode == MCDI_MODE_EVENTS) |
| 724 | return; |
| 725 | |
| 726 | /* We can't switch from polled to event completion in the middle of a |
| 727 | * request, because the completion method is specified in the request. |
| 728 | * So acquire the interface to serialise the requestors. We don't need |
| 729 | * to acquire the iface_lock to change the mode here, but we do need a |
| 730 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which |
| 731 | * efx_mcdi_acquire() provides. |
| 732 | */ |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 733 | efx_mcdi_acquire_sync(mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 734 | mcdi->mode = MCDI_MODE_EVENTS; |
| 735 | efx_mcdi_release(mcdi); |
| 736 | } |
| 737 | |
| 738 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) |
| 739 | { |
| 740 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 741 | |
| 742 | /* If there is an outstanding MCDI request, it has been terminated |
| 743 | * either by a BADASSERT or REBOOT event. If the mcdi interface is |
| 744 | * in polled mode, then do nothing because the MC reboot handler will |
| 745 | * set the header correctly. However, if the mcdi interface is waiting |
| 746 | * for a CMDDONE event it won't receive it [and since all MCDI events |
| 747 | * are sent to the same queue, we can't be racing with |
| 748 | * efx_mcdi_ev_cpl()] |
| 749 | * |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 750 | * If there is an outstanding asynchronous request, we can't |
| 751 | * complete it now (efx_mcdi_complete() would deadlock). The |
| 752 | * reset process will take care of this. |
| 753 | * |
| 754 | * There's a race here with efx_mcdi_send_request(), because |
| 755 | * we might receive a REBOOT event *before* the request has |
| 756 | * been copied out. In polled mode (during startup) this is |
| 757 | * irrelevant, because efx_mcdi_complete_sync() is ignored. In |
| 758 | * event mode, this condition is just an edge-case of |
| 759 | * receiving a REBOOT event after posting the MCDI |
| 760 | * request. Did the mc reboot before or after the copyout? The |
| 761 | * best we can do always is just return failure. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 762 | */ |
| 763 | spin_lock(&mcdi->iface_lock); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 764 | if (efx_mcdi_complete_sync(mcdi)) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 765 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 766 | mcdi->resprc = rc; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 767 | mcdi->resp_hdr_len = 0; |
| 768 | mcdi->resp_data_len = 0; |
Steve Hodgson | 18e3ee2 | 2010-12-02 13:46:55 +0000 | [diff] [blame] | 769 | ++mcdi->credits; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 770 | } |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 771 | } else { |
| 772 | int count; |
| 773 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 774 | /* Nobody was waiting for an MCDI request, so trigger a reset */ |
| 775 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
| 776 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 777 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
| 778 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { |
| 779 | if (efx_mcdi_poll_reboot(efx)) |
| 780 | break; |
| 781 | udelay(MCDI_STATUS_DELAY_US); |
| 782 | } |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 783 | mcdi->new_epoch = true; |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 784 | } |
| 785 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 786 | spin_unlock(&mcdi->iface_lock); |
| 787 | } |
| 788 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 789 | /* Called from falcon_process_eventq for MCDI events */ |
| 790 | void efx_mcdi_process_event(struct efx_channel *channel, |
| 791 | efx_qword_t *event) |
| 792 | { |
| 793 | struct efx_nic *efx = channel->efx; |
| 794 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); |
| 795 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); |
| 796 | |
| 797 | switch (code) { |
| 798 | case MCDI_EVENT_CODE_BADSSERT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 799 | netif_err(efx, hw, efx->net_dev, |
| 800 | "MC watchdog or assertion failure at 0x%x\n", data); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 801 | efx_mcdi_ev_death(efx, -EINTR); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 802 | break; |
| 803 | |
| 804 | case MCDI_EVENT_CODE_PMNOTICE: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 805 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 806 | break; |
| 807 | |
| 808 | case MCDI_EVENT_CODE_CMDDONE: |
| 809 | efx_mcdi_ev_cpl(efx, |
| 810 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), |
| 811 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), |
| 812 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); |
| 813 | break; |
| 814 | |
| 815 | case MCDI_EVENT_CODE_LINKCHANGE: |
| 816 | efx_mcdi_process_link_change(efx, event); |
| 817 | break; |
| 818 | case MCDI_EVENT_CODE_SENSOREVT: |
| 819 | efx_mcdi_sensor_event(efx, event); |
| 820 | break; |
| 821 | case MCDI_EVENT_CODE_SCHEDERR: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 822 | netif_info(efx, hw, efx->net_dev, |
| 823 | "MC Scheduler error address=0x%x\n", data); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 824 | break; |
| 825 | case MCDI_EVENT_CODE_REBOOT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 826 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 827 | efx_mcdi_ev_death(efx, -EIO); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 828 | break; |
| 829 | case MCDI_EVENT_CODE_MAC_STATS_DMA: |
| 830 | /* MAC stats are gather lazily. We can ignore this. */ |
| 831 | break; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 832 | case MCDI_EVENT_CODE_FLR: |
| 833 | efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF)); |
| 834 | break; |
Stuart Hodgson | 7c236c4 | 2012-09-03 11:09:36 +0100 | [diff] [blame] | 835 | case MCDI_EVENT_CODE_PTP_RX: |
| 836 | case MCDI_EVENT_CODE_PTP_FAULT: |
| 837 | case MCDI_EVENT_CODE_PTP_PPS: |
| 838 | efx_ptp_event(efx, event); |
| 839 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 840 | |
Alexandre Rames | 3de82b9 | 2013-06-13 11:36:15 +0100 | [diff] [blame] | 841 | case MCDI_EVENT_CODE_TX_ERR: |
| 842 | case MCDI_EVENT_CODE_RX_ERR: |
| 843 | netif_err(efx, hw, efx->net_dev, |
| 844 | "%s DMA error (event: "EFX_QWORD_FMT")\n", |
| 845 | code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", |
| 846 | EFX_QWORD_VAL(*event)); |
| 847 | efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); |
| 848 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 849 | default: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 850 | netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", |
| 851 | code); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 852 | } |
| 853 | } |
| 854 | |
| 855 | /************************************************************************** |
| 856 | * |
| 857 | * Specific request functions |
| 858 | * |
| 859 | ************************************************************************** |
| 860 | */ |
| 861 | |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 862 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 863 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 864 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 865 | size_t outlength; |
| 866 | const __le16 *ver_words; |
| 867 | int rc; |
| 868 | |
| 869 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); |
| 870 | |
| 871 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, |
| 872 | outbuf, sizeof(outbuf), &outlength); |
| 873 | if (rc) |
| 874 | goto fail; |
| 875 | |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 876 | if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 877 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 878 | goto fail; |
| 879 | } |
| 880 | |
| 881 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 882 | snprintf(buf, len, "%u.%u.%u.%u", |
| 883 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), |
| 884 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); |
| 885 | return; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 886 | |
| 887 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 888 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 889 | buf[0] = 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 890 | } |
| 891 | |
| 892 | int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
| 893 | bool *was_attached) |
| 894 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 895 | MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); |
| 896 | MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 897 | size_t outlen; |
| 898 | int rc; |
| 899 | |
| 900 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, |
| 901 | driver_operating ? 1 : 0); |
| 902 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); |
Ben Hutchings | f2b0bef | 2013-08-20 20:35:50 +0100 | [diff] [blame] | 903 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 904 | |
| 905 | rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), |
| 906 | outbuf, sizeof(outbuf), &outlen); |
| 907 | if (rc) |
| 908 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 909 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
| 910 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 911 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 912 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 913 | |
| 914 | if (was_attached != NULL) |
| 915 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); |
| 916 | return 0; |
| 917 | |
| 918 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 919 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 920 | return rc; |
| 921 | } |
| 922 | |
| 923 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 924 | u16 *fw_subtype_list, u32 *capabilities) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 925 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 926 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 927 | size_t outlen, i; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 928 | int port_num = efx_port_num(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 929 | int rc; |
| 930 | |
| 931 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); |
| 932 | |
| 933 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, |
| 934 | outbuf, sizeof(outbuf), &outlen); |
| 935 | if (rc) |
| 936 | goto fail; |
| 937 | |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 938 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 939 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 940 | goto fail; |
| 941 | } |
| 942 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 943 | if (mac_address) |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 944 | memcpy(mac_address, |
| 945 | port_num ? |
| 946 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : |
| 947 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0), |
| 948 | ETH_ALEN); |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 949 | if (fw_subtype_list) { |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 950 | for (i = 0; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 951 | i < MCDI_VAR_ARRAY_LEN(outlen, |
| 952 | GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); |
| 953 | i++) |
| 954 | fw_subtype_list[i] = MCDI_ARRAY_WORD( |
| 955 | outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); |
| 956 | for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) |
| 957 | fw_subtype_list[i] = 0; |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 958 | } |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 959 | if (capabilities) { |
| 960 | if (port_num) |
| 961 | *capabilities = MCDI_DWORD(outbuf, |
| 962 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); |
| 963 | else |
| 964 | *capabilities = MCDI_DWORD(outbuf, |
| 965 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); |
| 966 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 967 | |
| 968 | return 0; |
| 969 | |
| 970 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 971 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
| 972 | __func__, rc, (int)outlen); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 973 | |
| 974 | return rc; |
| 975 | } |
| 976 | |
| 977 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) |
| 978 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 979 | MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 980 | u32 dest = 0; |
| 981 | int rc; |
| 982 | |
| 983 | if (uart) |
| 984 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; |
| 985 | if (evq) |
| 986 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; |
| 987 | |
| 988 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); |
| 989 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); |
| 990 | |
| 991 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); |
| 992 | |
| 993 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), |
| 994 | NULL, 0, NULL); |
| 995 | if (rc) |
| 996 | goto fail; |
| 997 | |
| 998 | return 0; |
| 999 | |
| 1000 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1001 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1002 | return rc; |
| 1003 | } |
| 1004 | |
| 1005 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) |
| 1006 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1007 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1008 | size_t outlen; |
| 1009 | int rc; |
| 1010 | |
| 1011 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); |
| 1012 | |
| 1013 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, |
| 1014 | outbuf, sizeof(outbuf), &outlen); |
| 1015 | if (rc) |
| 1016 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1017 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
| 1018 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1019 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1020 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1021 | |
| 1022 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); |
| 1023 | return 0; |
| 1024 | |
| 1025 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1026 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
| 1027 | __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1028 | return rc; |
| 1029 | } |
| 1030 | |
| 1031 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, |
| 1032 | size_t *size_out, size_t *erase_size_out, |
| 1033 | bool *protected_out) |
| 1034 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1035 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); |
| 1036 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1037 | size_t outlen; |
| 1038 | int rc; |
| 1039 | |
| 1040 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); |
| 1041 | |
| 1042 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), |
| 1043 | outbuf, sizeof(outbuf), &outlen); |
| 1044 | if (rc) |
| 1045 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1046 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
| 1047 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1048 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1049 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1050 | |
| 1051 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); |
| 1052 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); |
| 1053 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1054 | (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1055 | return 0; |
| 1056 | |
| 1057 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1058 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1059 | return rc; |
| 1060 | } |
| 1061 | |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1062 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
| 1063 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1064 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); |
| 1065 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1066 | int rc; |
| 1067 | |
| 1068 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); |
| 1069 | |
| 1070 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), |
| 1071 | outbuf, sizeof(outbuf), NULL); |
| 1072 | if (rc) |
| 1073 | return rc; |
| 1074 | |
| 1075 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { |
| 1076 | case MC_CMD_NVRAM_TEST_PASS: |
| 1077 | case MC_CMD_NVRAM_TEST_NOTSUPP: |
| 1078 | return 0; |
| 1079 | default: |
| 1080 | return -EIO; |
| 1081 | } |
| 1082 | } |
| 1083 | |
| 1084 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) |
| 1085 | { |
| 1086 | u32 nvram_types; |
| 1087 | unsigned int type; |
| 1088 | int rc; |
| 1089 | |
| 1090 | rc = efx_mcdi_nvram_types(efx, &nvram_types); |
| 1091 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1092 | goto fail1; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1093 | |
| 1094 | type = 0; |
| 1095 | while (nvram_types != 0) { |
| 1096 | if (nvram_types & 1) { |
| 1097 | rc = efx_mcdi_nvram_test(efx, type); |
| 1098 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1099 | goto fail2; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1100 | } |
| 1101 | type++; |
| 1102 | nvram_types >>= 1; |
| 1103 | } |
| 1104 | |
| 1105 | return 0; |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1106 | |
| 1107 | fail2: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1108 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
| 1109 | __func__, type); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1110 | fail1: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1111 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1112 | return rc; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1113 | } |
| 1114 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1115 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1116 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1117 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); |
| 1118 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1119 | unsigned int flags, index; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1120 | const char *reason; |
| 1121 | size_t outlen; |
| 1122 | int retry; |
| 1123 | int rc; |
| 1124 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1125 | /* Attempt to read any stored assertion state before we reboot |
| 1126 | * the mcfw out of the assertion handler. Retry twice, once |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1127 | * because a boot-time assertion might cause this command to fail |
| 1128 | * with EINTR. And once again because GET_ASSERTS can race with |
| 1129 | * MC_CMD_REBOOT running on the other port. */ |
| 1130 | retry = 2; |
| 1131 | do { |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1132 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1133 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS, |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1134 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, |
| 1135 | outbuf, sizeof(outbuf), &outlen); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1136 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
| 1137 | |
| 1138 | if (rc) |
| 1139 | return rc; |
| 1140 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1141 | return -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1142 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1143 | /* Print out any recorded assertion state */ |
| 1144 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1145 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
| 1146 | return 0; |
| 1147 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1148 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
| 1149 | ? "system-level assertion" |
| 1150 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) |
| 1151 | ? "thread-level assertion" |
| 1152 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) |
| 1153 | ? "watchdog reset" |
| 1154 | : "unknown assertion"; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1155 | netif_err(efx, hw, efx->net_dev, |
| 1156 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, |
| 1157 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), |
| 1158 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1159 | |
| 1160 | /* Print out the registers */ |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1161 | for (index = 0; |
| 1162 | index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; |
| 1163 | index++) |
| 1164 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", |
| 1165 | 1 + index, |
| 1166 | MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, |
| 1167 | index)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1168 | |
| 1169 | return 0; |
| 1170 | } |
| 1171 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1172 | static void efx_mcdi_exit_assertion(struct efx_nic *efx) |
| 1173 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1174 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1175 | |
Ben Hutchings | 0f1e54a | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1176 | /* If the MC is running debug firmware, it might now be |
| 1177 | * waiting for a debugger to attach, but we just want it to |
| 1178 | * reboot. We set a flag that makes the command a no-op if it |
| 1179 | * has already done so. We don't know what return code to |
| 1180 | * expect (0 or -EIO), so ignore it. |
| 1181 | */ |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1182 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1183 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, |
| 1184 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); |
Ben Hutchings | 0f1e54a | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1185 | (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, |
| 1186 | NULL, 0, NULL); |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1187 | } |
| 1188 | |
| 1189 | int efx_mcdi_handle_assertion(struct efx_nic *efx) |
| 1190 | { |
| 1191 | int rc; |
| 1192 | |
| 1193 | rc = efx_mcdi_read_assertion(efx); |
| 1194 | if (rc) |
| 1195 | return rc; |
| 1196 | |
| 1197 | efx_mcdi_exit_assertion(efx); |
| 1198 | |
| 1199 | return 0; |
| 1200 | } |
| 1201 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1202 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
| 1203 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1204 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1205 | int rc; |
| 1206 | |
| 1207 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); |
| 1208 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); |
| 1209 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); |
| 1210 | |
| 1211 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); |
| 1212 | |
| 1213 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); |
| 1214 | |
| 1215 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), |
| 1216 | NULL, 0, NULL); |
| 1217 | if (rc) |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1218 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
| 1219 | __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1220 | } |
| 1221 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1222 | static int efx_mcdi_reset_port(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1223 | { |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1224 | int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1225 | if (rc) |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1226 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
| 1227 | __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1228 | return rc; |
| 1229 | } |
| 1230 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1231 | static int efx_mcdi_reset_mc(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1232 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1233 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1234 | int rc; |
| 1235 | |
| 1236 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1237 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); |
| 1238 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), |
| 1239 | NULL, 0, NULL); |
| 1240 | /* White is black, and up is down */ |
| 1241 | if (rc == -EIO) |
| 1242 | return 0; |
| 1243 | if (rc == 0) |
| 1244 | rc = -EIO; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1245 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1246 | return rc; |
| 1247 | } |
| 1248 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1249 | enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) |
| 1250 | { |
| 1251 | return RESET_TYPE_RECOVER_OR_ALL; |
| 1252 | } |
| 1253 | |
| 1254 | int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) |
| 1255 | { |
| 1256 | int rc; |
| 1257 | |
| 1258 | /* Recover from a failed assertion pre-reset */ |
| 1259 | rc = efx_mcdi_handle_assertion(efx); |
| 1260 | if (rc) |
| 1261 | return rc; |
| 1262 | |
| 1263 | if (method == RESET_TYPE_WORLD) |
| 1264 | return efx_mcdi_reset_mc(efx); |
| 1265 | else |
| 1266 | return efx_mcdi_reset_port(efx); |
| 1267 | } |
| 1268 | |
stephen hemminger | d215697 | 2010-10-18 05:27:31 +0000 | [diff] [blame] | 1269 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
| 1270 | const u8 *mac, int *id_out) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1271 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1272 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); |
| 1273 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1274 | size_t outlen; |
| 1275 | int rc; |
| 1276 | |
| 1277 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); |
| 1278 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, |
| 1279 | MC_CMD_FILTER_MODE_SIMPLE); |
| 1280 | memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN); |
| 1281 | |
| 1282 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), |
| 1283 | outbuf, sizeof(outbuf), &outlen); |
| 1284 | if (rc) |
| 1285 | goto fail; |
| 1286 | |
| 1287 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1288 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1289 | goto fail; |
| 1290 | } |
| 1291 | |
| 1292 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); |
| 1293 | |
| 1294 | return 0; |
| 1295 | |
| 1296 | fail: |
| 1297 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1298 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1299 | return rc; |
| 1300 | |
| 1301 | } |
| 1302 | |
| 1303 | |
| 1304 | int |
| 1305 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) |
| 1306 | { |
| 1307 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); |
| 1308 | } |
| 1309 | |
| 1310 | |
| 1311 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) |
| 1312 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1313 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1314 | size_t outlen; |
| 1315 | int rc; |
| 1316 | |
| 1317 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, |
| 1318 | outbuf, sizeof(outbuf), &outlen); |
| 1319 | if (rc) |
| 1320 | goto fail; |
| 1321 | |
| 1322 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1323 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1324 | goto fail; |
| 1325 | } |
| 1326 | |
| 1327 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); |
| 1328 | |
| 1329 | return 0; |
| 1330 | |
| 1331 | fail: |
| 1332 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1333 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1334 | return rc; |
| 1335 | } |
| 1336 | |
| 1337 | |
| 1338 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) |
| 1339 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1340 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1341 | int rc; |
| 1342 | |
| 1343 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); |
| 1344 | |
| 1345 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), |
| 1346 | NULL, 0, NULL); |
| 1347 | if (rc) |
| 1348 | goto fail; |
| 1349 | |
| 1350 | return 0; |
| 1351 | |
| 1352 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1353 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1354 | return rc; |
| 1355 | } |
| 1356 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1357 | int efx_mcdi_flush_rxqs(struct efx_nic *efx) |
| 1358 | { |
| 1359 | struct efx_channel *channel; |
| 1360 | struct efx_rx_queue *rx_queue; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1361 | MCDI_DECLARE_BUF(inbuf, |
| 1362 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1363 | int rc, count; |
| 1364 | |
Ben Hutchings | 4507837 | 2012-09-19 02:53:34 +0100 | [diff] [blame] | 1365 | BUILD_BUG_ON(EFX_MAX_CHANNELS > |
| 1366 | MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); |
| 1367 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1368 | count = 0; |
| 1369 | efx_for_each_channel(channel, efx) { |
| 1370 | efx_for_each_channel_rx_queue(rx_queue, channel) { |
| 1371 | if (rx_queue->flush_pending) { |
| 1372 | rx_queue->flush_pending = false; |
| 1373 | atomic_dec(&efx->rxq_flush_pending); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1374 | MCDI_SET_ARRAY_DWORD( |
| 1375 | inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, |
| 1376 | count, efx_rx_queue_index(rx_queue)); |
| 1377 | count++; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1378 | } |
| 1379 | } |
| 1380 | } |
| 1381 | |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1382 | rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, |
| 1383 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); |
Ben Hutchings | bbec969 | 2012-09-11 18:25:13 +0100 | [diff] [blame] | 1384 | WARN_ON(rc < 0); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1385 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1386 | return rc; |
| 1387 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1388 | |
| 1389 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) |
| 1390 | { |
| 1391 | int rc; |
| 1392 | |
| 1393 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); |
| 1394 | if (rc) |
| 1395 | goto fail; |
| 1396 | |
| 1397 | return 0; |
| 1398 | |
| 1399 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1400 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1401 | return rc; |
| 1402 | } |
| 1403 | |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1404 | #ifdef CONFIG_SFC_MTD |
| 1405 | |
| 1406 | #define EFX_MCDI_NVRAM_LEN_MAX 128 |
| 1407 | |
| 1408 | static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) |
| 1409 | { |
| 1410 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN); |
| 1411 | int rc; |
| 1412 | |
| 1413 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); |
| 1414 | |
| 1415 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); |
| 1416 | |
| 1417 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), |
| 1418 | NULL, 0, NULL); |
| 1419 | if (rc) |
| 1420 | goto fail; |
| 1421 | |
| 1422 | return 0; |
| 1423 | |
| 1424 | fail: |
| 1425 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
| 1426 | return rc; |
| 1427 | } |
| 1428 | |
| 1429 | static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, |
| 1430 | loff_t offset, u8 *buffer, size_t length) |
| 1431 | { |
| 1432 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN); |
| 1433 | MCDI_DECLARE_BUF(outbuf, |
| 1434 | MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 1435 | size_t outlen; |
| 1436 | int rc; |
| 1437 | |
| 1438 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); |
| 1439 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); |
| 1440 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); |
| 1441 | |
| 1442 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), |
| 1443 | outbuf, sizeof(outbuf), &outlen); |
| 1444 | if (rc) |
| 1445 | goto fail; |
| 1446 | |
| 1447 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); |
| 1448 | return 0; |
| 1449 | |
| 1450 | fail: |
| 1451 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
| 1452 | return rc; |
| 1453 | } |
| 1454 | |
| 1455 | static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, |
| 1456 | loff_t offset, const u8 *buffer, size_t length) |
| 1457 | { |
| 1458 | MCDI_DECLARE_BUF(inbuf, |
| 1459 | MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 1460 | int rc; |
| 1461 | |
| 1462 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); |
| 1463 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); |
| 1464 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); |
| 1465 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); |
| 1466 | |
| 1467 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); |
| 1468 | |
| 1469 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, |
| 1470 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), |
| 1471 | NULL, 0, NULL); |
| 1472 | if (rc) |
| 1473 | goto fail; |
| 1474 | |
| 1475 | return 0; |
| 1476 | |
| 1477 | fail: |
| 1478 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
| 1479 | return rc; |
| 1480 | } |
| 1481 | |
| 1482 | static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, |
| 1483 | loff_t offset, size_t length) |
| 1484 | { |
| 1485 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); |
| 1486 | int rc; |
| 1487 | |
| 1488 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); |
| 1489 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); |
| 1490 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); |
| 1491 | |
| 1492 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); |
| 1493 | |
| 1494 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), |
| 1495 | NULL, 0, NULL); |
| 1496 | if (rc) |
| 1497 | goto fail; |
| 1498 | |
| 1499 | return 0; |
| 1500 | |
| 1501 | fail: |
| 1502 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
| 1503 | return rc; |
| 1504 | } |
| 1505 | |
| 1506 | static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) |
| 1507 | { |
| 1508 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN); |
| 1509 | int rc; |
| 1510 | |
| 1511 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); |
| 1512 | |
| 1513 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); |
| 1514 | |
| 1515 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), |
| 1516 | NULL, 0, NULL); |
| 1517 | if (rc) |
| 1518 | goto fail; |
| 1519 | |
| 1520 | return 0; |
| 1521 | |
| 1522 | fail: |
| 1523 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
| 1524 | return rc; |
| 1525 | } |
| 1526 | |
| 1527 | int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, |
| 1528 | size_t len, size_t *retlen, u8 *buffer) |
| 1529 | { |
| 1530 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1531 | struct efx_nic *efx = mtd->priv; |
| 1532 | loff_t offset = start; |
| 1533 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1534 | size_t chunk; |
| 1535 | int rc = 0; |
| 1536 | |
| 1537 | while (offset < end) { |
| 1538 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 1539 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, |
| 1540 | buffer, chunk); |
| 1541 | if (rc) |
| 1542 | goto out; |
| 1543 | offset += chunk; |
| 1544 | buffer += chunk; |
| 1545 | } |
| 1546 | out: |
| 1547 | *retlen = offset - start; |
| 1548 | return rc; |
| 1549 | } |
| 1550 | |
| 1551 | int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) |
| 1552 | { |
| 1553 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1554 | struct efx_nic *efx = mtd->priv; |
| 1555 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); |
| 1556 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1557 | size_t chunk = part->common.mtd.erasesize; |
| 1558 | int rc = 0; |
| 1559 | |
| 1560 | if (!part->updating) { |
| 1561 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 1562 | if (rc) |
| 1563 | goto out; |
| 1564 | part->updating = true; |
| 1565 | } |
| 1566 | |
| 1567 | /* The MCDI interface can in fact do multiple erase blocks at once; |
| 1568 | * but erasing may be slow, so we make multiple calls here to avoid |
| 1569 | * tripping the MCDI RPC timeout. */ |
| 1570 | while (offset < end) { |
| 1571 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, |
| 1572 | chunk); |
| 1573 | if (rc) |
| 1574 | goto out; |
| 1575 | offset += chunk; |
| 1576 | } |
| 1577 | out: |
| 1578 | return rc; |
| 1579 | } |
| 1580 | |
| 1581 | int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, |
| 1582 | size_t len, size_t *retlen, const u8 *buffer) |
| 1583 | { |
| 1584 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1585 | struct efx_nic *efx = mtd->priv; |
| 1586 | loff_t offset = start; |
| 1587 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1588 | size_t chunk; |
| 1589 | int rc = 0; |
| 1590 | |
| 1591 | if (!part->updating) { |
| 1592 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 1593 | if (rc) |
| 1594 | goto out; |
| 1595 | part->updating = true; |
| 1596 | } |
| 1597 | |
| 1598 | while (offset < end) { |
| 1599 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 1600 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, |
| 1601 | buffer, chunk); |
| 1602 | if (rc) |
| 1603 | goto out; |
| 1604 | offset += chunk; |
| 1605 | buffer += chunk; |
| 1606 | } |
| 1607 | out: |
| 1608 | *retlen = offset - start; |
| 1609 | return rc; |
| 1610 | } |
| 1611 | |
| 1612 | int efx_mcdi_mtd_sync(struct mtd_info *mtd) |
| 1613 | { |
| 1614 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1615 | struct efx_nic *efx = mtd->priv; |
| 1616 | int rc = 0; |
| 1617 | |
| 1618 | if (part->updating) { |
| 1619 | part->updating = false; |
| 1620 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); |
| 1621 | } |
| 1622 | |
| 1623 | return rc; |
| 1624 | } |
| 1625 | |
| 1626 | void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) |
| 1627 | { |
| 1628 | struct efx_mcdi_mtd_partition *mcdi_part = |
| 1629 | container_of(part, struct efx_mcdi_mtd_partition, common); |
| 1630 | struct efx_nic *efx = part->mtd.priv; |
| 1631 | |
| 1632 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", |
| 1633 | efx->name, part->type_name, mcdi_part->fw_subtype); |
| 1634 | } |
| 1635 | |
| 1636 | #endif /* CONFIG_SFC_MTD */ |