Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1 | |
| 2 | /* |
| 3 | * Copyright (c) 2011 Atheros Communications Inc. |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any |
| 6 | * purpose with or without fee is hereby granted, provided that the above |
| 7 | * copyright notice and this permission notice appear in all copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 16 | */ |
| 17 | |
Stephen Rothwell | c6efe578 | 2011-09-28 18:32:34 +1000 | [diff] [blame] | 18 | #include <linux/moduleparam.h> |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 19 | #include <linux/of.h> |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 20 | #include <linux/mmc/sdio_func.h> |
| 21 | #include "core.h" |
| 22 | #include "cfg80211.h" |
| 23 | #include "target.h" |
| 24 | #include "debug.h" |
| 25 | #include "hif-ops.h" |
| 26 | |
| 27 | unsigned int debug_mask; |
Kalle Valo | 003353b0d | 2011-09-01 10:14:21 +0300 | [diff] [blame] | 28 | static unsigned int testmode; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 29 | |
| 30 | module_param(debug_mask, uint, 0644); |
Kalle Valo | 003353b0d | 2011-09-01 10:14:21 +0300 | [diff] [blame] | 31 | module_param(testmode, uint, 0644); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * Include definitions here that can be used to tune the WLAN module |
| 35 | * behavior. Different customers can tune the behavior as per their needs, |
| 36 | * here. |
| 37 | */ |
| 38 | |
| 39 | /* |
| 40 | * This configuration item enable/disable keepalive support. |
| 41 | * Keepalive support: In the absence of any data traffic to AP, null |
| 42 | * frames will be sent to the AP at periodic interval, to keep the association |
| 43 | * active. This configuration item defines the periodic interval. |
| 44 | * Use value of zero to disable keepalive support |
| 45 | * Default: 60 seconds |
| 46 | */ |
| 47 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 |
| 48 | |
| 49 | /* |
| 50 | * This configuration item sets the value of disconnect timeout |
| 51 | * Firmware delays sending the disconnec event to the host for this |
| 52 | * timeout after is gets disconnected from the current AP. |
| 53 | * If the firmware successly roams within the disconnect timeout |
| 54 | * it sends a new connect event |
| 55 | */ |
| 56 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 |
| 57 | |
| 58 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 |
| 59 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 60 | #define ATH6KL_DATA_OFFSET 64 |
| 61 | struct sk_buff *ath6kl_buf_alloc(int size) |
| 62 | { |
| 63 | struct sk_buff *skb; |
| 64 | u16 reserved; |
| 65 | |
| 66 | /* Add chacheline space at front and back of buffer */ |
| 67 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + |
Vasanthakumar Thiagarajan | 1df94a8 | 2011-08-17 18:45:10 +0530 | [diff] [blame] | 68 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 69 | skb = dev_alloc_skb(size + reserved); |
| 70 | |
| 71 | if (skb) |
| 72 | skb_reserve(skb, reserved - L1_CACHE_BYTES); |
| 73 | return skb; |
| 74 | } |
| 75 | |
| 76 | void ath6kl_init_profile_info(struct ath6kl *ar) |
| 77 | { |
| 78 | ar->ssid_len = 0; |
| 79 | memset(ar->ssid, 0, sizeof(ar->ssid)); |
| 80 | |
| 81 | ar->dot11_auth_mode = OPEN_AUTH; |
| 82 | ar->auth_mode = NONE_AUTH; |
| 83 | ar->prwise_crypto = NONE_CRYPT; |
| 84 | ar->prwise_crypto_len = 0; |
| 85 | ar->grp_crypto = NONE_CRYPT; |
Edward Lu | 38acde3 | 2011-08-30 21:58:06 +0300 | [diff] [blame] | 86 | ar->grp_crypto_len = 0; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 87 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
| 88 | memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); |
| 89 | memset(ar->bssid, 0, sizeof(ar->bssid)); |
| 90 | ar->bss_ch = 0; |
| 91 | ar->nw_type = ar->next_mode = INFRA_NETWORK; |
| 92 | } |
| 93 | |
| 94 | static u8 ath6kl_get_fw_iftype(struct ath6kl *ar) |
| 95 | { |
| 96 | switch (ar->nw_type) { |
| 97 | case INFRA_NETWORK: |
| 98 | return HI_OPTION_FW_MODE_BSS_STA; |
| 99 | case ADHOC_NETWORK: |
| 100 | return HI_OPTION_FW_MODE_IBSS; |
| 101 | case AP_NETWORK: |
| 102 | return HI_OPTION_FW_MODE_AP; |
| 103 | default: |
| 104 | ath6kl_err("Unsupported interface type :%d\n", ar->nw_type); |
| 105 | return 0xff; |
| 106 | } |
| 107 | } |
| 108 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 109 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
| 110 | { |
| 111 | u32 address, data; |
| 112 | struct host_app_area host_app_area; |
| 113 | |
| 114 | /* Fetch the address of the host_app_area_s |
| 115 | * instance in the host interest area */ |
| 116 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 117 | address = TARG_VTOP(ar->target_type, address); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 118 | |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 119 | if (ath6kl_diag_read32(ar, address, &data)) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 120 | return -EIO; |
| 121 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 122 | address = TARG_VTOP(ar->target_type, data); |
Kalle Valo | cbf49a6 | 2011-10-05 12:23:17 +0300 | [diff] [blame] | 123 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 124 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
| 125 | sizeof(struct host_app_area))) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 126 | return -EIO; |
| 127 | |
| 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | static inline void set_ac2_ep_map(struct ath6kl *ar, |
| 132 | u8 ac, |
| 133 | enum htc_endpoint_id ep) |
| 134 | { |
| 135 | ar->ac2ep_map[ac] = ep; |
| 136 | ar->ep2ac_map[ep] = ac; |
| 137 | } |
| 138 | |
| 139 | /* connect to a service */ |
| 140 | static int ath6kl_connectservice(struct ath6kl *ar, |
| 141 | struct htc_service_connect_req *con_req, |
| 142 | char *desc) |
| 143 | { |
| 144 | int status; |
| 145 | struct htc_service_connect_resp response; |
| 146 | |
| 147 | memset(&response, 0, sizeof(response)); |
| 148 | |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 149 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 150 | if (status) { |
| 151 | ath6kl_err("failed to connect to %s service status:%d\n", |
| 152 | desc, status); |
| 153 | return status; |
| 154 | } |
| 155 | |
| 156 | switch (con_req->svc_id) { |
| 157 | case WMI_CONTROL_SVC: |
| 158 | if (test_bit(WMI_ENABLED, &ar->flag)) |
| 159 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); |
| 160 | ar->ctrl_ep = response.endpoint; |
| 161 | break; |
| 162 | case WMI_DATA_BE_SVC: |
| 163 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); |
| 164 | break; |
| 165 | case WMI_DATA_BK_SVC: |
| 166 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); |
| 167 | break; |
| 168 | case WMI_DATA_VI_SVC: |
| 169 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); |
| 170 | break; |
| 171 | case WMI_DATA_VO_SVC: |
| 172 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); |
| 173 | break; |
| 174 | default: |
| 175 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); |
| 176 | return -EINVAL; |
| 177 | } |
| 178 | |
| 179 | return 0; |
| 180 | } |
| 181 | |
| 182 | static int ath6kl_init_service_ep(struct ath6kl *ar) |
| 183 | { |
| 184 | struct htc_service_connect_req connect; |
| 185 | |
| 186 | memset(&connect, 0, sizeof(connect)); |
| 187 | |
| 188 | /* these fields are the same for all service endpoints */ |
| 189 | connect.ep_cb.rx = ath6kl_rx; |
| 190 | connect.ep_cb.rx_refill = ath6kl_rx_refill; |
| 191 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; |
| 192 | |
| 193 | /* |
| 194 | * Set the max queue depth so that our ath6kl_tx_queue_full handler |
| 195 | * gets called. |
| 196 | */ |
| 197 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; |
| 198 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; |
| 199 | if (!connect.ep_cb.rx_refill_thresh) |
| 200 | connect.ep_cb.rx_refill_thresh++; |
| 201 | |
| 202 | /* connect to control service */ |
| 203 | connect.svc_id = WMI_CONTROL_SVC; |
| 204 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) |
| 205 | return -EIO; |
| 206 | |
| 207 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; |
| 208 | |
| 209 | /* |
| 210 | * Limit the HTC message size on the send path, although e can |
| 211 | * receive A-MSDU frames of 4K, we will only send ethernet-sized |
| 212 | * (802.3) frames on the send path. |
| 213 | */ |
| 214 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; |
| 215 | |
| 216 | /* |
| 217 | * To reduce the amount of committed memory for larger A_MSDU |
| 218 | * frames, use the recv-alloc threshold mechanism for larger |
| 219 | * packets. |
| 220 | */ |
| 221 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; |
| 222 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; |
| 223 | |
| 224 | /* |
| 225 | * For the remaining data services set the connection flag to |
| 226 | * reduce dribbling, if configured to do so. |
| 227 | */ |
| 228 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; |
| 229 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; |
| 230 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; |
| 231 | |
| 232 | connect.svc_id = WMI_DATA_BE_SVC; |
| 233 | |
| 234 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) |
| 235 | return -EIO; |
| 236 | |
| 237 | /* connect to back-ground map this to WMI LOW_PRI */ |
| 238 | connect.svc_id = WMI_DATA_BK_SVC; |
| 239 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) |
| 240 | return -EIO; |
| 241 | |
| 242 | /* connect to Video service, map this to to HI PRI */ |
| 243 | connect.svc_id = WMI_DATA_VI_SVC; |
| 244 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) |
| 245 | return -EIO; |
| 246 | |
| 247 | /* |
| 248 | * Connect to VO service, this is currently not mapped to a WMI |
| 249 | * priority stream due to historical reasons. WMI originally |
| 250 | * defined 3 priorities over 3 mailboxes We can change this when |
| 251 | * WMI is reworked so that priorities are not dependent on |
| 252 | * mailboxes. |
| 253 | */ |
| 254 | connect.svc_id = WMI_DATA_VO_SVC; |
| 255 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) |
| 256 | return -EIO; |
| 257 | |
| 258 | return 0; |
| 259 | } |
| 260 | |
| 261 | static void ath6kl_init_control_info(struct ath6kl *ar) |
| 262 | { |
| 263 | u8 ctr; |
| 264 | |
| 265 | clear_bit(WMI_ENABLED, &ar->flag); |
| 266 | ath6kl_init_profile_info(ar); |
| 267 | ar->def_txkey_index = 0; |
| 268 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
| 269 | ar->ch_hint = 0; |
| 270 | ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL; |
| 271 | ar->listen_intvl_b = 0; |
| 272 | ar->tx_pwr = 0; |
| 273 | clear_bit(SKIP_SCAN, &ar->flag); |
| 274 | set_bit(WMM_ENABLED, &ar->flag); |
| 275 | ar->intra_bss = 1; |
| 276 | memset(&ar->sc_params, 0, sizeof(ar->sc_params)); |
| 277 | ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT; |
| 278 | ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS; |
Vivek Natarajan | e509044 | 2011-08-31 15:02:19 +0530 | [diff] [blame] | 279 | ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 280 | |
| 281 | memset((u8 *)ar->sta_list, 0, |
| 282 | AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); |
| 283 | |
| 284 | spin_lock_init(&ar->mcastpsq_lock); |
| 285 | |
| 286 | /* Init the PS queues */ |
| 287 | for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { |
| 288 | spin_lock_init(&ar->sta_list[ctr].psq_lock); |
| 289 | skb_queue_head_init(&ar->sta_list[ctr].psq); |
| 290 | } |
| 291 | |
| 292 | skb_queue_head_init(&ar->mcastpsq); |
| 293 | |
| 294 | memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); |
| 295 | } |
| 296 | |
| 297 | /* |
| 298 | * Set HTC/Mbox operational parameters, this can only be called when the |
| 299 | * target is in the BMI phase. |
| 300 | */ |
| 301 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, |
| 302 | u8 htc_ctrl_buf) |
| 303 | { |
| 304 | int status; |
| 305 | u32 blk_size; |
| 306 | |
| 307 | blk_size = ar->mbox_info.block_size; |
| 308 | |
| 309 | if (htc_ctrl_buf) |
| 310 | blk_size |= ((u32)htc_ctrl_buf) << 16; |
| 311 | |
| 312 | /* set the host interest area for the block size */ |
| 313 | status = ath6kl_bmi_write(ar, |
| 314 | ath6kl_get_hi_item_addr(ar, |
| 315 | HI_ITEM(hi_mbox_io_block_sz)), |
| 316 | (u8 *)&blk_size, |
| 317 | 4); |
| 318 | if (status) { |
| 319 | ath6kl_err("bmi_write_memory for IO block size failed\n"); |
| 320 | goto out; |
| 321 | } |
| 322 | |
| 323 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", |
| 324 | blk_size, |
| 325 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); |
| 326 | |
| 327 | if (mbox_isr_yield_val) { |
| 328 | /* set the host interest area for the mbox ISR yield limit */ |
| 329 | status = ath6kl_bmi_write(ar, |
| 330 | ath6kl_get_hi_item_addr(ar, |
| 331 | HI_ITEM(hi_mbox_isr_yield_limit)), |
| 332 | (u8 *)&mbox_isr_yield_val, |
| 333 | 4); |
| 334 | if (status) { |
| 335 | ath6kl_err("bmi_write_memory for yield limit failed\n"); |
| 336 | goto out; |
| 337 | } |
| 338 | } |
| 339 | |
| 340 | out: |
| 341 | return status; |
| 342 | } |
| 343 | |
| 344 | #define REG_DUMP_COUNT_AR6003 60 |
| 345 | #define REGISTER_DUMP_LEN_MAX 60 |
| 346 | |
| 347 | static void ath6kl_dump_target_assert_info(struct ath6kl *ar) |
| 348 | { |
| 349 | u32 address; |
| 350 | u32 regdump_loc = 0; |
| 351 | int status; |
| 352 | u32 regdump_val[REGISTER_DUMP_LEN_MAX]; |
| 353 | u32 i; |
| 354 | |
| 355 | if (ar->target_type != TARGET_TYPE_AR6003) |
| 356 | return; |
| 357 | |
| 358 | /* the reg dump pointer is copied to the host interest area */ |
| 359 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 360 | address = TARG_VTOP(ar->target_type, address); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 361 | |
| 362 | /* read RAM location through diagnostic window */ |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 363 | status = ath6kl_diag_read32(ar, address, ®dump_loc); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 364 | |
| 365 | if (status || !regdump_loc) { |
| 366 | ath6kl_err("failed to get ptr to register dump area\n"); |
| 367 | return; |
| 368 | } |
| 369 | |
| 370 | ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", |
| 371 | regdump_loc); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 372 | regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 373 | |
| 374 | /* fetch register dump data */ |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 375 | status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], |
| 376 | REG_DUMP_COUNT_AR6003 * (sizeof(u32))); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 377 | |
| 378 | if (status) { |
| 379 | ath6kl_err("failed to get register dump\n"); |
| 380 | return; |
| 381 | } |
| 382 | ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); |
| 383 | |
| 384 | for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) |
| 385 | ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", |
| 386 | i, regdump_val[i]); |
| 387 | |
| 388 | } |
| 389 | |
| 390 | void ath6kl_target_failure(struct ath6kl *ar) |
| 391 | { |
| 392 | ath6kl_err("target asserted\n"); |
| 393 | |
| 394 | /* try dumping target assertion information (if any) */ |
| 395 | ath6kl_dump_target_assert_info(ar); |
| 396 | |
| 397 | } |
| 398 | |
| 399 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar) |
| 400 | { |
| 401 | int status = 0; |
Jouni Malinen | 4dea08e | 2011-08-30 21:57:57 +0300 | [diff] [blame] | 402 | int ret; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 403 | |
| 404 | /* |
| 405 | * Configure the device for rx dot11 header rules. "0,0" are the |
| 406 | * default values. Required if checksum offload is needed. Set |
| 407 | * RxMetaVersion to 2. |
| 408 | */ |
| 409 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, |
| 410 | ar->rx_meta_ver, 0, 0)) { |
| 411 | ath6kl_err("unable to set the rx frame format\n"); |
| 412 | status = -EIO; |
| 413 | } |
| 414 | |
| 415 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) |
| 416 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, |
| 417 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { |
| 418 | ath6kl_err("unable to set power save fail event policy\n"); |
| 419 | status = -EIO; |
| 420 | } |
| 421 | |
| 422 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) |
| 423 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, |
| 424 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { |
| 425 | ath6kl_err("unable to set barker preamble policy\n"); |
| 426 | status = -EIO; |
| 427 | } |
| 428 | |
| 429 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, |
| 430 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { |
| 431 | ath6kl_err("unable to set keep alive interval\n"); |
| 432 | status = -EIO; |
| 433 | } |
| 434 | |
| 435 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, |
| 436 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { |
| 437 | ath6kl_err("unable to set disconnect timeout\n"); |
| 438 | status = -EIO; |
| 439 | } |
| 440 | |
| 441 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) |
| 442 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { |
| 443 | ath6kl_err("unable to set txop bursting\n"); |
| 444 | status = -EIO; |
| 445 | } |
| 446 | |
Jouni Malinen | 6bbc7c3 | 2011-09-05 17:38:47 +0300 | [diff] [blame] | 447 | if (ar->p2p) { |
| 448 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, |
| 449 | P2P_FLAG_CAPABILITIES_REQ | |
| 450 | P2P_FLAG_MACADDR_REQ | |
| 451 | P2P_FLAG_HMODEL_REQ); |
| 452 | if (ret) { |
| 453 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " |
| 454 | "capabilities (%d) - assuming P2P not " |
| 455 | "supported\n", ret); |
| 456 | ar->p2p = 0; |
| 457 | } |
| 458 | } |
| 459 | |
| 460 | if (ar->p2p) { |
| 461 | /* Enable Probe Request reporting for P2P */ |
| 462 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true); |
| 463 | if (ret) { |
| 464 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " |
| 465 | "Request reporting (%d)\n", ret); |
| 466 | } |
Jouni Malinen | 4dea08e | 2011-08-30 21:57:57 +0300 | [diff] [blame] | 467 | } |
| 468 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 469 | return status; |
| 470 | } |
| 471 | |
| 472 | int ath6kl_configure_target(struct ath6kl *ar) |
| 473 | { |
| 474 | u32 param, ram_reserved_size; |
| 475 | u8 fw_iftype; |
| 476 | |
| 477 | fw_iftype = ath6kl_get_fw_iftype(ar); |
| 478 | if (fw_iftype == 0xff) |
| 479 | return -EINVAL; |
| 480 | |
| 481 | /* Tell target which HTC version it is used*/ |
| 482 | param = HTC_PROTOCOL_VERSION; |
| 483 | if (ath6kl_bmi_write(ar, |
| 484 | ath6kl_get_hi_item_addr(ar, |
| 485 | HI_ITEM(hi_app_host_interest)), |
| 486 | (u8 *)¶m, 4) != 0) { |
| 487 | ath6kl_err("bmi_write_memory for htc version failed\n"); |
| 488 | return -EIO; |
| 489 | } |
| 490 | |
| 491 | /* set the firmware mode to STA/IBSS/AP */ |
| 492 | param = 0; |
| 493 | |
| 494 | if (ath6kl_bmi_read(ar, |
| 495 | ath6kl_get_hi_item_addr(ar, |
| 496 | HI_ITEM(hi_option_flag)), |
| 497 | (u8 *)¶m, 4) != 0) { |
| 498 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); |
| 499 | return -EIO; |
| 500 | } |
| 501 | |
| 502 | param |= (1 << HI_OPTION_NUM_DEV_SHIFT); |
| 503 | param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); |
Jouni Malinen | 6bbc7c3 | 2011-09-05 17:38:47 +0300 | [diff] [blame] | 504 | if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) { |
| 505 | param |= HI_OPTION_FW_SUBMODE_P2PDEV << |
| 506 | HI_OPTION_FW_SUBMODE_SHIFT; |
| 507 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 508 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
| 509 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); |
| 510 | |
| 511 | if (ath6kl_bmi_write(ar, |
| 512 | ath6kl_get_hi_item_addr(ar, |
| 513 | HI_ITEM(hi_option_flag)), |
| 514 | (u8 *)¶m, |
| 515 | 4) != 0) { |
| 516 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); |
| 517 | return -EIO; |
| 518 | } |
| 519 | |
| 520 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); |
| 521 | |
| 522 | /* |
| 523 | * Hardcode the address use for the extended board data |
| 524 | * Ideally this should be pre-allocate by the OS at boot time |
| 525 | * But since it is a new feature and board data is loaded |
| 526 | * at init time, we have to workaround this from host. |
| 527 | * It is difficult to patch the firmware boot code, |
| 528 | * but possible in theory. |
| 529 | */ |
| 530 | |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 531 | param = ar->hw.board_ext_data_addr; |
| 532 | ram_reserved_size = ar->hw.reserved_ram_size; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 533 | |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 534 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
| 535 | HI_ITEM(hi_board_ext_data)), |
| 536 | (u8 *)¶m, 4) != 0) { |
| 537 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); |
| 538 | return -EIO; |
| 539 | } |
| 540 | |
| 541 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
| 542 | HI_ITEM(hi_end_ram_reserve_sz)), |
| 543 | (u8 *)&ram_reserved_size, 4) != 0) { |
| 544 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); |
| 545 | return -EIO; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 546 | } |
| 547 | |
| 548 | /* set the block size for the target */ |
| 549 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) |
| 550 | /* use default number of control buffers */ |
| 551 | return -EIO; |
| 552 | |
| 553 | return 0; |
| 554 | } |
| 555 | |
| 556 | struct ath6kl *ath6kl_core_alloc(struct device *sdev) |
| 557 | { |
| 558 | struct net_device *dev; |
| 559 | struct ath6kl *ar; |
| 560 | struct wireless_dev *wdev; |
| 561 | |
| 562 | wdev = ath6kl_cfg80211_init(sdev); |
| 563 | if (!wdev) { |
| 564 | ath6kl_err("ath6kl_cfg80211_init failed\n"); |
| 565 | return NULL; |
| 566 | } |
| 567 | |
| 568 | ar = wdev_priv(wdev); |
| 569 | ar->dev = sdev; |
| 570 | ar->wdev = wdev; |
| 571 | wdev->iftype = NL80211_IFTYPE_STATION; |
| 572 | |
Vasanthakumar Thiagarajan | d999ba3 | 2011-08-26 13:06:31 +0530 | [diff] [blame] | 573 | if (ath6kl_debug_init(ar)) { |
| 574 | ath6kl_err("Failed to initialize debugfs\n"); |
| 575 | ath6kl_cfg80211_deinit(ar); |
| 576 | return NULL; |
| 577 | } |
| 578 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 579 | dev = alloc_netdev(0, "wlan%d", ether_setup); |
| 580 | if (!dev) { |
| 581 | ath6kl_err("no memory for network device instance\n"); |
| 582 | ath6kl_cfg80211_deinit(ar); |
| 583 | return NULL; |
| 584 | } |
| 585 | |
| 586 | dev->ieee80211_ptr = wdev; |
| 587 | SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy)); |
| 588 | wdev->netdev = dev; |
| 589 | ar->sme_state = SME_DISCONNECTED; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 590 | |
| 591 | init_netdev(dev); |
| 592 | |
| 593 | ar->net_dev = dev; |
Raja Mani | 575b5f3 | 2011-07-19 19:27:33 +0530 | [diff] [blame] | 594 | set_bit(WLAN_ENABLED, &ar->flag); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 595 | |
| 596 | ar->wlan_pwr_state = WLAN_POWER_STATE_ON; |
| 597 | |
| 598 | spin_lock_init(&ar->lock); |
| 599 | |
| 600 | ath6kl_init_control_info(ar); |
| 601 | init_waitqueue_head(&ar->event_wq); |
| 602 | sema_init(&ar->sem, 1); |
| 603 | clear_bit(DESTROY_IN_PROGRESS, &ar->flag); |
| 604 | |
| 605 | INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); |
| 606 | |
| 607 | setup_timer(&ar->disconnect_timer, disconnect_timer_handler, |
| 608 | (unsigned long) dev); |
| 609 | |
| 610 | return ar; |
| 611 | } |
| 612 | |
| 613 | int ath6kl_unavail_ev(struct ath6kl *ar) |
| 614 | { |
| 615 | ath6kl_destroy(ar->net_dev, 1); |
| 616 | |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | /* firmware upload */ |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 621 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
| 622 | u8 **fw, size_t *fw_len) |
| 623 | { |
| 624 | const struct firmware *fw_entry; |
| 625 | int ret; |
| 626 | |
| 627 | ret = request_firmware(&fw_entry, filename, ar->dev); |
| 628 | if (ret) |
| 629 | return ret; |
| 630 | |
| 631 | *fw_len = fw_entry->size; |
| 632 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); |
| 633 | |
| 634 | if (*fw == NULL) |
| 635 | ret = -ENOMEM; |
| 636 | |
| 637 | release_firmware(fw_entry); |
| 638 | |
| 639 | return ret; |
| 640 | } |
| 641 | |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 642 | #ifdef CONFIG_OF |
| 643 | static const char *get_target_ver_dir(const struct ath6kl *ar) |
| 644 | { |
| 645 | switch (ar->version.target_ver) { |
| 646 | case AR6003_REV1_VERSION: |
| 647 | return "ath6k/AR6003/hw1.0"; |
| 648 | case AR6003_REV2_VERSION: |
| 649 | return "ath6k/AR6003/hw2.0"; |
| 650 | case AR6003_REV3_VERSION: |
| 651 | return "ath6k/AR6003/hw2.1.1"; |
| 652 | } |
| 653 | ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, |
| 654 | ar->version.target_ver); |
| 655 | return NULL; |
| 656 | } |
| 657 | |
| 658 | /* |
| 659 | * Check the device tree for a board-id and use it to construct |
| 660 | * the pathname to the firmware file. Used (for now) to find a |
| 661 | * fallback to the "bdata.bin" file--typically a symlink to the |
| 662 | * appropriate board-specific file. |
| 663 | */ |
| 664 | static bool check_device_tree(struct ath6kl *ar) |
| 665 | { |
| 666 | static const char *board_id_prop = "atheros,board-id"; |
| 667 | struct device_node *node; |
| 668 | char board_filename[64]; |
| 669 | const char *board_id; |
| 670 | int ret; |
| 671 | |
| 672 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { |
| 673 | board_id = of_get_property(node, board_id_prop, NULL); |
| 674 | if (board_id == NULL) { |
| 675 | ath6kl_warn("No \"%s\" property on %s node.\n", |
| 676 | board_id_prop, node->name); |
| 677 | continue; |
| 678 | } |
| 679 | snprintf(board_filename, sizeof(board_filename), |
| 680 | "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); |
| 681 | |
| 682 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, |
| 683 | &ar->fw_board_len); |
| 684 | if (ret) { |
| 685 | ath6kl_err("Failed to get DT board file %s: %d\n", |
| 686 | board_filename, ret); |
| 687 | continue; |
| 688 | } |
| 689 | return true; |
| 690 | } |
| 691 | return false; |
| 692 | } |
| 693 | #else |
| 694 | static bool check_device_tree(struct ath6kl *ar) |
| 695 | { |
| 696 | return false; |
| 697 | } |
| 698 | #endif /* CONFIG_OF */ |
| 699 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 700 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
| 701 | { |
| 702 | const char *filename; |
| 703 | int ret; |
| 704 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 705 | if (ar->fw_board != NULL) |
| 706 | return 0; |
| 707 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 708 | switch (ar->version.target_ver) { |
| 709 | case AR6003_REV2_VERSION: |
| 710 | filename = AR6003_REV2_BOARD_DATA_FILE; |
| 711 | break; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 712 | case AR6004_REV1_VERSION: |
| 713 | filename = AR6004_REV1_BOARD_DATA_FILE; |
| 714 | break; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 715 | default: |
| 716 | filename = AR6003_REV3_BOARD_DATA_FILE; |
| 717 | break; |
| 718 | } |
| 719 | |
| 720 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, |
| 721 | &ar->fw_board_len); |
| 722 | if (ret == 0) { |
| 723 | /* managed to get proper board file */ |
| 724 | return 0; |
| 725 | } |
| 726 | |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 727 | if (check_device_tree(ar)) { |
| 728 | /* got board file from device tree */ |
| 729 | return 0; |
| 730 | } |
| 731 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 732 | /* there was no proper board file, try to use default instead */ |
| 733 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", |
| 734 | filename, ret); |
| 735 | |
| 736 | switch (ar->version.target_ver) { |
| 737 | case AR6003_REV2_VERSION: |
| 738 | filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; |
| 739 | break; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 740 | case AR6004_REV1_VERSION: |
| 741 | filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; |
| 742 | break; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 743 | default: |
| 744 | filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; |
| 745 | break; |
| 746 | } |
| 747 | |
| 748 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, |
| 749 | &ar->fw_board_len); |
| 750 | if (ret) { |
| 751 | ath6kl_err("Failed to get default board file %s: %d\n", |
| 752 | filename, ret); |
| 753 | return ret; |
| 754 | } |
| 755 | |
| 756 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); |
| 757 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); |
| 758 | |
| 759 | return 0; |
| 760 | } |
| 761 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 762 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
| 763 | { |
| 764 | const char *filename; |
| 765 | int ret; |
| 766 | |
| 767 | if (ar->fw_otp != NULL) |
| 768 | return 0; |
| 769 | |
| 770 | switch (ar->version.target_ver) { |
| 771 | case AR6003_REV2_VERSION: |
| 772 | filename = AR6003_REV2_OTP_FILE; |
| 773 | break; |
| 774 | case AR6004_REV1_VERSION: |
| 775 | ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); |
| 776 | return 0; |
| 777 | break; |
| 778 | default: |
| 779 | filename = AR6003_REV3_OTP_FILE; |
| 780 | break; |
| 781 | } |
| 782 | |
| 783 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, |
| 784 | &ar->fw_otp_len); |
| 785 | if (ret) { |
| 786 | ath6kl_err("Failed to get OTP file %s: %d\n", |
| 787 | filename, ret); |
| 788 | return ret; |
| 789 | } |
| 790 | |
| 791 | return 0; |
| 792 | } |
| 793 | |
| 794 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) |
| 795 | { |
| 796 | const char *filename; |
| 797 | int ret; |
| 798 | |
| 799 | if (ar->fw != NULL) |
| 800 | return 0; |
| 801 | |
| 802 | if (testmode) { |
| 803 | switch (ar->version.target_ver) { |
| 804 | case AR6003_REV2_VERSION: |
| 805 | filename = AR6003_REV2_TCMD_FIRMWARE_FILE; |
| 806 | break; |
| 807 | case AR6003_REV3_VERSION: |
| 808 | filename = AR6003_REV3_TCMD_FIRMWARE_FILE; |
| 809 | break; |
| 810 | case AR6004_REV1_VERSION: |
| 811 | ath6kl_warn("testmode not supported with ar6004\n"); |
| 812 | return -EOPNOTSUPP; |
| 813 | default: |
| 814 | ath6kl_warn("unknown target version: 0x%x\n", |
| 815 | ar->version.target_ver); |
| 816 | return -EINVAL; |
| 817 | } |
| 818 | |
| 819 | set_bit(TESTMODE, &ar->flag); |
| 820 | |
| 821 | goto get_fw; |
| 822 | } |
| 823 | |
| 824 | switch (ar->version.target_ver) { |
| 825 | case AR6003_REV2_VERSION: |
| 826 | filename = AR6003_REV2_FIRMWARE_FILE; |
| 827 | break; |
| 828 | case AR6004_REV1_VERSION: |
| 829 | filename = AR6004_REV1_FIRMWARE_FILE; |
| 830 | break; |
| 831 | default: |
| 832 | filename = AR6003_REV3_FIRMWARE_FILE; |
| 833 | break; |
| 834 | } |
| 835 | |
| 836 | get_fw: |
| 837 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); |
| 838 | if (ret) { |
| 839 | ath6kl_err("Failed to get firmware file %s: %d\n", |
| 840 | filename, ret); |
| 841 | return ret; |
| 842 | } |
| 843 | |
| 844 | return 0; |
| 845 | } |
| 846 | |
| 847 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) |
| 848 | { |
| 849 | const char *filename; |
| 850 | int ret; |
| 851 | |
| 852 | switch (ar->version.target_ver) { |
| 853 | case AR6003_REV2_VERSION: |
| 854 | filename = AR6003_REV2_PATCH_FILE; |
| 855 | break; |
| 856 | case AR6004_REV1_VERSION: |
| 857 | /* FIXME: implement for AR6004 */ |
| 858 | return 0; |
| 859 | break; |
| 860 | default: |
| 861 | filename = AR6003_REV3_PATCH_FILE; |
| 862 | break; |
| 863 | } |
| 864 | |
| 865 | if (ar->fw_patch == NULL) { |
| 866 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, |
| 867 | &ar->fw_patch_len); |
| 868 | if (ret) { |
| 869 | ath6kl_err("Failed to get patch file %s: %d\n", |
| 870 | filename, ret); |
| 871 | return ret; |
| 872 | } |
| 873 | } |
| 874 | |
| 875 | return 0; |
| 876 | } |
| 877 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 878 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 879 | { |
| 880 | int ret; |
| 881 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 882 | ret = ath6kl_fetch_otp_file(ar); |
| 883 | if (ret) |
| 884 | return ret; |
| 885 | |
| 886 | ret = ath6kl_fetch_fw_file(ar); |
| 887 | if (ret) |
| 888 | return ret; |
| 889 | |
| 890 | ret = ath6kl_fetch_patch_file(ar); |
| 891 | if (ret) |
| 892 | return ret; |
| 893 | |
| 894 | return 0; |
| 895 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 896 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 897 | static int ath6kl_fetch_fw_api2(struct ath6kl *ar) |
| 898 | { |
| 899 | size_t magic_len, len, ie_len; |
| 900 | const struct firmware *fw; |
| 901 | struct ath6kl_fw_ie *hdr; |
| 902 | const char *filename; |
| 903 | const u8 *data; |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 904 | int ret, ie_id, i, index, bit; |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 905 | __le32 *val; |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 906 | |
| 907 | switch (ar->version.target_ver) { |
| 908 | case AR6003_REV2_VERSION: |
| 909 | filename = AR6003_REV2_FIRMWARE_2_FILE; |
| 910 | break; |
| 911 | case AR6003_REV3_VERSION: |
| 912 | filename = AR6003_REV3_FIRMWARE_2_FILE; |
| 913 | break; |
| 914 | case AR6004_REV1_VERSION: |
| 915 | filename = AR6004_REV1_FIRMWARE_2_FILE; |
| 916 | break; |
| 917 | default: |
| 918 | return -EOPNOTSUPP; |
| 919 | } |
| 920 | |
| 921 | ret = request_firmware(&fw, filename, ar->dev); |
| 922 | if (ret) |
| 923 | return ret; |
| 924 | |
| 925 | data = fw->data; |
| 926 | len = fw->size; |
| 927 | |
| 928 | /* magic also includes the null byte, check that as well */ |
| 929 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; |
| 930 | |
| 931 | if (len < magic_len) { |
| 932 | ret = -EINVAL; |
| 933 | goto out; |
| 934 | } |
| 935 | |
| 936 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { |
| 937 | ret = -EINVAL; |
| 938 | goto out; |
| 939 | } |
| 940 | |
| 941 | len -= magic_len; |
| 942 | data += magic_len; |
| 943 | |
| 944 | /* loop elements */ |
| 945 | while (len > sizeof(struct ath6kl_fw_ie)) { |
| 946 | /* hdr is unaligned! */ |
| 947 | hdr = (struct ath6kl_fw_ie *) data; |
| 948 | |
| 949 | ie_id = le32_to_cpup(&hdr->id); |
| 950 | ie_len = le32_to_cpup(&hdr->len); |
| 951 | |
| 952 | len -= sizeof(*hdr); |
| 953 | data += sizeof(*hdr); |
| 954 | |
| 955 | if (len < ie_len) { |
| 956 | ret = -EINVAL; |
| 957 | goto out; |
| 958 | } |
| 959 | |
| 960 | switch (ie_id) { |
| 961 | case ATH6KL_FW_IE_OTP_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 962 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 963 | ie_len); |
| 964 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 965 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
| 966 | |
| 967 | if (ar->fw_otp == NULL) { |
| 968 | ret = -ENOMEM; |
| 969 | goto out; |
| 970 | } |
| 971 | |
| 972 | ar->fw_otp_len = ie_len; |
| 973 | break; |
| 974 | case ATH6KL_FW_IE_FW_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 975 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 976 | ie_len); |
| 977 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 978 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
| 979 | |
| 980 | if (ar->fw == NULL) { |
| 981 | ret = -ENOMEM; |
| 982 | goto out; |
| 983 | } |
| 984 | |
| 985 | ar->fw_len = ie_len; |
| 986 | break; |
| 987 | case ATH6KL_FW_IE_PATCH_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 988 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 989 | ie_len); |
| 990 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 991 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
| 992 | |
| 993 | if (ar->fw_patch == NULL) { |
| 994 | ret = -ENOMEM; |
| 995 | goto out; |
| 996 | } |
| 997 | |
| 998 | ar->fw_patch_len = ie_len; |
| 999 | break; |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1000 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
| 1001 | val = (__le32 *) data; |
| 1002 | ar->hw.reserved_ram_size = le32_to_cpup(val); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1003 | |
| 1004 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1005 | "found reserved ram size ie 0x%d\n", |
| 1006 | ar->hw.reserved_ram_size); |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1007 | break; |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 1008 | case ATH6KL_FW_IE_CAPABILITIES: |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1009 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1010 | "found firmware capabilities ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1011 | ie_len); |
| 1012 | |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 1013 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
| 1014 | index = ALIGN(i, 8) / 8; |
| 1015 | bit = i % 8; |
| 1016 | |
| 1017 | if (data[index] & (1 << bit)) |
| 1018 | __set_bit(i, ar->fw_capabilities); |
| 1019 | } |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1020 | |
| 1021 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", |
| 1022 | ar->fw_capabilities, |
| 1023 | sizeof(ar->fw_capabilities)); |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 1024 | break; |
Kalle Valo | 1b4304d | 2011-09-27 11:05:26 +0300 | [diff] [blame] | 1025 | case ATH6KL_FW_IE_PATCH_ADDR: |
| 1026 | if (ie_len != sizeof(*val)) |
| 1027 | break; |
| 1028 | |
| 1029 | val = (__le32 *) data; |
| 1030 | ar->hw.dataset_patch_addr = le32_to_cpup(val); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1031 | |
| 1032 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1033 | "found patch address ie 0x%d\n", |
| 1034 | ar->hw.dataset_patch_addr); |
Kalle Valo | 1b4304d | 2011-09-27 11:05:26 +0300 | [diff] [blame] | 1035 | break; |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1036 | default: |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1037 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1038 | le32_to_cpup(&hdr->id)); |
| 1039 | break; |
| 1040 | } |
| 1041 | |
| 1042 | len -= ie_len; |
| 1043 | data += ie_len; |
| 1044 | }; |
| 1045 | |
| 1046 | ret = 0; |
| 1047 | out: |
| 1048 | release_firmware(fw); |
| 1049 | |
| 1050 | return ret; |
| 1051 | } |
| 1052 | |
| 1053 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) |
| 1054 | { |
| 1055 | int ret; |
| 1056 | |
| 1057 | ret = ath6kl_fetch_board_file(ar); |
| 1058 | if (ret) |
| 1059 | return ret; |
| 1060 | |
| 1061 | ret = ath6kl_fetch_fw_api2(ar); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1062 | if (ret == 0) { |
| 1063 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1064 | return 0; |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1065 | } |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1066 | |
| 1067 | ret = ath6kl_fetch_fw_api1(ar); |
| 1068 | if (ret) |
| 1069 | return ret; |
| 1070 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1071 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); |
| 1072 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1073 | return 0; |
| 1074 | } |
| 1075 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1076 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
| 1077 | { |
| 1078 | u32 board_address, board_ext_address, param; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1079 | u32 board_data_size, board_ext_data_size; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1080 | int ret; |
| 1081 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1082 | if (WARN_ON(ar->fw_board == NULL)) |
| 1083 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1084 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1085 | /* |
| 1086 | * Determine where in Target RAM to write Board Data. |
| 1087 | * For AR6004, host determine Target RAM address for |
| 1088 | * writing board data. |
| 1089 | */ |
| 1090 | if (ar->target_type == TARGET_TYPE_AR6004) { |
| 1091 | board_address = AR6004_REV1_BOARD_DATA_ADDRESS; |
| 1092 | ath6kl_bmi_write(ar, |
| 1093 | ath6kl_get_hi_item_addr(ar, |
| 1094 | HI_ITEM(hi_board_data)), |
| 1095 | (u8 *) &board_address, 4); |
| 1096 | } else { |
| 1097 | ath6kl_bmi_read(ar, |
| 1098 | ath6kl_get_hi_item_addr(ar, |
| 1099 | HI_ITEM(hi_board_data)), |
| 1100 | (u8 *) &board_address, 4); |
| 1101 | } |
| 1102 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1103 | /* determine where in target ram to write extended board data */ |
| 1104 | ath6kl_bmi_read(ar, |
| 1105 | ath6kl_get_hi_item_addr(ar, |
| 1106 | HI_ITEM(hi_board_ext_data)), |
| 1107 | (u8 *) &board_ext_address, 4); |
| 1108 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1109 | if (board_ext_address == 0) { |
| 1110 | ath6kl_err("Failed to get board file target address.\n"); |
| 1111 | return -EINVAL; |
| 1112 | } |
| 1113 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1114 | switch (ar->target_type) { |
| 1115 | case TARGET_TYPE_AR6003: |
| 1116 | board_data_size = AR6003_BOARD_DATA_SZ; |
| 1117 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; |
| 1118 | break; |
| 1119 | case TARGET_TYPE_AR6004: |
| 1120 | board_data_size = AR6004_BOARD_DATA_SZ; |
| 1121 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; |
| 1122 | break; |
| 1123 | default: |
| 1124 | WARN_ON(1); |
| 1125 | return -EINVAL; |
| 1126 | break; |
| 1127 | } |
| 1128 | |
| 1129 | if (ar->fw_board_len == (board_data_size + |
| 1130 | board_ext_data_size)) { |
| 1131 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1132 | /* write extended board data */ |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1133 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1134 | "writing extended board data to 0x%x (%d B)\n", |
| 1135 | board_ext_address, board_ext_data_size); |
| 1136 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1137 | ret = ath6kl_bmi_write(ar, board_ext_address, |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1138 | ar->fw_board + board_data_size, |
| 1139 | board_ext_data_size); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1140 | if (ret) { |
| 1141 | ath6kl_err("Failed to write extended board data: %d\n", |
| 1142 | ret); |
| 1143 | return ret; |
| 1144 | } |
| 1145 | |
| 1146 | /* record that extended board data is initialized */ |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1147 | param = (board_ext_data_size << 16) | 1; |
| 1148 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1149 | ath6kl_bmi_write(ar, |
| 1150 | ath6kl_get_hi_item_addr(ar, |
| 1151 | HI_ITEM(hi_board_ext_data_config)), |
| 1152 | (unsigned char *) ¶m, 4); |
| 1153 | } |
| 1154 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1155 | if (ar->fw_board_len < board_data_size) { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1156 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
| 1157 | ret = -EINVAL; |
| 1158 | return ret; |
| 1159 | } |
| 1160 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1161 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
| 1162 | board_address, board_data_size); |
| 1163 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1164 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1165 | board_data_size); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1166 | |
| 1167 | if (ret) { |
| 1168 | ath6kl_err("Board file bmi write failed: %d\n", ret); |
| 1169 | return ret; |
| 1170 | } |
| 1171 | |
| 1172 | /* record the fact that Board Data IS initialized */ |
| 1173 | param = 1; |
| 1174 | ath6kl_bmi_write(ar, |
| 1175 | ath6kl_get_hi_item_addr(ar, |
| 1176 | HI_ITEM(hi_board_data_initialized)), |
| 1177 | (u8 *)¶m, 4); |
| 1178 | |
| 1179 | return ret; |
| 1180 | } |
| 1181 | |
| 1182 | static int ath6kl_upload_otp(struct ath6kl *ar) |
| 1183 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1184 | u32 address, param; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1185 | bool from_hw = false; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1186 | int ret; |
| 1187 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1188 | if (WARN_ON(ar->fw_otp == NULL)) |
| 1189 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1190 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1191 | address = ar->hw.app_load_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1192 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1193 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1194 | ar->fw_otp_len); |
| 1195 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1196 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
| 1197 | ar->fw_otp_len); |
| 1198 | if (ret) { |
| 1199 | ath6kl_err("Failed to upload OTP file: %d\n", ret); |
| 1200 | return ret; |
| 1201 | } |
| 1202 | |
Kalle Valo | 639d0b8 | 2011-09-12 12:48:09 +0300 | [diff] [blame] | 1203 | /* read firmware start address */ |
| 1204 | ret = ath6kl_bmi_read(ar, |
| 1205 | ath6kl_get_hi_item_addr(ar, |
| 1206 | HI_ITEM(hi_app_start)), |
| 1207 | (u8 *) &address, sizeof(address)); |
| 1208 | |
| 1209 | if (ret) { |
| 1210 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); |
| 1211 | return ret; |
| 1212 | } |
| 1213 | |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1214 | if (ar->hw.app_start_override_addr == 0) { |
| 1215 | ar->hw.app_start_override_addr = address; |
| 1216 | from_hw = true; |
| 1217 | } |
Kalle Valo | 639d0b8 | 2011-09-12 12:48:09 +0300 | [diff] [blame] | 1218 | |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1219 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
| 1220 | from_hw ? " (from hw)" : "", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1221 | ar->hw.app_start_override_addr); |
| 1222 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1223 | /* execute the OTP code */ |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1224 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
| 1225 | ar->hw.app_start_override_addr); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1226 | param = 0; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1227 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1228 | |
| 1229 | return ret; |
| 1230 | } |
| 1231 | |
| 1232 | static int ath6kl_upload_firmware(struct ath6kl *ar) |
| 1233 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1234 | u32 address; |
| 1235 | int ret; |
| 1236 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1237 | if (WARN_ON(ar->fw == NULL)) |
| 1238 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1239 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1240 | address = ar->hw.app_load_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1241 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1242 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1243 | address, ar->fw_len); |
| 1244 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1245 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
| 1246 | |
| 1247 | if (ret) { |
| 1248 | ath6kl_err("Failed to write firmware: %d\n", ret); |
| 1249 | return ret; |
| 1250 | } |
| 1251 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1252 | /* |
| 1253 | * Set starting address for firmware |
| 1254 | * Don't need to setup app_start override addr on AR6004 |
| 1255 | */ |
| 1256 | if (ar->target_type != TARGET_TYPE_AR6004) { |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1257 | address = ar->hw.app_start_override_addr; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1258 | ath6kl_bmi_set_app_start(ar, address); |
| 1259 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1260 | return ret; |
| 1261 | } |
| 1262 | |
| 1263 | static int ath6kl_upload_patch(struct ath6kl *ar) |
| 1264 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1265 | u32 address, param; |
| 1266 | int ret; |
| 1267 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1268 | if (WARN_ON(ar->fw_patch == NULL)) |
| 1269 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1270 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1271 | address = ar->hw.dataset_patch_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1272 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1273 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1274 | address, ar->fw_patch_len); |
| 1275 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1276 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
| 1277 | if (ret) { |
| 1278 | ath6kl_err("Failed to write patch file: %d\n", ret); |
| 1279 | return ret; |
| 1280 | } |
| 1281 | |
| 1282 | param = address; |
| 1283 | ath6kl_bmi_write(ar, |
| 1284 | ath6kl_get_hi_item_addr(ar, |
| 1285 | HI_ITEM(hi_dset_list_head)), |
| 1286 | (unsigned char *) ¶m, 4); |
| 1287 | |
| 1288 | return 0; |
| 1289 | } |
| 1290 | |
| 1291 | static int ath6kl_init_upload(struct ath6kl *ar) |
| 1292 | { |
| 1293 | u32 param, options, sleep, address; |
| 1294 | int status = 0; |
| 1295 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1296 | if (ar->target_type != TARGET_TYPE_AR6003 && |
| 1297 | ar->target_type != TARGET_TYPE_AR6004) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1298 | return -EINVAL; |
| 1299 | |
| 1300 | /* temporarily disable system sleep */ |
| 1301 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; |
| 1302 | status = ath6kl_bmi_reg_read(ar, address, ¶m); |
| 1303 | if (status) |
| 1304 | return status; |
| 1305 | |
| 1306 | options = param; |
| 1307 | |
| 1308 | param |= ATH6KL_OPTION_SLEEP_DISABLE; |
| 1309 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1310 | if (status) |
| 1311 | return status; |
| 1312 | |
| 1313 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; |
| 1314 | status = ath6kl_bmi_reg_read(ar, address, ¶m); |
| 1315 | if (status) |
| 1316 | return status; |
| 1317 | |
| 1318 | sleep = param; |
| 1319 | |
| 1320 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); |
| 1321 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1322 | if (status) |
| 1323 | return status; |
| 1324 | |
| 1325 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", |
| 1326 | options, sleep); |
| 1327 | |
| 1328 | /* program analog PLL register */ |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1329 | /* no need to control 40/44MHz clock on AR6004 */ |
| 1330 | if (ar->target_type != TARGET_TYPE_AR6004) { |
| 1331 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, |
| 1332 | 0xF9104001); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1333 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1334 | if (status) |
| 1335 | return status; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1336 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1337 | /* Run at 80/88MHz by default */ |
| 1338 | param = SM(CPU_CLOCK_STANDARD, 1); |
| 1339 | |
| 1340 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; |
| 1341 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1342 | if (status) |
| 1343 | return status; |
| 1344 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1345 | |
| 1346 | param = 0; |
| 1347 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; |
| 1348 | param = SM(LPO_CAL_ENABLE, 1); |
| 1349 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1350 | if (status) |
| 1351 | return status; |
| 1352 | |
| 1353 | /* WAR to avoid SDIO CRC err */ |
| 1354 | if (ar->version.target_ver == AR6003_REV2_VERSION) { |
| 1355 | ath6kl_err("temporary war to avoid sdio crc error\n"); |
| 1356 | |
| 1357 | param = 0x20; |
| 1358 | |
| 1359 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; |
| 1360 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1361 | if (status) |
| 1362 | return status; |
| 1363 | |
| 1364 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; |
| 1365 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1366 | if (status) |
| 1367 | return status; |
| 1368 | |
| 1369 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; |
| 1370 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1371 | if (status) |
| 1372 | return status; |
| 1373 | |
| 1374 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; |
| 1375 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1376 | if (status) |
| 1377 | return status; |
| 1378 | } |
| 1379 | |
| 1380 | /* write EEPROM data to Target RAM */ |
| 1381 | status = ath6kl_upload_board_file(ar); |
| 1382 | if (status) |
| 1383 | return status; |
| 1384 | |
| 1385 | /* transfer One time Programmable data */ |
| 1386 | status = ath6kl_upload_otp(ar); |
| 1387 | if (status) |
| 1388 | return status; |
| 1389 | |
| 1390 | /* Download Target firmware */ |
| 1391 | status = ath6kl_upload_firmware(ar); |
| 1392 | if (status) |
| 1393 | return status; |
| 1394 | |
| 1395 | status = ath6kl_upload_patch(ar); |
| 1396 | if (status) |
| 1397 | return status; |
| 1398 | |
| 1399 | /* Restore system sleep */ |
| 1400 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; |
| 1401 | status = ath6kl_bmi_reg_write(ar, address, sleep); |
| 1402 | if (status) |
| 1403 | return status; |
| 1404 | |
| 1405 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; |
| 1406 | param = options | 0x20; |
| 1407 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1408 | if (status) |
| 1409 | return status; |
| 1410 | |
| 1411 | /* Configure GPIO AR6003 UART */ |
| 1412 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; |
| 1413 | status = ath6kl_bmi_write(ar, |
| 1414 | ath6kl_get_hi_item_addr(ar, |
| 1415 | HI_ITEM(hi_dbg_uart_txpin)), |
| 1416 | (u8 *)¶m, 4); |
| 1417 | |
| 1418 | return status; |
| 1419 | } |
| 1420 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1421 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
| 1422 | { |
| 1423 | switch (ar->version.target_ver) { |
| 1424 | case AR6003_REV2_VERSION: |
| 1425 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; |
| 1426 | ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1427 | ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; |
| 1428 | ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame^] | 1429 | |
| 1430 | /* hw2.0 needs override address hardcoded */ |
| 1431 | ar->hw.app_start_override_addr = 0x944C00; |
| 1432 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1433 | break; |
| 1434 | case AR6003_REV3_VERSION: |
| 1435 | ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; |
| 1436 | ar->hw.app_load_addr = 0x1234; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1437 | ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; |
| 1438 | ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1439 | break; |
| 1440 | case AR6004_REV1_VERSION: |
| 1441 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; |
| 1442 | ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1443 | ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; |
| 1444 | ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1445 | break; |
| 1446 | default: |
| 1447 | ath6kl_err("Unsupported hardware version: 0x%x\n", |
| 1448 | ar->version.target_ver); |
| 1449 | return -EINVAL; |
| 1450 | } |
| 1451 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1452 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1453 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", |
| 1454 | ar->version.target_ver, ar->target_type, |
| 1455 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); |
| 1456 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1457 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", |
| 1458 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, |
| 1459 | ar->hw.reserved_ram_size); |
| 1460 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1461 | return 0; |
| 1462 | } |
| 1463 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1464 | static int ath6kl_init(struct net_device *dev) |
| 1465 | { |
| 1466 | struct ath6kl *ar = ath6kl_priv(dev); |
| 1467 | int status = 0; |
| 1468 | s32 timeleft; |
| 1469 | |
| 1470 | if (!ar) |
| 1471 | return -EIO; |
| 1472 | |
| 1473 | /* Do we need to finish the BMI phase */ |
| 1474 | if (ath6kl_bmi_done(ar)) { |
| 1475 | status = -EIO; |
| 1476 | goto ath6kl_init_done; |
| 1477 | } |
| 1478 | |
| 1479 | /* Indicate that WMI is enabled (although not ready yet) */ |
| 1480 | set_bit(WMI_ENABLED, &ar->flag); |
Vasanthakumar Thiagarajan | 2865785 | 2011-07-21 12:00:49 +0530 | [diff] [blame] | 1481 | ar->wmi = ath6kl_wmi_init(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1482 | if (!ar->wmi) { |
| 1483 | ath6kl_err("failed to initialize wmi\n"); |
| 1484 | status = -EIO; |
| 1485 | goto ath6kl_init_done; |
| 1486 | } |
| 1487 | |
| 1488 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); |
| 1489 | |
| 1490 | /* |
| 1491 | * The reason we have to wait for the target here is that the |
| 1492 | * driver layer has to init BMI in order to set the host block |
| 1493 | * size. |
| 1494 | */ |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1495 | if (ath6kl_htc_wait_target(ar->htc_target)) { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1496 | status = -EIO; |
Vasanthakumar Thiagarajan | 852bd9d | 2011-07-21 14:24:54 +0530 | [diff] [blame] | 1497 | goto err_node_cleanup; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1498 | } |
| 1499 | |
| 1500 | if (ath6kl_init_service_ep(ar)) { |
| 1501 | status = -EIO; |
| 1502 | goto err_cleanup_scatter; |
| 1503 | } |
| 1504 | |
| 1505 | /* setup access class priority mappings */ |
| 1506 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ |
| 1507 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; |
| 1508 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; |
| 1509 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ |
| 1510 | |
| 1511 | /* give our connected endpoints some buffers */ |
| 1512 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); |
| 1513 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); |
| 1514 | |
| 1515 | /* allocate some buffers that handle larger AMSDU frames */ |
| 1516 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); |
| 1517 | |
| 1518 | /* setup credit distribution */ |
| 1519 | ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); |
| 1520 | |
| 1521 | ath6kl_cookie_init(ar); |
| 1522 | |
| 1523 | /* start HTC */ |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1524 | status = ath6kl_htc_start(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1525 | |
| 1526 | if (status) { |
| 1527 | ath6kl_cookie_cleanup(ar); |
| 1528 | goto err_rxbuf_cleanup; |
| 1529 | } |
| 1530 | |
| 1531 | /* Wait for Wmi event to be ready */ |
| 1532 | timeleft = wait_event_interruptible_timeout(ar->event_wq, |
| 1533 | test_bit(WMI_READY, |
| 1534 | &ar->flag), |
| 1535 | WMI_TIMEOUT); |
| 1536 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1537 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); |
| 1538 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1539 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
| 1540 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", |
| 1541 | ATH6KL_ABI_VERSION, ar->version.abi_ver); |
| 1542 | status = -EIO; |
| 1543 | goto err_htc_stop; |
| 1544 | } |
| 1545 | |
| 1546 | if (!timeleft || signal_pending(current)) { |
| 1547 | ath6kl_err("wmi is not ready or wait was interrupted\n"); |
| 1548 | status = -EIO; |
| 1549 | goto err_htc_stop; |
| 1550 | } |
| 1551 | |
| 1552 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); |
| 1553 | |
| 1554 | /* communicate the wmi protocol verision to the target */ |
| 1555 | if ((ath6kl_set_host_app_area(ar)) != 0) |
| 1556 | ath6kl_err("unable to set the host app area\n"); |
| 1557 | |
| 1558 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | |
| 1559 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; |
| 1560 | |
Johannes Berg | 562a748 | 2011-11-07 12:39:33 +0100 | [diff] [blame] | 1561 | ar->wdev->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
| 1562 | WIPHY_FLAG_HAVE_AP_SME; |
Vivek Natarajan | 011a36e | 2011-09-19 13:29:16 +0530 | [diff] [blame] | 1563 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1564 | status = ath6kl_target_config_wlan_params(ar); |
| 1565 | if (!status) |
| 1566 | goto ath6kl_init_done; |
| 1567 | |
| 1568 | err_htc_stop: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1569 | ath6kl_htc_stop(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1570 | err_rxbuf_cleanup: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1571 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1572 | ath6kl_cleanup_amsdu_rxbufs(ar); |
| 1573 | err_cleanup_scatter: |
| 1574 | ath6kl_hif_cleanup_scatter(ar); |
Vasanthakumar Thiagarajan | 852bd9d | 2011-07-21 14:24:54 +0530 | [diff] [blame] | 1575 | err_node_cleanup: |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1576 | ath6kl_wmi_shutdown(ar->wmi); |
| 1577 | clear_bit(WMI_ENABLED, &ar->flag); |
| 1578 | ar->wmi = NULL; |
| 1579 | |
| 1580 | ath6kl_init_done: |
| 1581 | return status; |
| 1582 | } |
| 1583 | |
| 1584 | int ath6kl_core_init(struct ath6kl *ar) |
| 1585 | { |
| 1586 | int ret = 0; |
| 1587 | struct ath6kl_bmi_target_info targ_info; |
| 1588 | |
| 1589 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); |
| 1590 | if (!ar->ath6kl_wq) |
| 1591 | return -ENOMEM; |
| 1592 | |
| 1593 | ret = ath6kl_bmi_init(ar); |
| 1594 | if (ret) |
| 1595 | goto err_wq; |
| 1596 | |
| 1597 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); |
| 1598 | if (ret) |
| 1599 | goto err_bmi_cleanup; |
| 1600 | |
| 1601 | ar->version.target_ver = le32_to_cpu(targ_info.version); |
| 1602 | ar->target_type = le32_to_cpu(targ_info.type); |
| 1603 | ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version); |
| 1604 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1605 | ret = ath6kl_init_hw_params(ar); |
| 1606 | if (ret) |
| 1607 | goto err_bmi_cleanup; |
| 1608 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1609 | ret = ath6kl_configure_target(ar); |
| 1610 | if (ret) |
| 1611 | goto err_bmi_cleanup; |
| 1612 | |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1613 | ar->htc_target = ath6kl_htc_create(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1614 | |
| 1615 | if (!ar->htc_target) { |
| 1616 | ret = -ENOMEM; |
| 1617 | goto err_bmi_cleanup; |
| 1618 | } |
| 1619 | |
| 1620 | ar->aggr_cntxt = aggr_init(ar->net_dev); |
| 1621 | if (!ar->aggr_cntxt) { |
| 1622 | ath6kl_err("failed to initialize aggr\n"); |
| 1623 | ret = -ENOMEM; |
| 1624 | goto err_htc_cleanup; |
| 1625 | } |
| 1626 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1627 | ret = ath6kl_fetch_firmwares(ar); |
| 1628 | if (ret) |
| 1629 | goto err_htc_cleanup; |
| 1630 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1631 | ret = ath6kl_init_upload(ar); |
| 1632 | if (ret) |
| 1633 | goto err_htc_cleanup; |
| 1634 | |
| 1635 | ret = ath6kl_init(ar->net_dev); |
| 1636 | if (ret) |
| 1637 | goto err_htc_cleanup; |
| 1638 | |
| 1639 | /* This runs the init function if registered */ |
| 1640 | ret = register_netdev(ar->net_dev); |
| 1641 | if (ret) { |
| 1642 | ath6kl_err("register_netdev failed\n"); |
| 1643 | ath6kl_destroy(ar->net_dev, 0); |
| 1644 | return ret; |
| 1645 | } |
| 1646 | |
| 1647 | set_bit(NETDEV_REGISTERED, &ar->flag); |
| 1648 | |
| 1649 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", |
| 1650 | __func__, ar->net_dev->name, ar->net_dev, ar); |
| 1651 | |
| 1652 | return ret; |
| 1653 | |
| 1654 | err_htc_cleanup: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1655 | ath6kl_htc_cleanup(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1656 | err_bmi_cleanup: |
| 1657 | ath6kl_bmi_cleanup(ar); |
| 1658 | err_wq: |
| 1659 | destroy_workqueue(ar->ath6kl_wq); |
| 1660 | return ret; |
| 1661 | } |
| 1662 | |
| 1663 | void ath6kl_stop_txrx(struct ath6kl *ar) |
| 1664 | { |
| 1665 | struct net_device *ndev = ar->net_dev; |
| 1666 | |
| 1667 | if (!ndev) |
| 1668 | return; |
| 1669 | |
| 1670 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); |
| 1671 | |
| 1672 | if (down_interruptible(&ar->sem)) { |
| 1673 | ath6kl_err("down_interruptible failed\n"); |
| 1674 | return; |
| 1675 | } |
| 1676 | |
| 1677 | if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) |
| 1678 | ath6kl_stop_endpoint(ndev, false, true); |
| 1679 | |
Raja Mani | 575b5f3 | 2011-07-19 19:27:33 +0530 | [diff] [blame] | 1680 | clear_bit(WLAN_ENABLED, &ar->flag); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1681 | } |
| 1682 | |
| 1683 | /* |
| 1684 | * We need to differentiate between the surprise and planned removal of the |
| 1685 | * device because of the following consideration: |
| 1686 | * |
| 1687 | * - In case of surprise removal, the hcd already frees up the pending |
| 1688 | * for the device and hence there is no need to unregister the function |
| 1689 | * driver inorder to get these requests. For planned removal, the function |
| 1690 | * driver has to explicitly unregister itself to have the hcd return all the |
| 1691 | * pending requests before the data structures for the devices are freed up. |
| 1692 | * Note that as per the current implementation, the function driver will |
| 1693 | * end up releasing all the devices since there is no API to selectively |
| 1694 | * release a particular device. |
| 1695 | * |
| 1696 | * - Certain commands issued to the target can be skipped for surprise |
| 1697 | * removal since they will anyway not go through. |
| 1698 | */ |
| 1699 | void ath6kl_destroy(struct net_device *dev, unsigned int unregister) |
| 1700 | { |
| 1701 | struct ath6kl *ar; |
| 1702 | |
| 1703 | if (!dev || !ath6kl_priv(dev)) { |
| 1704 | ath6kl_err("failed to get device structure\n"); |
| 1705 | return; |
| 1706 | } |
| 1707 | |
| 1708 | ar = ath6kl_priv(dev); |
| 1709 | |
| 1710 | destroy_workqueue(ar->ath6kl_wq); |
| 1711 | |
| 1712 | if (ar->htc_target) |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1713 | ath6kl_htc_cleanup(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1714 | |
| 1715 | aggr_module_destroy(ar->aggr_cntxt); |
| 1716 | |
| 1717 | ath6kl_cookie_cleanup(ar); |
| 1718 | |
| 1719 | ath6kl_cleanup_amsdu_rxbufs(ar); |
| 1720 | |
| 1721 | ath6kl_bmi_cleanup(ar); |
| 1722 | |
Kalle Valo | bdf5396 | 2011-09-02 10:32:04 +0300 | [diff] [blame] | 1723 | ath6kl_debug_cleanup(ar); |
| 1724 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1725 | if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) { |
| 1726 | unregister_netdev(dev); |
| 1727 | clear_bit(NETDEV_REGISTERED, &ar->flag); |
| 1728 | } |
| 1729 | |
| 1730 | free_netdev(dev); |
| 1731 | |
Raja Mani | 1970357 | 2011-08-04 19:26:30 +0530 | [diff] [blame] | 1732 | kfree(ar->fw_board); |
| 1733 | kfree(ar->fw_otp); |
| 1734 | kfree(ar->fw); |
| 1735 | kfree(ar->fw_patch); |
| 1736 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1737 | ath6kl_cfg80211_deinit(ar); |
| 1738 | } |