blob: e8403006d52da384d90dc936f176dabf1282505e [file] [log] [blame]
Arnd Bergmann5d0769f2012-03-02 23:07:21 +00001/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 soc-u9500 {
16 #address-cells = <1>;
17 #size-cells = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +000018 compatible = "stericsson,db8500";
Lee Jonesdab64872012-03-07 17:22:30 +000019 interrupt-parent = <&intc>;
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000020 ranges;
Lee Jones7e0ce272012-03-15 16:46:17 +000021
Lee Jonesdab64872012-03-07 17:22:30 +000022 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
25 #address-cells = <1>;
26 interrupt-controller;
Lee Jonesdab64872012-03-07 17:22:30 +000027 reg = <0xa0411000 0x1000>,
28 <0xa0410100 0x100>;
29 };
30
Lee Jonesf1949ea2012-03-08 09:02:02 +000031 L2: l2-cache {
32 compatible = "arm,pl310-cache";
33 reg = <0xa0412000 0x1000>;
34 interrupts = <0 13 4>;
35 cache-unified;
36 cache-level = <2>;
37 };
38
Lee Jones7e0ce272012-03-15 16:46:17 +000039 pmu {
40 compatible = "arm,cortex-a9-pmu";
41 interrupts = <0 7 0x4>;
42 };
43
Lee Jones71de5c42012-03-16 09:53:24 +000044 timer@a0410600 {
45 compatible = "arm,cortex-a9-twd-timer";
46 reg = <0xa0410600 0x20>;
47 interrupts = <1 13 0x304>;
48 };
49
Lee Jones7e0ce272012-03-15 16:46:17 +000050 rtc@80154000 {
51 compatible = "stericsson,db8500-rtc";
52 reg = <0x80154000 0x1000>;
53 interrupts = <0 18 0x4>;
54 };
55
56 gpio0: gpio@8012e000 {
57 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +010058 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +000059 reg = <0x8012e000 0x80>;
60 interrupts = <0 119 0x4>;
61 supports-sleepmode;
62 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +010063 #gpio-cells = <2>;
64 gpio-bank = <0>;
Lee Jones7e0ce272012-03-15 16:46:17 +000065 };
66
67 gpio1: gpio@8012e080 {
68 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +010069 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +000070 reg = <0x8012e080 0x80>;
71 interrupts = <0 120 0x4>;
72 supports-sleepmode;
73 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +010074 #gpio-cells = <2>;
75 gpio-bank = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +000076 };
77
78 gpio2: gpio@8000e000 {
79 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +010080 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +000081 reg = <0x8000e000 0x80>;
82 interrupts = <0 121 0x4>;
83 supports-sleepmode;
84 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +010085 #gpio-cells = <2>;
86 gpio-bank = <2>;
Lee Jones7e0ce272012-03-15 16:46:17 +000087 };
88
89 gpio3: gpio@8000e080 {
90 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +010091 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +000092 reg = <0x8000e080 0x80>;
93 interrupts = <0 122 0x4>;
94 supports-sleepmode;
95 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +010096 #gpio-cells = <2>;
97 gpio-bank = <3>;
Lee Jones7e0ce272012-03-15 16:46:17 +000098 };
99
100 gpio4: gpio@8000e100 {
101 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100102 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000103 reg = <0x8000e100 0x80>;
104 interrupts = <0 123 0x4>;
105 supports-sleepmode;
106 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100107 #gpio-cells = <2>;
108 gpio-bank = <4>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000109 };
110
111 gpio5: gpio@8000e180 {
112 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100113 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000114 reg = <0x8000e180 0x80>;
115 interrupts = <0 124 0x4>;
116 supports-sleepmode;
117 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100118 #gpio-cells = <2>;
119 gpio-bank = <5>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000120 };
121
122 gpio6: gpio@8011e000 {
123 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100124 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000125 reg = <0x8011e000 0x80>;
126 interrupts = <0 125 0x4>;
127 supports-sleepmode;
128 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100129 #gpio-cells = <2>;
130 gpio-bank = <6>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000131 };
132
133 gpio7: gpio@8011e080 {
134 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100135 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000136 reg = <0x8011e080 0x80>;
137 interrupts = <0 126 0x4>;
138 supports-sleepmode;
139 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100140 #gpio-cells = <2>;
141 gpio-bank = <7>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000142 };
143
144 gpio8: gpio@a03fe000 {
145 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100146 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000147 reg = <0xa03fe000 0x80>;
148 interrupts = <0 127 0x4>;
149 supports-sleepmode;
150 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100151 #gpio-cells = <2>;
152 gpio-bank = <8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000153 };
154
155 usb@a03e0000 {
156 compatible = "stericsson,db8500-musb",
157 "mentor,musb";
158 reg = <0xa03e0000 0x10000>;
159 interrupts = <0 23 0x4>;
160 };
161
162 dma-controller@801C0000 {
163 compatible = "stericsson,db8500-dma40",
164 "stericsson,dma40";
165 reg = <0x801C0000 0x1000 0x40010000 0x800>;
166 interrupts = <0 25 0x4>;
167 };
168
169 prcmu@80157000 {
170 compatible = "stericsson,db8500-prcmu";
171 reg = <0x80157000 0x1000>;
172 interrupts = <46 47>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175
176 ab8500@5 {
177 compatible = "stericsson,ab8500";
178 reg = <5>; /* mailbox 5 is i2c */
179 interrupts = <0 40 0x4>;
180 };
181 };
182
183 i2c@80004000 {
Lee Jones785834a2012-04-13 15:05:04 +0100184 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
Lee Jones7e0ce272012-03-15 16:46:17 +0000185 reg = <0x80004000 0x1000>;
186 interrupts = <0 21 0x4>;
187 #address-cells = <1>;
188 #size-cells = <0>;
189 };
190
191 i2c@80122000 {
Lee Jones785834a2012-04-13 15:05:04 +0100192 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
Lee Jones7e0ce272012-03-15 16:46:17 +0000193 reg = <0x80122000 0x1000>;
194 interrupts = <0 22 0x4>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197 };
198
199 i2c@80128000 {
Lee Jones785834a2012-04-13 15:05:04 +0100200 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
Lee Jones7e0ce272012-03-15 16:46:17 +0000201 reg = <0x80128000 0x1000>;
202 interrupts = <0 55 0x4>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 };
206
207 i2c@80110000 {
Lee Jones785834a2012-04-13 15:05:04 +0100208 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
Lee Jones7e0ce272012-03-15 16:46:17 +0000209 reg = <0x80110000 0x1000>;
210 interrupts = <0 12 0x4>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 };
214
215 i2c@8012a000 {
Lee Jones785834a2012-04-13 15:05:04 +0100216 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
Lee Jones7e0ce272012-03-15 16:46:17 +0000217 reg = <0x8012a000 0x1000>;
218 interrupts = <0 51 0x4>;
219 #address-cells = <1>;
220 #size-cells = <0>;
221 };
222
223 ssp@80002000 {
224 compatible = "arm,pl022", "arm,primecell";
225 reg = <80002000 0x1000>;
226 interrupts = <0 14 0x4>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229 status = "disabled";
Lee Jones15daf692012-03-15 16:47:11 +0000230
231 // Add one of these for each child device
Lee Jones7e0ce272012-03-15 16:46:17 +0000232 cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
Lee Jones15daf692012-03-15 16:47:11 +0000233
Lee Jones7e0ce272012-03-15 16:46:17 +0000234 };
235
236 uart@80120000 {
237 compatible = "arm,pl011", "arm,primecell";
238 reg = <0x80120000 0x1000>;
239 interrupts = <0 11 0x4>;
240 status = "disabled";
241 };
242 uart@80121000 {
243 compatible = "arm,pl011", "arm,primecell";
244 reg = <0x80121000 0x1000>;
245 interrupts = <0 19 0x4>;
246 status = "disabled";
247 };
248 uart@80007000 {
249 compatible = "arm,pl011", "arm,primecell";
250 reg = <0x80007000 0x1000>;
251 interrupts = <0 26 0x4>;
252 status = "disabled";
253 };
254
255 sdi@80126000 {
256 compatible = "arm,pl18x", "arm,primecell";
257 reg = <0x80126000 0x1000>;
258 interrupts = <0 60 0x4>;
259 status = "disabled";
260 };
261 sdi@80118000 {
262 compatible = "arm,pl18x", "arm,primecell";
263 reg = <0x80118000 0x1000>;
264 interrupts = <0 50 0x4>;
265 status = "disabled";
266 };
267 sdi@80005000 {
268 compatible = "arm,pl18x", "arm,primecell";
269 reg = <0x80005000 0x1000>;
270 interrupts = <0 41 0x4>;
271 status = "disabled";
272 };
273 sdi@80119000 {
274 compatible = "arm,pl18x", "arm,primecell";
275 reg = <0x80119000 0x1000>;
276 interrupts = <0 59 0x4>;
277 status = "disabled";
278 };
279 sdi@80114000 {
280 compatible = "arm,pl18x", "arm,primecell";
281 reg = <0x80114000 0x1000>;
282 interrupts = <0 99 0x4>;
283 status = "disabled";
284 };
285 sdi@80008000 {
286 compatible = "arm,pl18x", "arm,primecell";
287 reg = <0x80114000 0x1000>;
288 interrupts = <0 100 0x4>;
289 status = "disabled";
290 };
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000291 };
292};