blob: af657ca58b7034f4f1756e8101b688a76bd93d48 [file] [log] [blame]
Bjorn Helgaas8cfab3c2018-01-26 12:50:27 -06001/* SPDX-License-Identifier: GPL-2.0 */
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +05302/**
3 * PCI Endpoint *Controller* (EPC) header file
4 *
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +05307 */
8
9#ifndef __LINUX_PCI_EPC_H
10#define __LINUX_PCI_EPC_H
11
12#include <linux/pci-epf.h>
13
14struct pci_epc;
15
16enum pci_epc_irq_type {
17 PCI_EPC_IRQ_UNKNOWN,
18 PCI_EPC_IRQ_LEGACY,
19 PCI_EPC_IRQ_MSI,
20};
21
22/**
23 * struct pci_epc_ops - set of function pointers for performing EPC operations
24 * @write_header: ops to populate configuration space header
25 * @set_bar: ops to configure the BAR
26 * @clear_bar: ops to reset the BAR
27 * @map_addr: ops to map CPU address to PCI address
28 * @unmap_addr: ops to unmap CPU address and PCI address
29 * @set_msi: ops to set the requested number of MSI interrupts in the MSI
30 * capability register
31 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
32 * the MSI capability register
33 * @raise_irq: ops to raise a legacy or MSI interrupt
34 * @start: ops to start the PCI link
35 * @stop: ops to stop the PCI link
36 * @owner: the module owner containing the ops
37 */
38struct pci_epc_ops {
Cyrille Pitchen44947382018-01-30 21:56:56 +010039 int (*write_header)(struct pci_epc *epc, u8 func_no,
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053040 struct pci_epf_header *hdr);
Cyrille Pitchen44947382018-01-30 21:56:56 +010041 int (*set_bar)(struct pci_epc *epc, u8 func_no,
Niklas Casselbc4a4892018-03-28 13:50:07 +020042 struct pci_epf_bar *epf_bar);
Cyrille Pitchen44947382018-01-30 21:56:56 +010043 void (*clear_bar)(struct pci_epc *epc, u8 func_no,
Niklas Cassel77d08db2018-03-28 13:50:14 +020044 struct pci_epf_bar *epf_bar);
Cyrille Pitchen44947382018-01-30 21:56:56 +010045 int (*map_addr)(struct pci_epc *epc, u8 func_no,
46 phys_addr_t addr, u64 pci_addr, size_t size);
47 void (*unmap_addr)(struct pci_epc *epc, u8 func_no,
48 phys_addr_t addr);
49 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
50 int (*get_msi)(struct pci_epc *epc, u8 func_no);
51 int (*raise_irq)(struct pci_epc *epc, u8 func_no,
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053052 enum pci_epc_irq_type type, u8 interrupt_num);
53 int (*start)(struct pci_epc *epc);
54 void (*stop)(struct pci_epc *epc);
55 struct module *owner;
56};
57
58/**
59 * struct pci_epc_mem - address space of the endpoint controller
60 * @phys_base: physical base address of the PCI address space
61 * @size: the size of the PCI address space
62 * @bitmap: bitmap to manage the PCI address space
63 * @pages: number of bits representing the address region
Kishon Vijay Abraham I52c92852017-08-18 20:27:56 +053064 * @page_size: size of each page
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053065 */
66struct pci_epc_mem {
67 phys_addr_t phys_base;
68 size_t size;
69 unsigned long *bitmap;
Kishon Vijay Abraham I52c92852017-08-18 20:27:56 +053070 size_t page_size;
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053071 int pages;
72};
73
74/**
75 * struct pci_epc - represents the PCI EPC device
76 * @dev: PCI EPC device
77 * @pci_epf: list of endpoint functions present in this EPC device
78 * @ops: function pointers for performing endpoint operations
79 * @mem: address space of the endpoint controller
80 * @max_functions: max number of functions that can be configured in this EPC
Kishon Vijay Abraham I3a401a22017-03-27 15:15:01 +053081 * @group: configfs group representing the PCI EPC device
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053082 * @lock: spinlock to protect pci_epc ops
83 */
84struct pci_epc {
85 struct device dev;
86 struct list_head pci_epf;
87 const struct pci_epc_ops *ops;
88 struct pci_epc_mem *mem;
89 u8 max_functions;
Kishon Vijay Abraham I3a401a22017-03-27 15:15:01 +053090 struct config_group *group;
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +053091 /* spinlock to protect against concurrent access of EP controller */
92 spinlock_t lock;
93};
94
95#define to_pci_epc(device) container_of((device), struct pci_epc, dev)
96
97#define pci_epc_create(dev, ops) \
98 __pci_epc_create((dev), (ops), THIS_MODULE)
99#define devm_pci_epc_create(dev, ops) \
100 __devm_pci_epc_create((dev), (ops), THIS_MODULE)
101
Kishon Vijay Abraham I52c92852017-08-18 20:27:56 +0530102#define pci_epc_mem_init(epc, phys_addr, size) \
103 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
104
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +0530105static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
106{
107 dev_set_drvdata(&epc->dev, data);
108}
109
110static inline void *epc_get_drvdata(struct pci_epc *epc)
111{
112 return dev_get_drvdata(&epc->dev);
113}
114
115struct pci_epc *
116__devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
117 struct module *owner);
118struct pci_epc *
119__pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
120 struct module *owner);
121void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
122void pci_epc_destroy(struct pci_epc *epc);
123int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
124void pci_epc_linkup(struct pci_epc *epc);
125void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
Cyrille Pitchen44947382018-01-30 21:56:56 +0100126int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
127 struct pci_epf_header *hdr);
128int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
Niklas Casselbc4a4892018-03-28 13:50:07 +0200129 struct pci_epf_bar *epf_bar);
Niklas Cassel77d08db2018-03-28 13:50:14 +0200130void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
131 struct pci_epf_bar *epf_bar);
Cyrille Pitchen44947382018-01-30 21:56:56 +0100132int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
133 phys_addr_t phys_addr,
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +0530134 u64 pci_addr, size_t size);
Cyrille Pitchen44947382018-01-30 21:56:56 +0100135void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
136 phys_addr_t phys_addr);
137int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
138int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
139int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
140 enum pci_epc_irq_type type, u8 interrupt_num);
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +0530141int pci_epc_start(struct pci_epc *epc);
142void pci_epc_stop(struct pci_epc *epc);
143struct pci_epc *pci_epc_get(const char *epc_name);
144void pci_epc_put(struct pci_epc *epc);
145
Kishon Vijay Abraham I52c92852017-08-18 20:27:56 +0530146int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
147 size_t page_size);
Kishon Vijay Abraham I5e8cb402017-04-10 19:25:10 +0530148void pci_epc_mem_exit(struct pci_epc *epc);
149void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
150 phys_addr_t *phys_addr, size_t size);
151void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
152 void __iomem *virt_addr, size_t size);
153#endif /* __LINUX_PCI_EPC_H */