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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300298
Matan Barakb4ff3a32016-02-09 14:57:42 +0200299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300};
301
302struct mlx5_ifc_flow_table_prop_layout_bits {
303 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000304 u8 reserved_at_1[0x1];
305 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200306 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200307 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200308 u8 identified_miss_table_mode[0x1];
309 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300310 u8 encap[0x1];
311 u8 decap[0x1];
312 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300313
Matan Barakb4ff3a32016-02-09 14:57:42 +0200314 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200316 u8 log_max_modify_header_context[0x8];
317 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300318 u8 max_ft_level[0x8];
319
Matan Barakb4ff3a32016-02-09 14:57:42 +0200320 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200323 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300324
Matan Barakb4ff3a32016-02-09 14:57:42 +0200325 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200326 u8 log_max_destination[0x8];
327
Matan Barakb4ff3a32016-02-09 14:57:42 +0200328 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329 u8 log_max_flow[0x8];
330
Matan Barakb4ff3a32016-02-09 14:57:42 +0200331 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332
333 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
334
335 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
336};
337
338struct mlx5_ifc_odp_per_transport_service_cap_bits {
339 u8 send[0x1];
340 u8 receive[0x1];
341 u8 write[0x1];
342 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200343 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300344 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200345 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300346};
347
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200348struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200349 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200350
351 u8 ipv4[0x20];
352};
353
354struct mlx5_ifc_ipv6_layout_bits {
355 u8 ipv6[16][0x8];
356};
357
358union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
359 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
360 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200361 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200362};
363
Saeed Mahameede2816822015-05-28 22:28:40 +0300364struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
365 u8 smac_47_16[0x20];
366
367 u8 smac_15_0[0x10];
368 u8 ethertype[0x10];
369
370 u8 dmac_47_16[0x20];
371
372 u8 dmac_15_0[0x10];
373 u8 first_prio[0x3];
374 u8 first_cfi[0x1];
375 u8 first_vid[0xc];
376
377 u8 ip_protocol[0x8];
378 u8 ip_dscp[0x6];
379 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300380 u8 cvlan_tag[0x1];
381 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300382 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300383 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384 u8 tcp_flags[0x9];
385
386 u8 tcp_sport[0x10];
387 u8 tcp_dport[0x10];
388
Or Gerlitza8ade552017-06-07 17:49:56 +0300389 u8 reserved_at_c0[0x18];
390 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300391
392 u8 udp_sport[0x10];
393 u8 udp_dport[0x10];
394
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200395 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200397 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300398};
399
400struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300401 u8 reserved_at_0[0x8];
402 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300403
Matan Barakb4ff3a32016-02-09 14:57:42 +0200404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300405 u8 source_port[0x10];
406
407 u8 outer_second_prio[0x3];
408 u8 outer_second_cfi[0x1];
409 u8 outer_second_vid[0xc];
410 u8 inner_second_prio[0x3];
411 u8 inner_second_cfi[0x1];
412 u8 inner_second_vid[0xc];
413
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300414 u8 outer_second_cvlan_tag[0x1];
415 u8 inner_second_cvlan_tag[0x1];
416 u8 outer_second_svlan_tag[0x1];
417 u8 inner_second_svlan_tag[0x1];
418 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300419 u8 gre_protocol[0x10];
420
421 u8 gre_key_h[0x18];
422 u8 gre_key_l[0x8];
423
424 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200425 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430 u8 outer_ipv6_flow_label[0x14];
431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 inner_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436};
437
438struct mlx5_ifc_cmd_pas_bits {
439 u8 pa_h[0x20];
440
441 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200442 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300443};
444
445struct mlx5_ifc_uint64_bits {
446 u8 hi[0x20];
447
448 u8 lo[0x20];
449};
450
451enum {
452 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
453 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
454 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
455 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
456 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
457 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
458 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
459 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
460 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
461 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
462};
463
464struct mlx5_ifc_ads_bits {
465 u8 fl[0x1];
466 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200467 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300468 u8 pkey_index[0x10];
469
Matan Barakb4ff3a32016-02-09 14:57:42 +0200470 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300471 u8 grh[0x1];
472 u8 mlid[0x7];
473 u8 rlid[0x10];
474
475 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 stat_rate[0x4];
480 u8 hop_limit[0x8];
481
Matan Barakb4ff3a32016-02-09 14:57:42 +0200482 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300483 u8 tclass[0x8];
484 u8 flow_label[0x14];
485
486 u8 rgid_rip[16][0x8];
487
Matan Barakb4ff3a32016-02-09 14:57:42 +0200488 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300489 u8 f_dscp[0x1];
490 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 f_eth_prio[0x1];
493 u8 ecn[0x2];
494 u8 dscp[0x6];
495 u8 udp_sport[0x10];
496
497 u8 dei_cfi[0x1];
498 u8 eth_prio[0x3];
499 u8 sl[0x4];
500 u8 port[0x8];
501 u8 rmac_47_32[0x10];
502
503 u8 rmac_31_0[0x20];
504};
505
506struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200507 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300508 u8 nic_rx_multi_path_tirs_fts[0x1];
509 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
510 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300511
512 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
513
Matan Barakb4ff3a32016-02-09 14:57:42 +0200514 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515
516 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
517
518 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
519
Matan Barakb4ff3a32016-02-09 14:57:42 +0200520 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
523
Matan Barakb4ff3a32016-02-09 14:57:42 +0200524 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300525};
526
Saeed Mahameed495716b2015-12-01 18:03:19 +0200527struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200528 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200529
530 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
531
532 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
533
534 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
535
Matan Barakb4ff3a32016-02-09 14:57:42 +0200536 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200537};
538
Saeed Mahameedd6666752015-12-01 18:03:22 +0200539struct mlx5_ifc_e_switch_cap_bits {
540 u8 vport_svlan_strip[0x1];
541 u8 vport_cvlan_strip[0x1];
542 u8 vport_svlan_insert[0x1];
543 u8 vport_cvlan_insert_if_not_exist[0x1];
544 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300545 u8 reserved_at_5[0x19];
546 u8 nic_vport_node_guid_modify[0x1];
547 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300549 u8 vxlan_encap_decap[0x1];
550 u8 nvgre_encap_decap[0x1];
551 u8 reserved_at_22[0x9];
552 u8 log_max_encap_headers[0x5];
553 u8 reserved_2b[0x6];
554 u8 max_encap_header_size[0xa];
555
556 u8 reserved_40[0x7c0];
557
Saeed Mahameedd6666752015-12-01 18:03:22 +0200558};
559
Saeed Mahameed74862162016-06-09 15:11:34 +0300560struct mlx5_ifc_qos_cap_bits {
561 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200563 u8 esw_bw_share[0x1];
564 u8 esw_rate_limit[0x1];
565 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300566
567 u8 reserved_at_20[0x20];
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300570
Saeed Mahameed74862162016-06-09 15:11:34 +0300571 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300572
573 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
576 u8 esw_element_type[0x10];
577 u8 esw_tsar_type[0x10];
578
579 u8 reserved_at_c0[0x10];
580 u8 max_qos_para_vport[0x10];
581
582 u8 max_tsar_bw_share[0x20];
583
584 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300585};
586
Saeed Mahameede2816822015-05-28 22:28:40 +0300587struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
588 u8 csum_cap[0x1];
589 u8 vlan_cap[0x1];
590 u8 lro_cap[0x1];
591 u8 lro_psh_flag[0x1];
592 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200593 u8 reserved_at_5[0x2];
594 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200595 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200596 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300597 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200598 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300599 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300600 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300601 u8 reg_umr_sq[0x1];
602 u8 scatter_fcs[0x1];
603 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300604 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200605 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300606 u8 tunnel_statless_gre[0x1];
607 u8 tunnel_stateless_vxlan[0x1];
608
Ilan Tayari547eede2017-04-18 16:04:28 +0300609 u8 swp[0x1];
610 u8 swp_csum[0x1];
611 u8 swp_lso[0x1];
612 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300613
Matan Barakb4ff3a32016-02-09 14:57:42 +0200614 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300615 u8 lro_min_mss_size[0x10];
616
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618
619 u8 lro_timer_supported_periods[4][0x20];
620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622};
623
624struct mlx5_ifc_roce_cap_bits {
625 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200626 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629
Matan Barakb4ff3a32016-02-09 14:57:42 +0200630 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300631 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633 u8 roce_version[0x8];
634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 r_roce_dest_udp_port[0x10];
637
638 u8 r_roce_max_src_udp_port[0x10];
639 u8 r_roce_min_src_udp_port[0x10];
640
Matan Barakb4ff3a32016-02-09 14:57:42 +0200641 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300642 u8 roce_address_table_size[0x10];
643
Matan Barakb4ff3a32016-02-09 14:57:42 +0200644 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645};
646
647enum {
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
657};
658
659enum {
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
669};
670
671struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300673
Or Gerlitzbd108382017-05-28 15:24:17 +0300674 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300676 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679
Matan Barakb4ff3a32016-02-09 14:57:42 +0200680 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300681
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200683 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200686 u8 atomic_size_qp[0x10];
687
Matan Barakb4ff3a32016-02-09 14:57:42 +0200688 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689 u8 atomic_size_dc[0x10];
690
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692};
693
694struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696
697 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300701
702 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
703
704 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
705
706 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
707
Matan Barakb4ff3a32016-02-09 14:57:42 +0200708 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709};
710
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200711struct mlx5_ifc_calc_op {
712 u8 reserved_at_0[0x10];
713 u8 reserved_at_10[0x9];
714 u8 op_swap_endianness[0x1];
715 u8 op_min[0x1];
716 u8 op_xor[0x1];
717 u8 op_or[0x1];
718 u8 op_and[0x1];
719 u8 op_max[0x1];
720 u8 op_add[0x1];
721};
722
723struct mlx5_ifc_vector_calc_cap_bits {
724 u8 calc_matrix[0x1];
725 u8 reserved_at_1[0x1f];
726 u8 reserved_at_20[0x8];
727 u8 max_vec_count[0x8];
728 u8 reserved_at_30[0xd];
729 u8 max_chunk_size[0x3];
730 struct mlx5_ifc_calc_op calc0;
731 struct mlx5_ifc_calc_op calc1;
732 struct mlx5_ifc_calc_op calc2;
733 struct mlx5_ifc_calc_op calc3;
734
735 u8 reserved_at_e0[0x720];
736};
737
Saeed Mahameede2816822015-05-28 22:28:40 +0300738enum {
739 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
740 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300741 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300742};
743
744enum {
745 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
746 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
747};
748
749enum {
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
754 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
764};
765
766enum {
767 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
768 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
769};
770
771enum {
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
774 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
775};
776
777enum {
778 MLX5_CAP_PORT_TYPE_IB = 0x0,
779 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300780};
781
Max Gurtovoy1410a902017-05-28 10:53:10 +0300782enum {
783 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
784 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
785 MLX5_CAP_UMR_FENCE_NONE = 0x2,
786};
787
Eli Cohenb7755162014-10-02 12:19:44 +0300788struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200789 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300790
791 u8 log_max_srq_sz[0x8];
792 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300794 u8 log_max_qp[0x5];
795
Matan Barakb4ff3a32016-02-09 14:57:42 +0200796 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300797 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300799
Matan Barakb4ff3a32016-02-09 14:57:42 +0200800 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300801 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300803 u8 log_max_cq[0x5];
804
805 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300807 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_eq[0x4];
810
811 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200812 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200814 u8 force_teardown[0x1];
815 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300816 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200817 u8 umr_extended_translation_offset[0x1];
818 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300819 u8 log_max_klm_list_size[0x6];
820
Matan Barakb4ff3a32016-02-09 14:57:42 +0200821 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300822 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200823 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_ra_res_dc[0x6];
825
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200828 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300829 u8 log_max_ra_res_qp[0x6];
830
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200831 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 cc_query_allowed[0x1];
833 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200834 u8 start_pad[0x1];
835 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300836 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300837 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300838
Saeed Mahameede2816822015-05-28 22:28:40 +0300839 u8 out_of_seq_cnt[0x1];
840 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300841 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300842 u8 reserved_at_183[0x1];
843 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300844 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 max_qp_cnt[0xa];
846 u8 pkey_table_size[0x10];
847
Saeed Mahameede2816822015-05-28 22:28:40 +0300848 u8 vport_group_manager[0x1];
849 u8 vhca_group_manager[0x1];
850 u8 ib_virt[0x1];
851 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200852 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300853 u8 ets[0x1];
854 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200855 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300856 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200857 u8 mcam_reg[0x1];
858 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300859 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200860 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200861 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300862 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200863 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300864 u8 disable_link_up[0x1];
865 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300866 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300867 u8 num_ports[0x8];
868
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300869 u8 reserved_at_1c0[0x1];
870 u8 pps[0x1];
871 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300873 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200874 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300875 u8 reserved_at_1d0[0x1];
876 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200877 u8 reserved_at_1d2[0x3];
878 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200879 u8 rol_s[0x1];
880 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300881 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200882 u8 wol_s[0x1];
883 u8 wol_g[0x1];
884 u8 wol_a[0x1];
885 u8 wol_b[0x1];
886 u8 wol_m[0x1];
887 u8 wol_u[0x1];
888 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300889
890 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300891 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300892 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300893
Saeed Mahameede2816822015-05-28 22:28:40 +0300894 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300895 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300896 u8 reserved_at_202[0x1];
897 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200898 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300899 u8 reserved_at_205[0x5];
900 u8 umr_fence[0x2];
901 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300902 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300903 u8 cmdif_checksum[0x2];
904 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300905 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300906 u8 wq_signature[0x1];
907 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300908 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300909 u8 sho[0x1];
910 u8 tph[0x1];
911 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300913 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300914 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300915 u8 roce[0x1];
916 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300917 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300918
919 u8 cq_oi[0x1];
920 u8 cq_resize[0x1];
921 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300924 u8 pg[0x1];
925 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300926 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300927 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300928 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300929 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300930 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300931 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200932 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300933 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200934 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 qkv[0x1];
937 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200938 u8 set_deth_sqpn[0x1];
939 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300940 u8 xrc[0x1];
941 u8 ud[0x1];
942 u8 uc[0x1];
943 u8 rc[0x1];
944
Eli Cohena6d51b62017-01-03 23:55:23 +0200945 u8 uar_4k[0x1];
946 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300947 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300949 u8 log_pg_sz[0x8];
950
951 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200952 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300953 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300954 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300956
957 u8 reserved_at_270[0xb];
958 u8 lag_master[0x1];
959 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300960
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 max_wqe_sz_sq[0x10];
963
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 max_wqe_sz_rq[0x10];
966
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 max_wqe_sz_sq_dc[0x10];
969
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 max_qp_mcg[0x19];
972
Tariq Toukane1c9c622016-04-11 23:10:21 +0300973 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 log_max_mcg[0x8];
975
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300977 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 log_max_xrcd[0x5];
982
Amir Vadaia351a1b02016-07-14 10:32:38 +0300983 u8 reserved_at_340[0x8];
984 u8 log_max_flow_counter_bulk[0x8];
985 u8 max_flow_counter[0x10];
986
Eli Cohenb7755162014-10-02 12:19:44 +0300987
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300993 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300995 u8 log_max_tis[0x5];
996
Saeed Mahameede2816822015-05-28 22:28:40 +0300997 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300999 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001001 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001003 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_tis_per_sq[0x5];
1006
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001010 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001012 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001014 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001015
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001017 u8 log_max_wq_sz[0x5];
1018
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001019 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001020 u8 disable_local_lb[0x1];
1021 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001022 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001026 u8 log_max_current_uc_list[0x5];
1027
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001031 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001033 u8 log_uar_page_sz[0x10];
1034
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001036 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001037 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038
Eli Cohena6d51b62017-01-03 23:55:23 +02001039 u8 reserved_at_500[0x20];
1040 u8 num_of_uars_per_page[0x20];
1041 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042
1043 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001044 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001045
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001046 u8 cqe_compression_timeout[0x10];
1047 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001048
Saeed Mahameed74862162016-06-09 15:11:34 +03001049 u8 reserved_at_5e0[0x10];
1050 u8 tag_matching[0x1];
1051 u8 rndv_offload_rc[0x1];
1052 u8 rndv_offload_dc[0x1];
1053 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001054 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001055 u8 log_max_xrq[0x5];
1056
Max Gurtovoy7b135582017-01-02 11:37:38 +02001057 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001058};
1059
Saeed Mahameed81848732015-12-01 18:03:20 +02001060enum mlx5_flow_destination_type {
1061 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1062 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1063 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001064
1065 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001066};
1067
1068struct mlx5_ifc_dest_format_struct_bits {
1069 u8 destination_type[0x8];
1070 u8 destination_id[0x18];
1071
Matan Barakb4ff3a32016-02-09 14:57:42 +02001072 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001073};
1074
Amir Vadai9dc0b282016-05-13 12:55:39 +00001075struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001076 u8 clear[0x1];
1077 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001078 u8 flow_counter_id[0x10];
1079
1080 u8 reserved_at_20[0x20];
1081};
1082
1083union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1084 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1085 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1086 u8 reserved_at_0[0x40];
1087};
1088
Saeed Mahameede2816822015-05-28 22:28:40 +03001089struct mlx5_ifc_fte_match_param_bits {
1090 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1091
1092 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1093
1094 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1095
Matan Barakb4ff3a32016-02-09 14:57:42 +02001096 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001097};
1098
1099enum {
1100 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1101 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1102 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1103 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1104 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1105};
1106
1107struct mlx5_ifc_rx_hash_field_select_bits {
1108 u8 l3_prot_type[0x1];
1109 u8 l4_prot_type[0x1];
1110 u8 selected_fields[0x1e];
1111};
1112
1113enum {
1114 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1115 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1116};
1117
1118enum {
1119 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1120 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1121};
1122
1123struct mlx5_ifc_wq_bits {
1124 u8 wq_type[0x4];
1125 u8 wq_signature[0x1];
1126 u8 end_padding_mode[0x2];
1127 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001128 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001129
1130 u8 hds_skip_first_sge[0x1];
1131 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001132 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001133 u8 page_offset[0x5];
1134 u8 lwm[0x10];
1135
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 pd[0x18];
1138
Matan Barakb4ff3a32016-02-09 14:57:42 +02001139 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001140 u8 uar_page[0x18];
1141
1142 u8 dbr_addr[0x40];
1143
1144 u8 hw_counter[0x20];
1145
1146 u8 sw_counter[0x20];
1147
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001150 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001151 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001152 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001153 u8 log_wq_sz[0x5];
1154
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001155 u8 reserved_at_120[0x15];
1156 u8 log_wqe_num_of_strides[0x3];
1157 u8 two_byte_shift_en[0x1];
1158 u8 reserved_at_139[0x4];
1159 u8 log_wqe_stride_size[0x3];
1160
1161 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162
1163 struct mlx5_ifc_cmd_pas_bits pas[0];
1164};
1165
1166struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001167 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001168 u8 rq_num[0x18];
1169};
1170
1171struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 mac_addr_47_32[0x10];
1174
1175 u8 mac_addr_31_0[0x20];
1176};
1177
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001178struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001179 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001180 u8 vlan[0x0c];
1181
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001183};
1184
Saeed Mahameede2816822015-05-28 22:28:40 +03001185struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001186 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001187
1188 u8 min_time_between_cnps[0x20];
1189
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001192 u8 reserved_at_d8[0x4];
1193 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001194 u8 cnp_802p_prio[0x3];
1195
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197};
1198
1199struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001204 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001206 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001207
Matan Barakb4ff3a32016-02-09 14:57:42 +02001208 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001209
1210 u8 rpg_time_reset[0x20];
1211
1212 u8 rpg_byte_reset[0x20];
1213
1214 u8 rpg_threshold[0x20];
1215
1216 u8 rpg_max_rate[0x20];
1217
1218 u8 rpg_ai_rate[0x20];
1219
1220 u8 rpg_hai_rate[0x20];
1221
1222 u8 rpg_gd[0x20];
1223
1224 u8 rpg_min_dec_fac[0x20];
1225
1226 u8 rpg_min_rate[0x20];
1227
Matan Barakb4ff3a32016-02-09 14:57:42 +02001228 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001229
1230 u8 rate_to_set_on_first_cnp[0x20];
1231
1232 u8 dce_tcp_g[0x20];
1233
1234 u8 dce_tcp_rtt[0x20];
1235
1236 u8 rate_reduce_monitor_period[0x20];
1237
Matan Barakb4ff3a32016-02-09 14:57:42 +02001238 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001239
1240 u8 initial_alpha_value[0x20];
1241
Matan Barakb4ff3a32016-02-09 14:57:42 +02001242 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001243};
1244
1245struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001246 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001247
1248 u8 rppp_max_rps[0x20];
1249
1250 u8 rpg_time_reset[0x20];
1251
1252 u8 rpg_byte_reset[0x20];
1253
1254 u8 rpg_threshold[0x20];
1255
1256 u8 rpg_max_rate[0x20];
1257
1258 u8 rpg_ai_rate[0x20];
1259
1260 u8 rpg_hai_rate[0x20];
1261
1262 u8 rpg_gd[0x20];
1263
1264 u8 rpg_min_dec_fac[0x20];
1265
1266 u8 rpg_min_rate[0x20];
1267
Matan Barakb4ff3a32016-02-09 14:57:42 +02001268 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001269};
1270
1271enum {
1272 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1273 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1274 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1275};
1276
1277struct mlx5_ifc_resize_field_select_bits {
1278 u8 resize_field_select[0x20];
1279};
1280
1281enum {
1282 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1283 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1284 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1285 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1286};
1287
1288struct mlx5_ifc_modify_field_select_bits {
1289 u8 modify_field_select[0x20];
1290};
1291
1292struct mlx5_ifc_field_select_r_roce_np_bits {
1293 u8 field_select_r_roce_np[0x20];
1294};
1295
1296struct mlx5_ifc_field_select_r_roce_rp_bits {
1297 u8 field_select_r_roce_rp[0x20];
1298};
1299
1300enum {
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1311};
1312
1313struct mlx5_ifc_field_select_802_1qau_rp_bits {
1314 u8 field_select_8021qaurp[0x20];
1315};
1316
1317struct mlx5_ifc_phys_layer_cntrs_bits {
1318 u8 time_since_last_clear_high[0x20];
1319
1320 u8 time_since_last_clear_low[0x20];
1321
1322 u8 symbol_errors_high[0x20];
1323
1324 u8 symbol_errors_low[0x20];
1325
1326 u8 sync_headers_errors_high[0x20];
1327
1328 u8 sync_headers_errors_low[0x20];
1329
1330 u8 edpl_bip_errors_lane0_high[0x20];
1331
1332 u8 edpl_bip_errors_lane0_low[0x20];
1333
1334 u8 edpl_bip_errors_lane1_high[0x20];
1335
1336 u8 edpl_bip_errors_lane1_low[0x20];
1337
1338 u8 edpl_bip_errors_lane2_high[0x20];
1339
1340 u8 edpl_bip_errors_lane2_low[0x20];
1341
1342 u8 edpl_bip_errors_lane3_high[0x20];
1343
1344 u8 edpl_bip_errors_lane3_low[0x20];
1345
1346 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1347
1348 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1349
1350 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1351
1352 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1353
1354 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1355
1356 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1357
1358 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1359
1360 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1361
1362 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1363
1364 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1365
1366 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1367
1368 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1369
1370 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1371
1372 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1373
1374 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1375
1376 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1377
1378 u8 rs_fec_corrected_blocks_high[0x20];
1379
1380 u8 rs_fec_corrected_blocks_low[0x20];
1381
1382 u8 rs_fec_uncorrectable_blocks_high[0x20];
1383
1384 u8 rs_fec_uncorrectable_blocks_low[0x20];
1385
1386 u8 rs_fec_no_errors_blocks_high[0x20];
1387
1388 u8 rs_fec_no_errors_blocks_low[0x20];
1389
1390 u8 rs_fec_single_error_blocks_high[0x20];
1391
1392 u8 rs_fec_single_error_blocks_low[0x20];
1393
1394 u8 rs_fec_corrected_symbols_total_high[0x20];
1395
1396 u8 rs_fec_corrected_symbols_total_low[0x20];
1397
1398 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1399
1400 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1401
1402 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1403
1404 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1405
1406 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1407
1408 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1409
1410 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1411
1412 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1413
1414 u8 link_down_events[0x20];
1415
1416 u8 successful_recovery_events[0x20];
1417
Matan Barakb4ff3a32016-02-09 14:57:42 +02001418 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001419};
1420
Gal Pressmand8dc0502016-09-27 17:04:51 +03001421struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1422 u8 time_since_last_clear_high[0x20];
1423
1424 u8 time_since_last_clear_low[0x20];
1425
1426 u8 phy_received_bits_high[0x20];
1427
1428 u8 phy_received_bits_low[0x20];
1429
1430 u8 phy_symbol_errors_high[0x20];
1431
1432 u8 phy_symbol_errors_low[0x20];
1433
1434 u8 phy_corrected_bits_high[0x20];
1435
1436 u8 phy_corrected_bits_low[0x20];
1437
1438 u8 phy_corrected_bits_lane0_high[0x20];
1439
1440 u8 phy_corrected_bits_lane0_low[0x20];
1441
1442 u8 phy_corrected_bits_lane1_high[0x20];
1443
1444 u8 phy_corrected_bits_lane1_low[0x20];
1445
1446 u8 phy_corrected_bits_lane2_high[0x20];
1447
1448 u8 phy_corrected_bits_lane2_low[0x20];
1449
1450 u8 phy_corrected_bits_lane3_high[0x20];
1451
1452 u8 phy_corrected_bits_lane3_low[0x20];
1453
1454 u8 reserved_at_200[0x5c0];
1455};
1456
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001457struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1458 u8 symbol_error_counter[0x10];
1459
1460 u8 link_error_recovery_counter[0x8];
1461
1462 u8 link_downed_counter[0x8];
1463
1464 u8 port_rcv_errors[0x10];
1465
1466 u8 port_rcv_remote_physical_errors[0x10];
1467
1468 u8 port_rcv_switch_relay_errors[0x10];
1469
1470 u8 port_xmit_discards[0x10];
1471
1472 u8 port_xmit_constraint_errors[0x8];
1473
1474 u8 port_rcv_constraint_errors[0x8];
1475
1476 u8 reserved_at_70[0x8];
1477
1478 u8 link_overrun_errors[0x8];
1479
1480 u8 reserved_at_80[0x10];
1481
1482 u8 vl_15_dropped[0x10];
1483
Tim Wright133bea02017-05-01 17:30:08 +01001484 u8 reserved_at_a0[0x80];
1485
1486 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001487};
1488
Saeed Mahameede2816822015-05-28 22:28:40 +03001489struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1490 u8 transmit_queue_high[0x20];
1491
1492 u8 transmit_queue_low[0x20];
1493
Matan Barakb4ff3a32016-02-09 14:57:42 +02001494 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001495};
1496
1497struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1498 u8 rx_octets_high[0x20];
1499
1500 u8 rx_octets_low[0x20];
1501
Matan Barakb4ff3a32016-02-09 14:57:42 +02001502 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001503
1504 u8 rx_frames_high[0x20];
1505
1506 u8 rx_frames_low[0x20];
1507
1508 u8 tx_octets_high[0x20];
1509
1510 u8 tx_octets_low[0x20];
1511
Matan Barakb4ff3a32016-02-09 14:57:42 +02001512 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001513
1514 u8 tx_frames_high[0x20];
1515
1516 u8 tx_frames_low[0x20];
1517
1518 u8 rx_pause_high[0x20];
1519
1520 u8 rx_pause_low[0x20];
1521
1522 u8 rx_pause_duration_high[0x20];
1523
1524 u8 rx_pause_duration_low[0x20];
1525
1526 u8 tx_pause_high[0x20];
1527
1528 u8 tx_pause_low[0x20];
1529
1530 u8 tx_pause_duration_high[0x20];
1531
1532 u8 tx_pause_duration_low[0x20];
1533
1534 u8 rx_pause_transition_high[0x20];
1535
1536 u8 rx_pause_transition_low[0x20];
1537
Matan Barakb4ff3a32016-02-09 14:57:42 +02001538 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001539};
1540
1541struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1542 u8 port_transmit_wait_high[0x20];
1543
1544 u8 port_transmit_wait_low[0x20];
1545
Matan Barakb4ff3a32016-02-09 14:57:42 +02001546 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001547};
1548
1549struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1550 u8 dot3stats_alignment_errors_high[0x20];
1551
1552 u8 dot3stats_alignment_errors_low[0x20];
1553
1554 u8 dot3stats_fcs_errors_high[0x20];
1555
1556 u8 dot3stats_fcs_errors_low[0x20];
1557
1558 u8 dot3stats_single_collision_frames_high[0x20];
1559
1560 u8 dot3stats_single_collision_frames_low[0x20];
1561
1562 u8 dot3stats_multiple_collision_frames_high[0x20];
1563
1564 u8 dot3stats_multiple_collision_frames_low[0x20];
1565
1566 u8 dot3stats_sqe_test_errors_high[0x20];
1567
1568 u8 dot3stats_sqe_test_errors_low[0x20];
1569
1570 u8 dot3stats_deferred_transmissions_high[0x20];
1571
1572 u8 dot3stats_deferred_transmissions_low[0x20];
1573
1574 u8 dot3stats_late_collisions_high[0x20];
1575
1576 u8 dot3stats_late_collisions_low[0x20];
1577
1578 u8 dot3stats_excessive_collisions_high[0x20];
1579
1580 u8 dot3stats_excessive_collisions_low[0x20];
1581
1582 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1583
1584 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1585
1586 u8 dot3stats_carrier_sense_errors_high[0x20];
1587
1588 u8 dot3stats_carrier_sense_errors_low[0x20];
1589
1590 u8 dot3stats_frame_too_longs_high[0x20];
1591
1592 u8 dot3stats_frame_too_longs_low[0x20];
1593
1594 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1595
1596 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1597
1598 u8 dot3stats_symbol_errors_high[0x20];
1599
1600 u8 dot3stats_symbol_errors_low[0x20];
1601
1602 u8 dot3control_in_unknown_opcodes_high[0x20];
1603
1604 u8 dot3control_in_unknown_opcodes_low[0x20];
1605
1606 u8 dot3in_pause_frames_high[0x20];
1607
1608 u8 dot3in_pause_frames_low[0x20];
1609
1610 u8 dot3out_pause_frames_high[0x20];
1611
1612 u8 dot3out_pause_frames_low[0x20];
1613
Matan Barakb4ff3a32016-02-09 14:57:42 +02001614 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001615};
1616
1617struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1618 u8 ether_stats_drop_events_high[0x20];
1619
1620 u8 ether_stats_drop_events_low[0x20];
1621
1622 u8 ether_stats_octets_high[0x20];
1623
1624 u8 ether_stats_octets_low[0x20];
1625
1626 u8 ether_stats_pkts_high[0x20];
1627
1628 u8 ether_stats_pkts_low[0x20];
1629
1630 u8 ether_stats_broadcast_pkts_high[0x20];
1631
1632 u8 ether_stats_broadcast_pkts_low[0x20];
1633
1634 u8 ether_stats_multicast_pkts_high[0x20];
1635
1636 u8 ether_stats_multicast_pkts_low[0x20];
1637
1638 u8 ether_stats_crc_align_errors_high[0x20];
1639
1640 u8 ether_stats_crc_align_errors_low[0x20];
1641
1642 u8 ether_stats_undersize_pkts_high[0x20];
1643
1644 u8 ether_stats_undersize_pkts_low[0x20];
1645
1646 u8 ether_stats_oversize_pkts_high[0x20];
1647
1648 u8 ether_stats_oversize_pkts_low[0x20];
1649
1650 u8 ether_stats_fragments_high[0x20];
1651
1652 u8 ether_stats_fragments_low[0x20];
1653
1654 u8 ether_stats_jabbers_high[0x20];
1655
1656 u8 ether_stats_jabbers_low[0x20];
1657
1658 u8 ether_stats_collisions_high[0x20];
1659
1660 u8 ether_stats_collisions_low[0x20];
1661
1662 u8 ether_stats_pkts64octets_high[0x20];
1663
1664 u8 ether_stats_pkts64octets_low[0x20];
1665
1666 u8 ether_stats_pkts65to127octets_high[0x20];
1667
1668 u8 ether_stats_pkts65to127octets_low[0x20];
1669
1670 u8 ether_stats_pkts128to255octets_high[0x20];
1671
1672 u8 ether_stats_pkts128to255octets_low[0x20];
1673
1674 u8 ether_stats_pkts256to511octets_high[0x20];
1675
1676 u8 ether_stats_pkts256to511octets_low[0x20];
1677
1678 u8 ether_stats_pkts512to1023octets_high[0x20];
1679
1680 u8 ether_stats_pkts512to1023octets_low[0x20];
1681
1682 u8 ether_stats_pkts1024to1518octets_high[0x20];
1683
1684 u8 ether_stats_pkts1024to1518octets_low[0x20];
1685
1686 u8 ether_stats_pkts1519to2047octets_high[0x20];
1687
1688 u8 ether_stats_pkts1519to2047octets_low[0x20];
1689
1690 u8 ether_stats_pkts2048to4095octets_high[0x20];
1691
1692 u8 ether_stats_pkts2048to4095octets_low[0x20];
1693
1694 u8 ether_stats_pkts4096to8191octets_high[0x20];
1695
1696 u8 ether_stats_pkts4096to8191octets_low[0x20];
1697
1698 u8 ether_stats_pkts8192to10239octets_high[0x20];
1699
1700 u8 ether_stats_pkts8192to10239octets_low[0x20];
1701
Matan Barakb4ff3a32016-02-09 14:57:42 +02001702 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001703};
1704
1705struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1706 u8 if_in_octets_high[0x20];
1707
1708 u8 if_in_octets_low[0x20];
1709
1710 u8 if_in_ucast_pkts_high[0x20];
1711
1712 u8 if_in_ucast_pkts_low[0x20];
1713
1714 u8 if_in_discards_high[0x20];
1715
1716 u8 if_in_discards_low[0x20];
1717
1718 u8 if_in_errors_high[0x20];
1719
1720 u8 if_in_errors_low[0x20];
1721
1722 u8 if_in_unknown_protos_high[0x20];
1723
1724 u8 if_in_unknown_protos_low[0x20];
1725
1726 u8 if_out_octets_high[0x20];
1727
1728 u8 if_out_octets_low[0x20];
1729
1730 u8 if_out_ucast_pkts_high[0x20];
1731
1732 u8 if_out_ucast_pkts_low[0x20];
1733
1734 u8 if_out_discards_high[0x20];
1735
1736 u8 if_out_discards_low[0x20];
1737
1738 u8 if_out_errors_high[0x20];
1739
1740 u8 if_out_errors_low[0x20];
1741
1742 u8 if_in_multicast_pkts_high[0x20];
1743
1744 u8 if_in_multicast_pkts_low[0x20];
1745
1746 u8 if_in_broadcast_pkts_high[0x20];
1747
1748 u8 if_in_broadcast_pkts_low[0x20];
1749
1750 u8 if_out_multicast_pkts_high[0x20];
1751
1752 u8 if_out_multicast_pkts_low[0x20];
1753
1754 u8 if_out_broadcast_pkts_high[0x20];
1755
1756 u8 if_out_broadcast_pkts_low[0x20];
1757
Matan Barakb4ff3a32016-02-09 14:57:42 +02001758 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001759};
1760
1761struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1762 u8 a_frames_transmitted_ok_high[0x20];
1763
1764 u8 a_frames_transmitted_ok_low[0x20];
1765
1766 u8 a_frames_received_ok_high[0x20];
1767
1768 u8 a_frames_received_ok_low[0x20];
1769
1770 u8 a_frame_check_sequence_errors_high[0x20];
1771
1772 u8 a_frame_check_sequence_errors_low[0x20];
1773
1774 u8 a_alignment_errors_high[0x20];
1775
1776 u8 a_alignment_errors_low[0x20];
1777
1778 u8 a_octets_transmitted_ok_high[0x20];
1779
1780 u8 a_octets_transmitted_ok_low[0x20];
1781
1782 u8 a_octets_received_ok_high[0x20];
1783
1784 u8 a_octets_received_ok_low[0x20];
1785
1786 u8 a_multicast_frames_xmitted_ok_high[0x20];
1787
1788 u8 a_multicast_frames_xmitted_ok_low[0x20];
1789
1790 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1791
1792 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1793
1794 u8 a_multicast_frames_received_ok_high[0x20];
1795
1796 u8 a_multicast_frames_received_ok_low[0x20];
1797
1798 u8 a_broadcast_frames_received_ok_high[0x20];
1799
1800 u8 a_broadcast_frames_received_ok_low[0x20];
1801
1802 u8 a_in_range_length_errors_high[0x20];
1803
1804 u8 a_in_range_length_errors_low[0x20];
1805
1806 u8 a_out_of_range_length_field_high[0x20];
1807
1808 u8 a_out_of_range_length_field_low[0x20];
1809
1810 u8 a_frame_too_long_errors_high[0x20];
1811
1812 u8 a_frame_too_long_errors_low[0x20];
1813
1814 u8 a_symbol_error_during_carrier_high[0x20];
1815
1816 u8 a_symbol_error_during_carrier_low[0x20];
1817
1818 u8 a_mac_control_frames_transmitted_high[0x20];
1819
1820 u8 a_mac_control_frames_transmitted_low[0x20];
1821
1822 u8 a_mac_control_frames_received_high[0x20];
1823
1824 u8 a_mac_control_frames_received_low[0x20];
1825
1826 u8 a_unsupported_opcodes_received_high[0x20];
1827
1828 u8 a_unsupported_opcodes_received_low[0x20];
1829
1830 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1831
1832 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1833
1834 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1835
1836 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1837
Matan Barakb4ff3a32016-02-09 14:57:42 +02001838 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001839};
1840
Gal Pressman8ed1a632016-11-17 13:46:01 +02001841struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1842 u8 life_time_counter_high[0x20];
1843
1844 u8 life_time_counter_low[0x20];
1845
1846 u8 rx_errors[0x20];
1847
1848 u8 tx_errors[0x20];
1849
1850 u8 l0_to_recovery_eieos[0x20];
1851
1852 u8 l0_to_recovery_ts[0x20];
1853
1854 u8 l0_to_recovery_framing[0x20];
1855
1856 u8 l0_to_recovery_retrain[0x20];
1857
1858 u8 crc_error_dllp[0x20];
1859
1860 u8 crc_error_tlp[0x20];
1861
1862 u8 reserved_at_140[0x680];
1863};
1864
Saeed Mahameede2816822015-05-28 22:28:40 +03001865struct mlx5_ifc_cmd_inter_comp_event_bits {
1866 u8 command_completion_vector[0x20];
1867
Matan Barakb4ff3a32016-02-09 14:57:42 +02001868 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001869};
1870
1871struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001872 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001873 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001874 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001875 u8 vl[0x4];
1876
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878};
1879
1880struct mlx5_ifc_db_bf_congestion_event_bits {
1881 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001882 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001883 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001884 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001885
Matan Barakb4ff3a32016-02-09 14:57:42 +02001886 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001887};
1888
1889struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001890 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001891
1892 u8 gpio_event_hi[0x20];
1893
1894 u8 gpio_event_lo[0x20];
1895
Matan Barakb4ff3a32016-02-09 14:57:42 +02001896 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001897};
1898
1899struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901
1902 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001903 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001904
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906};
1907
1908struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001909 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001910};
1911
1912enum {
1913 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1914 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1915};
1916
1917struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001918 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001919 u8 cqn[0x18];
1920
Matan Barakb4ff3a32016-02-09 14:57:42 +02001921 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001922
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924 u8 syndrome[0x8];
1925
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927};
1928
1929struct mlx5_ifc_rdma_page_fault_event_bits {
1930 u8 bytes_committed[0x20];
1931
1932 u8 r_key[0x20];
1933
Matan Barakb4ff3a32016-02-09 14:57:42 +02001934 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001935 u8 packet_len[0x10];
1936
1937 u8 rdma_op_len[0x20];
1938
1939 u8 rdma_va[0x40];
1940
Matan Barakb4ff3a32016-02-09 14:57:42 +02001941 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001942 u8 rdma[0x1];
1943 u8 write[0x1];
1944 u8 requestor[0x1];
1945 u8 qp_number[0x18];
1946};
1947
1948struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1949 u8 bytes_committed[0x20];
1950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 wqe_index[0x10];
1953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955 u8 len[0x10];
1956
Matan Barakb4ff3a32016-02-09 14:57:42 +02001957 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001958
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960 u8 rdma[0x1];
1961 u8 write_read[0x1];
1962 u8 requestor[0x1];
1963 u8 qpn[0x18];
1964};
1965
1966struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968
1969 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001970 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001971
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973 u8 qpn_rqn_sqn[0x18];
1974};
1975
1976struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980 u8 dct_number[0x18];
1981};
1982
1983struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987 u8 cq_number[0x18];
1988};
1989
1990enum {
1991 MLX5_QPC_STATE_RST = 0x0,
1992 MLX5_QPC_STATE_INIT = 0x1,
1993 MLX5_QPC_STATE_RTR = 0x2,
1994 MLX5_QPC_STATE_RTS = 0x3,
1995 MLX5_QPC_STATE_SQER = 0x4,
1996 MLX5_QPC_STATE_ERR = 0x6,
1997 MLX5_QPC_STATE_SQD = 0x7,
1998 MLX5_QPC_STATE_SUSPENDED = 0x9,
1999};
2000
2001enum {
2002 MLX5_QPC_ST_RC = 0x0,
2003 MLX5_QPC_ST_UC = 0x1,
2004 MLX5_QPC_ST_UD = 0x2,
2005 MLX5_QPC_ST_XRC = 0x3,
2006 MLX5_QPC_ST_DCI = 0x5,
2007 MLX5_QPC_ST_QP0 = 0x7,
2008 MLX5_QPC_ST_QP1 = 0x8,
2009 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2010 MLX5_QPC_ST_REG_UMR = 0xc,
2011};
2012
2013enum {
2014 MLX5_QPC_PM_STATE_ARMED = 0x0,
2015 MLX5_QPC_PM_STATE_REARM = 0x1,
2016 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2017 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2018};
2019
2020enum {
2021 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2022 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2023};
2024
2025enum {
2026 MLX5_QPC_MTU_256_BYTES = 0x1,
2027 MLX5_QPC_MTU_512_BYTES = 0x2,
2028 MLX5_QPC_MTU_1K_BYTES = 0x3,
2029 MLX5_QPC_MTU_2K_BYTES = 0x4,
2030 MLX5_QPC_MTU_4K_BYTES = 0x5,
2031 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2032};
2033
2034enum {
2035 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2036 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2037 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2038 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2039 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2040 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2041 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2042 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2043};
2044
2045enum {
2046 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2047 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2048 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2049};
2050
2051enum {
2052 MLX5_QPC_CS_RES_DISABLE = 0x0,
2053 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2054 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2055};
2056
2057struct mlx5_ifc_qpc_bits {
2058 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002059 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002061 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002062 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066
2067 u8 wq_signature[0x1];
2068 u8 block_lb_mc[0x1];
2069 u8 atomic_like_write_en[0x1];
2070 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002071 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002072 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 pd[0x18];
2075
2076 u8 mtu[0x3];
2077 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079 u8 log_rq_size[0x4];
2080 u8 log_rq_stride[0x3];
2081 u8 no_sq[0x1];
2082 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002083 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002084 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002085 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002086
2087 u8 counter_set_id[0x8];
2088 u8 uar_page[0x18];
2089
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 user_index[0x18];
2092
Matan Barakb4ff3a32016-02-09 14:57:42 +02002093 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002094 u8 log_page_size[0x5];
2095 u8 remote_qpn[0x18];
2096
2097 struct mlx5_ifc_ads_bits primary_address_path;
2098
2099 struct mlx5_ifc_ads_bits secondary_address_path;
2100
2101 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002104 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002105 u8 retry_count[0x3];
2106 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 u8 fre[0x1];
2109 u8 cur_rnr_retry[0x3];
2110 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002111 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002112
Matan Barakb4ff3a32016-02-09 14:57:42 +02002113 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002114
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116 u8 next_send_psn[0x18];
2117
Matan Barakb4ff3a32016-02-09 14:57:42 +02002118 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002119 u8 cqn_snd[0x18];
2120
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002121 u8 reserved_at_400[0x8];
2122 u8 deth_sqpn[0x18];
2123
2124 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 last_acked_psn[0x18];
2128
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 ssn[0x18];
2131
Matan Barakb4ff3a32016-02-09 14:57:42 +02002132 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002133 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002134 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135 u8 atomic_mode[0x4];
2136 u8 rre[0x1];
2137 u8 rwe[0x1];
2138 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002141 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002142 u8 cd_slave_receive[0x1];
2143 u8 cd_slave_send[0x1];
2144 u8 cd_master[0x1];
2145
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 min_rnr_nak[0x5];
2148 u8 next_rcv_psn[0x18];
2149
Matan Barakb4ff3a32016-02-09 14:57:42 +02002150 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002151 u8 xrcd[0x18];
2152
Matan Barakb4ff3a32016-02-09 14:57:42 +02002153 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002154 u8 cqn_rcv[0x18];
2155
2156 u8 dbr_addr[0x40];
2157
2158 u8 q_key[0x20];
2159
Matan Barakb4ff3a32016-02-09 14:57:42 +02002160 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002162 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 rmsn[0x18];
2166
2167 u8 hw_sq_wqebb_counter[0x10];
2168 u8 sw_sq_wqebb_counter[0x10];
2169
2170 u8 hw_rq_counter[0x20];
2171
2172 u8 sw_rq_counter[0x20];
2173
Matan Barakb4ff3a32016-02-09 14:57:42 +02002174 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175
Matan Barakb4ff3a32016-02-09 14:57:42 +02002176 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177 u8 cgs[0x1];
2178 u8 cs_req[0x8];
2179 u8 cs_res[0x8];
2180
2181 u8 dc_access_key[0x40];
2182
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184};
2185
2186struct mlx5_ifc_roce_addr_layout_bits {
2187 u8 source_l3_address[16][0x8];
2188
Matan Barakb4ff3a32016-02-09 14:57:42 +02002189 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002190 u8 vlan_valid[0x1];
2191 u8 vlan_id[0xc];
2192 u8 source_mac_47_32[0x10];
2193
2194 u8 source_mac_31_0[0x20];
2195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 roce_l3_type[0x4];
2198 u8 roce_version[0x8];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201};
2202
2203union mlx5_ifc_hca_cap_union_bits {
2204 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2205 struct mlx5_ifc_odp_cap_bits odp_cap;
2206 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2207 struct mlx5_ifc_roce_cap_bits roce_cap;
2208 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2209 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002210 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002211 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002212 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002213 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002214 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216};
2217
2218enum {
2219 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2220 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2221 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002222 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002223 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2224 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002225 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002226};
2227
2228struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002229 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002230
2231 u8 group_id[0x20];
2232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 flow_tag[0x18];
2235
Matan Barakb4ff3a32016-02-09 14:57:42 +02002236 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237 u8 action[0x10];
2238
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 destination_list_size[0x18];
2241
Amir Vadai9dc0b282016-05-13 12:55:39 +00002242 u8 reserved_at_a0[0x8];
2243 u8 flow_counter_list_size[0x18];
2244
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002245 u8 encap_id[0x20];
2246
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002247 u8 modify_header_id[0x20];
2248
2249 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250
2251 struct mlx5_ifc_fte_match_param_bits match_value;
2252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254
Amir Vadai9dc0b282016-05-13 12:55:39 +00002255 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256};
2257
2258enum {
2259 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2260 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2261};
2262
2263struct mlx5_ifc_xrc_srqc_bits {
2264 u8 state[0x4];
2265 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
2268 u8 wq_signature[0x1];
2269 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002270 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002271 u8 rlky[0x1];
2272 u8 basic_cyclic_rcv_wqe[0x1];
2273 u8 log_rq_stride[0x3];
2274 u8 xrcd[0x18];
2275
2276 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278 u8 cqn[0x18];
2279
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281
2282 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284 u8 log_page_size[0x6];
2285 u8 user_index[0x18];
2286
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290 u8 pd[0x18];
2291
2292 u8 lwm[0x10];
2293 u8 wqe_cnt[0x10];
2294
Matan Barakb4ff3a32016-02-09 14:57:42 +02002295 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002296
2297 u8 db_record_addr_h[0x20];
2298
2299 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301
Matan Barakb4ff3a32016-02-09 14:57:42 +02002302 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002303};
2304
2305struct mlx5_ifc_traffic_counter_bits {
2306 u8 packets[0x40];
2307
2308 u8 octets[0x40];
2309};
2310
2311struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002312 u8 strict_lag_tx_port_affinity[0x1];
2313 u8 reserved_at_1[0x3];
2314 u8 lag_tx_port_affinity[0x04];
2315
2316 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321
Matan Barakb4ff3a32016-02-09 14:57:42 +02002322 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002323 u8 transport_domain[0x18];
2324
Erez Shitrit500a3d02017-04-13 06:36:51 +03002325 u8 reserved_at_140[0x8];
2326 u8 underlay_qpn[0x18];
2327 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328};
2329
2330enum {
2331 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2332 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2333};
2334
2335enum {
2336 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2337 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2338};
2339
2340enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002341 MLX5_RX_HASH_FN_NONE = 0x0,
2342 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2343 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002344};
2345
2346enum {
2347 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2348 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2349};
2350
2351struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353
2354 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360 u8 lro_timeout_period_usecs[0x10];
2361 u8 lro_enable_mask[0x4];
2362 u8 lro_max_ip_payload_size[0x8];
2363
Matan Barakb4ff3a32016-02-09 14:57:42 +02002364 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 inline_rqn[0x18];
2368
2369 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373 u8 indirect_table[0x18];
2374
2375 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002376 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002377 u8 self_lb_block[0x2];
2378 u8 transport_domain[0x18];
2379
2380 u8 rx_hash_toeplitz_key[10][0x20];
2381
2382 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2383
2384 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2385
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387};
2388
2389enum {
2390 MLX5_SRQC_STATE_GOOD = 0x0,
2391 MLX5_SRQC_STATE_ERROR = 0x1,
2392};
2393
2394struct mlx5_ifc_srqc_bits {
2395 u8 state[0x4];
2396 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398
2399 u8 wq_signature[0x1];
2400 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404 u8 log_rq_stride[0x3];
2405 u8 xrcd[0x18];
2406
2407 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 cqn[0x18];
2410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002415 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002416
Matan Barakb4ff3a32016-02-09 14:57:42 +02002417 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002418
Matan Barakb4ff3a32016-02-09 14:57:42 +02002419 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002420 u8 pd[0x18];
2421
2422 u8 lwm[0x10];
2423 u8 wqe_cnt[0x10];
2424
Matan Barakb4ff3a32016-02-09 14:57:42 +02002425 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002426
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002427 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002428
Matan Barakb4ff3a32016-02-09 14:57:42 +02002429 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002430};
2431
2432enum {
2433 MLX5_SQC_STATE_RST = 0x0,
2434 MLX5_SQC_STATE_RDY = 0x1,
2435 MLX5_SQC_STATE_ERR = 0x3,
2436};
2437
2438struct mlx5_ifc_sqc_bits {
2439 u8 rlky[0x1];
2440 u8 cd_master[0x1];
2441 u8 fre[0x1];
2442 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002443 u8 reserved_at_4[0x1];
2444 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002446 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002447 u8 allow_swp[0x1];
2448 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 user_index[0x18];
2452
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454 u8 cqn[0x18];
2455
Saeed Mahameed74862162016-06-09 15:11:34 +03002456 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457
Saeed Mahameed74862162016-06-09 15:11:34 +03002458 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002460 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002461
Matan Barakb4ff3a32016-02-09 14:57:42 +02002462 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002463
Matan Barakb4ff3a32016-02-09 14:57:42 +02002464 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002465 u8 tis_num_0[0x18];
2466
2467 struct mlx5_ifc_wq_bits wq;
2468};
2469
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002470enum {
2471 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2472 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2473 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2474 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2475};
2476
2477struct mlx5_ifc_scheduling_context_bits {
2478 u8 element_type[0x8];
2479 u8 reserved_at_8[0x18];
2480
2481 u8 element_attributes[0x20];
2482
2483 u8 parent_element_id[0x20];
2484
2485 u8 reserved_at_60[0x40];
2486
2487 u8 bw_share[0x20];
2488
2489 u8 max_average_bw[0x20];
2490
2491 u8 reserved_at_e0[0x120];
2492};
2493
Saeed Mahameede2816822015-05-28 22:28:40 +03002494struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002495 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496
Matan Barakb4ff3a32016-02-09 14:57:42 +02002497 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002498 u8 rqt_max_size[0x10];
2499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501 u8 rqt_actual_size[0x10];
2502
Matan Barakb4ff3a32016-02-09 14:57:42 +02002503 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002504
2505 struct mlx5_ifc_rq_num_bits rq_num[0];
2506};
2507
2508enum {
2509 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2510 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2511};
2512
2513enum {
2514 MLX5_RQC_STATE_RST = 0x0,
2515 MLX5_RQC_STATE_RDY = 0x1,
2516 MLX5_RQC_STATE_ERR = 0x3,
2517};
2518
2519struct mlx5_ifc_rqc_bits {
2520 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002521 u8 reserved_at_1[0x1];
2522 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002523 u8 vsd[0x1];
2524 u8 mem_rq_type[0x4];
2525 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529
Matan Barakb4ff3a32016-02-09 14:57:42 +02002530 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002531 u8 user_index[0x18];
2532
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534 u8 cqn[0x18];
2535
2536 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002537 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002538
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540 u8 rmpn[0x18];
2541
Matan Barakb4ff3a32016-02-09 14:57:42 +02002542 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002543
2544 struct mlx5_ifc_wq_bits wq;
2545};
2546
2547enum {
2548 MLX5_RMPC_STATE_RDY = 0x1,
2549 MLX5_RMPC_STATE_ERR = 0x3,
2550};
2551
2552struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556
2557 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
2562 struct mlx5_ifc_wq_bits wq;
2563};
2564
Saeed Mahameede2816822015-05-28 22:28:40 +03002565struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002566 u8 reserved_at_0[0x5];
2567 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002568 u8 reserved_at_8[0x15];
2569 u8 disable_mc_local_lb[0x1];
2570 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 roce_en[0x1];
2572
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002573 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002574 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002575 u8 event_on_mtu[0x1];
2576 u8 event_on_promisc_change[0x1];
2577 u8 event_on_vlan_change[0x1];
2578 u8 event_on_mc_address_change[0x1];
2579 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002580
Matan Barakb4ff3a32016-02-09 14:57:42 +02002581 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002582
2583 u8 mtu[0x10];
2584
Achiad Shochat9efa7522015-12-23 18:47:20 +02002585 u8 system_image_guid[0x40];
2586 u8 port_guid[0x40];
2587 u8 node_guid[0x40];
2588
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002590 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002592
2593 u8 promisc_uc[0x1];
2594 u8 promisc_mc[0x1];
2595 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599 u8 allowed_list_size[0xc];
2600
2601 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2602
Matan Barakb4ff3a32016-02-09 14:57:42 +02002603 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002604
2605 u8 current_uc_mac_address[0][0x40];
2606};
2607
2608enum {
2609 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2610 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2611 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002612 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002613};
2614
2615struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619 u8 small_fence_on_rdma_read_response[0x1];
2620 u8 umr_en[0x1];
2621 u8 a[0x1];
2622 u8 rw[0x1];
2623 u8 rr[0x1];
2624 u8 lw[0x1];
2625 u8 lr[0x1];
2626 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628
2629 u8 qpn[0x18];
2630 u8 mkey_7_0[0x8];
2631
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633
2634 u8 length64[0x1];
2635 u8 bsf_en[0x1];
2636 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002637 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002639 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002640 u8 en_rinval[0x1];
2641 u8 pd[0x18];
2642
2643 u8 start_addr[0x40];
2644
2645 u8 len[0x40];
2646
2647 u8 bsf_octword_size[0x20];
2648
Matan Barakb4ff3a32016-02-09 14:57:42 +02002649 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002650
2651 u8 translations_octword_size[0x20];
2652
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002654 u8 log_page_size[0x5];
2655
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657};
2658
2659struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002660 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002661 u8 pkey[0x10];
2662};
2663
2664struct mlx5_ifc_array128_auto_bits {
2665 u8 array128_auto[16][0x8];
2666};
2667
2668struct mlx5_ifc_hca_vport_context_bits {
2669 u8 field_select[0x20];
2670
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672
2673 u8 sm_virt_aware[0x1];
2674 u8 has_smi[0x1];
2675 u8 has_raw[0x1];
2676 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002677 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002678 u8 port_physical_state[0x4];
2679 u8 vport_state_policy[0x4];
2680 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681 u8 vport_state[0x4];
2682
Matan Barakb4ff3a32016-02-09 14:57:42 +02002683 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002684
2685 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002686
2687 u8 port_guid[0x40];
2688
2689 u8 node_guid[0x40];
2690
2691 u8 cap_mask1[0x20];
2692
2693 u8 cap_mask1_field_select[0x20];
2694
2695 u8 cap_mask2[0x20];
2696
2697 u8 cap_mask2_field_select[0x20];
2698
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002700
2701 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002703 u8 init_type_reply[0x4];
2704 u8 lmc[0x3];
2705 u8 subnet_timeout[0x5];
2706
2707 u8 sm_lid[0x10];
2708 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710
2711 u8 qkey_violation_counter[0x10];
2712 u8 pkey_violation_counter[0x10];
2713
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002715};
2716
Saeed Mahameedd6666752015-12-01 18:03:22 +02002717struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002718 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002719 u8 vport_svlan_strip[0x1];
2720 u8 vport_cvlan_strip[0x1];
2721 u8 vport_svlan_insert[0x1];
2722 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002723 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002724
Matan Barakb4ff3a32016-02-09 14:57:42 +02002725 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002726
2727 u8 svlan_cfi[0x1];
2728 u8 svlan_pcp[0x3];
2729 u8 svlan_id[0xc];
2730 u8 cvlan_cfi[0x1];
2731 u8 cvlan_pcp[0x3];
2732 u8 cvlan_id[0xc];
2733
Matan Barakb4ff3a32016-02-09 14:57:42 +02002734 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002735};
2736
Saeed Mahameede2816822015-05-28 22:28:40 +03002737enum {
2738 MLX5_EQC_STATUS_OK = 0x0,
2739 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2740};
2741
2742enum {
2743 MLX5_EQC_ST_ARMED = 0x9,
2744 MLX5_EQC_ST_FIRED = 0xa,
2745};
2746
2747struct mlx5_ifc_eqc_bits {
2748 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750 u8 ec[0x1];
2751 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757
Matan Barakb4ff3a32016-02-09 14:57:42 +02002758 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002759 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002760 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002761
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763 u8 log_eq_size[0x5];
2764 u8 uar_page[0x18];
2765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 intr[0x8];
2770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774
Matan Barakb4ff3a32016-02-09 14:57:42 +02002775 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778 u8 consumer_counter[0x18];
2779
Matan Barakb4ff3a32016-02-09 14:57:42 +02002780 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002781 u8 producer_counter[0x18];
2782
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784};
2785
2786enum {
2787 MLX5_DCTC_STATE_ACTIVE = 0x0,
2788 MLX5_DCTC_STATE_DRAINING = 0x1,
2789 MLX5_DCTC_STATE_DRAINED = 0x2,
2790};
2791
2792enum {
2793 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2794 MLX5_DCTC_CS_RES_NA = 0x1,
2795 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2796};
2797
2798enum {
2799 MLX5_DCTC_MTU_256_BYTES = 0x1,
2800 MLX5_DCTC_MTU_512_BYTES = 0x2,
2801 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2802 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2803 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2804};
2805
2806struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812 u8 user_index[0x18];
2813
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815 u8 cqn[0x18];
2816
2817 u8 counter_set_id[0x8];
2818 u8 atomic_mode[0x4];
2819 u8 rre[0x1];
2820 u8 rwe[0x1];
2821 u8 rae[0x1];
2822 u8 atomic_like_write_en[0x1];
2823 u8 latency_sensitive[0x1];
2824 u8 rlky[0x1];
2825 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002827
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002829 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833
Matan Barakb4ff3a32016-02-09 14:57:42 +02002834 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002835 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838 u8 pd[0x18];
2839
2840 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842 u8 flow_label[0x14];
2843
2844 u8 dc_access_key[0x40];
2845
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 mtu[0x3];
2848 u8 port[0x8];
2849 u8 pkey_index[0x10];
2850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002853 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002854 u8 hop_limit[0x8];
2855
2856 u8 dc_access_key_violation_count[0x20];
2857
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859 u8 dei_cfi[0x1];
2860 u8 eth_prio[0x3];
2861 u8 ecn[0x2];
2862 u8 dscp[0x6];
2863
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865};
2866
2867enum {
2868 MLX5_CQC_STATUS_OK = 0x0,
2869 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2870 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2871};
2872
2873enum {
2874 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2875 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2876};
2877
2878enum {
2879 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2880 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2881 MLX5_CQC_ST_FIRED = 0xa,
2882};
2883
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002884enum {
2885 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2886 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002887 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002888};
2889
Saeed Mahameede2816822015-05-28 22:28:40 +03002890struct mlx5_ifc_cqc_bits {
2891 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893 u8 cqe_sz[0x3];
2894 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896 u8 scqe_break_moderation_en[0x1];
2897 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002898 u8 cq_period_mode[0x2];
2899 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900 u8 mini_cqe_res_format[0x2];
2901 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903
Matan Barakb4ff3a32016-02-09 14:57:42 +02002904 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905
Matan Barakb4ff3a32016-02-09 14:57:42 +02002906 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002907 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002908 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002909
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911 u8 log_cq_size[0x5];
2912 u8 uar_page[0x18];
2913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 cq_period[0xc];
2916 u8 cq_max_count[0x10];
2917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919 u8 c_eqn[0x8];
2920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924
Matan Barakb4ff3a32016-02-09 14:57:42 +02002925 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 last_notified_index[0x18];
2929
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931 u8 last_solicit_index[0x18];
2932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934 u8 consumer_counter[0x18];
2935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 producer_counter[0x18];
2938
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940
2941 u8 dbr_addr[0x40];
2942};
2943
2944union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2945 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2946 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2947 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949};
2950
2951struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002955 u8 ieee_vendor_id[0x18];
2956
Matan Barakb4ff3a32016-02-09 14:57:42 +02002957 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002958 u8 vsd_vendor_id[0x10];
2959
2960 u8 vsd[208][0x8];
2961
2962 u8 vsd_contd_psid[16][0x8];
2963};
2964
Saeed Mahameed74862162016-06-09 15:11:34 +03002965enum {
2966 MLX5_XRQC_STATE_GOOD = 0x0,
2967 MLX5_XRQC_STATE_ERROR = 0x1,
2968};
2969
2970enum {
2971 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2972 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2973};
2974
2975enum {
2976 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2977};
2978
2979struct mlx5_ifc_tag_matching_topology_context_bits {
2980 u8 log_matching_list_sz[0x4];
2981 u8 reserved_at_4[0xc];
2982 u8 append_next_index[0x10];
2983
2984 u8 sw_phase_cnt[0x10];
2985 u8 hw_phase_cnt[0x10];
2986
2987 u8 reserved_at_40[0x40];
2988};
2989
2990struct mlx5_ifc_xrqc_bits {
2991 u8 state[0x4];
2992 u8 rlkey[0x1];
2993 u8 reserved_at_5[0xf];
2994 u8 topology[0x4];
2995 u8 reserved_at_18[0x4];
2996 u8 offload[0x4];
2997
2998 u8 reserved_at_20[0x8];
2999 u8 user_index[0x18];
3000
3001 u8 reserved_at_40[0x8];
3002 u8 cqn[0x18];
3003
3004 u8 reserved_at_60[0xa0];
3005
3006 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3007
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003008 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003009
3010 struct mlx5_ifc_wq_bits wq;
3011};
3012
Saeed Mahameede2816822015-05-28 22:28:40 +03003013union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3014 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3015 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017};
3018
3019union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3020 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3021 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3022 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003023 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003024};
3025
3026union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3027 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3028 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3029 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3030 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3031 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3032 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3033 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003034 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003035 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003036 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003037 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003038};
3039
Gal Pressman8ed1a632016-11-17 13:46:01 +02003040union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3041 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3042 u8 reserved_at_0[0x7c0];
3043};
3044
Saeed Mahameede2816822015-05-28 22:28:40 +03003045union mlx5_ifc_event_auto_bits {
3046 struct mlx5_ifc_comp_event_bits comp_event;
3047 struct mlx5_ifc_dct_events_bits dct_events;
3048 struct mlx5_ifc_qp_events_bits qp_events;
3049 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3050 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3051 struct mlx5_ifc_cq_error_bits cq_error;
3052 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3053 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3054 struct mlx5_ifc_gpio_event_bits gpio_event;
3055 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3056 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3057 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059};
3060
3061struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063
3064 u8 assert_existptr[0x20];
3065
3066 u8 assert_callra[0x20];
3067
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069
3070 u8 fw_version[0x20];
3071
3072 u8 hw_id[0x20];
3073
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075
3076 u8 irisc_index[0x8];
3077 u8 synd[0x8];
3078 u8 ext_synd[0x10];
3079};
3080
3081struct mlx5_ifc_register_loopback_control_bits {
3082 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003083 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003084 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003085 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003086
Matan Barakb4ff3a32016-02-09 14:57:42 +02003087 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003088};
3089
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003090struct mlx5_ifc_vport_tc_element_bits {
3091 u8 traffic_class[0x4];
3092 u8 reserved_at_4[0xc];
3093 u8 vport_number[0x10];
3094};
3095
3096struct mlx5_ifc_vport_element_bits {
3097 u8 reserved_at_0[0x10];
3098 u8 vport_number[0x10];
3099};
3100
3101enum {
3102 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3103 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3104 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3105};
3106
3107struct mlx5_ifc_tsar_element_bits {
3108 u8 reserved_at_0[0x8];
3109 u8 tsar_type[0x8];
3110 u8 reserved_at_10[0x10];
3111};
3112
Majd Dibbiny8812c242017-02-09 14:20:12 +02003113enum {
3114 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3115 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3116};
3117
Saeed Mahameede2816822015-05-28 22:28:40 +03003118struct mlx5_ifc_teardown_hca_out_bits {
3119 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121
3122 u8 syndrome[0x20];
3123
Majd Dibbiny8812c242017-02-09 14:20:12 +02003124 u8 reserved_at_40[0x3f];
3125
3126 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127};
3128
3129enum {
3130 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003131 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003132};
3133
3134struct mlx5_ifc_teardown_hca_in_bits {
3135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003137
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139 u8 op_mod[0x10];
3140
Matan Barakb4ff3a32016-02-09 14:57:42 +02003141 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142 u8 profile[0x10];
3143
Matan Barakb4ff3a32016-02-09 14:57:42 +02003144 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003145};
3146
3147struct mlx5_ifc_sqerr2rts_qp_out_bits {
3148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003150
3151 u8 syndrome[0x20];
3152
Matan Barakb4ff3a32016-02-09 14:57:42 +02003153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003154};
3155
3156struct mlx5_ifc_sqerr2rts_qp_in_bits {
3157 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003158 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159
Matan Barakb4ff3a32016-02-09 14:57:42 +02003160 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003161 u8 op_mod[0x10];
3162
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164 u8 qpn[0x18];
3165
Matan Barakb4ff3a32016-02-09 14:57:42 +02003166 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003167
3168 u8 opt_param_mask[0x20];
3169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171
3172 struct mlx5_ifc_qpc_bits qpc;
3173
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175};
3176
3177struct mlx5_ifc_sqd2rts_qp_out_bits {
3178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180
3181 u8 syndrome[0x20];
3182
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184};
3185
3186struct mlx5_ifc_sqd2rts_qp_in_bits {
3187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003189
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191 u8 op_mod[0x10];
3192
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194 u8 qpn[0x18];
3195
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197
3198 u8 opt_param_mask[0x20];
3199
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201
3202 struct mlx5_ifc_qpc_bits qpc;
3203
Matan Barakb4ff3a32016-02-09 14:57:42 +02003204 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003205};
3206
3207struct mlx5_ifc_set_roce_address_out_bits {
3208 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210
3211 u8 syndrome[0x20];
3212
Matan Barakb4ff3a32016-02-09 14:57:42 +02003213 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003214};
3215
3216struct mlx5_ifc_set_roce_address_in_bits {
3217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003219
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221 u8 op_mod[0x10];
3222
3223 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227
3228 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3229};
3230
3231struct mlx5_ifc_set_mad_demux_out_bits {
3232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003234
3235 u8 syndrome[0x20];
3236
Matan Barakb4ff3a32016-02-09 14:57:42 +02003237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003238};
3239
3240enum {
3241 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3242 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3243};
3244
3245struct mlx5_ifc_set_mad_demux_in_bits {
3246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250 u8 op_mod[0x10];
3251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257};
3258
3259struct mlx5_ifc_set_l2_table_entry_out_bits {
3260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
3263 u8 syndrome[0x20];
3264
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266};
3267
3268struct mlx5_ifc_set_l2_table_entry_in_bits {
3269 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271
Matan Barakb4ff3a32016-02-09 14:57:42 +02003272 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003273 u8 op_mod[0x10];
3274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276
Matan Barakb4ff3a32016-02-09 14:57:42 +02003277 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003278 u8 table_index[0x18];
3279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283 u8 vlan_valid[0x1];
3284 u8 vlan[0xc];
3285
3286 struct mlx5_ifc_mac_address_layout_bits mac_address;
3287
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289};
3290
3291struct mlx5_ifc_set_issi_out_bits {
3292 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294
3295 u8 syndrome[0x20];
3296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298};
3299
3300struct mlx5_ifc_set_issi_in_bits {
3301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305 u8 op_mod[0x10];
3306
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308 u8 current_issi[0x10];
3309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311};
3312
3313struct mlx5_ifc_set_hca_cap_out_bits {
3314 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316
3317 u8 syndrome[0x20];
3318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003320};
3321
3322struct mlx5_ifc_set_hca_cap_in_bits {
3323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003325
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003327 u8 op_mod[0x10];
3328
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003330
Saeed Mahameede2816822015-05-28 22:28:40 +03003331 union mlx5_ifc_hca_cap_union_bits capability;
3332};
3333
Maor Gottlieb26a81452015-12-10 17:12:39 +02003334enum {
3335 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3336 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3337 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3338 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3339};
3340
Saeed Mahameede2816822015-05-28 22:28:40 +03003341struct mlx5_ifc_set_fte_out_bits {
3342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344
3345 u8 syndrome[0x20];
3346
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348};
3349
3350struct mlx5_ifc_set_fte_in_bits {
3351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
Matan Barakb4ff3a32016-02-09 14:57:42 +02003354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003355 u8 op_mod[0x10];
3356
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003357 u8 other_vport[0x1];
3358 u8 reserved_at_41[0xf];
3359 u8 vport_number[0x10];
3360
3361 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362
3363 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367 u8 table_id[0x18];
3368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003370 u8 modify_enable_mask[0x8];
3371
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 flow_index[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377
3378 struct mlx5_ifc_flow_context_bits flow_context;
3379};
3380
3381struct mlx5_ifc_rts2rts_qp_out_bits {
3382 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384
3385 u8 syndrome[0x20];
3386
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388};
3389
3390struct mlx5_ifc_rts2rts_qp_in_bits {
3391 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395 u8 op_mod[0x10];
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398 u8 qpn[0x18];
3399
Matan Barakb4ff3a32016-02-09 14:57:42 +02003400 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003401
3402 u8 opt_param_mask[0x20];
3403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405
3406 struct mlx5_ifc_qpc_bits qpc;
3407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409};
3410
3411struct mlx5_ifc_rtr2rts_qp_out_bits {
3412 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414
3415 u8 syndrome[0x20];
3416
Matan Barakb4ff3a32016-02-09 14:57:42 +02003417 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003418};
3419
3420struct mlx5_ifc_rtr2rts_qp_in_bits {
3421 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425 u8 op_mod[0x10];
3426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428 u8 qpn[0x18];
3429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003431
3432 u8 opt_param_mask[0x20];
3433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435
3436 struct mlx5_ifc_qpc_bits qpc;
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439};
3440
3441struct mlx5_ifc_rst2init_qp_out_bits {
3442 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444
3445 u8 syndrome[0x20];
3446
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448};
3449
3450struct mlx5_ifc_rst2init_qp_in_bits {
3451 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455 u8 op_mod[0x10];
3456
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003458 u8 qpn[0x18];
3459
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003461
3462 u8 opt_param_mask[0x20];
3463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465
3466 struct mlx5_ifc_qpc_bits qpc;
3467
Matan Barakb4ff3a32016-02-09 14:57:42 +02003468 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003469};
3470
Saeed Mahameed74862162016-06-09 15:11:34 +03003471struct mlx5_ifc_query_xrq_out_bits {
3472 u8 status[0x8];
3473 u8 reserved_at_8[0x18];
3474
3475 u8 syndrome[0x20];
3476
3477 u8 reserved_at_40[0x40];
3478
3479 struct mlx5_ifc_xrqc_bits xrq_context;
3480};
3481
3482struct mlx5_ifc_query_xrq_in_bits {
3483 u8 opcode[0x10];
3484 u8 reserved_at_10[0x10];
3485
3486 u8 reserved_at_20[0x10];
3487 u8 op_mod[0x10];
3488
3489 u8 reserved_at_40[0x8];
3490 u8 xrqn[0x18];
3491
3492 u8 reserved_at_60[0x20];
3493};
3494
Saeed Mahameede2816822015-05-28 22:28:40 +03003495struct mlx5_ifc_query_xrc_srq_out_bits {
3496 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003497 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003498
3499 u8 syndrome[0x20];
3500
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502
3503 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506
3507 u8 pas[0][0x40];
3508};
3509
3510struct mlx5_ifc_query_xrc_srq_in_bits {
3511 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513
Matan Barakb4ff3a32016-02-09 14:57:42 +02003514 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003515 u8 op_mod[0x10];
3516
Matan Barakb4ff3a32016-02-09 14:57:42 +02003517 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003518 u8 xrc_srqn[0x18];
3519
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521};
3522
3523enum {
3524 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3525 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3526};
3527
3528struct mlx5_ifc_query_vport_state_out_bits {
3529 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003530 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003531
3532 u8 syndrome[0x20];
3533
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
Matan Barakb4ff3a32016-02-09 14:57:42 +02003536 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003537 u8 admin_state[0x4];
3538 u8 state[0x4];
3539};
3540
3541enum {
3542 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003543 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003544};
3545
3546struct mlx5_ifc_query_vport_state_in_bits {
3547 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549
Matan Barakb4ff3a32016-02-09 14:57:42 +02003550 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003551 u8 op_mod[0x10];
3552
3553 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003554 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003555 u8 vport_number[0x10];
3556
Matan Barakb4ff3a32016-02-09 14:57:42 +02003557 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003558};
3559
3560struct mlx5_ifc_query_vport_counter_out_bits {
3561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003563
3564 u8 syndrome[0x20];
3565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567
3568 struct mlx5_ifc_traffic_counter_bits received_errors;
3569
3570 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3571
3572 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3573
3574 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3575
3576 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3577
3578 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3579
3580 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3581
3582 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3583
3584 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3585
3586 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3587
3588 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3589
3590 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3591
Matan Barakb4ff3a32016-02-09 14:57:42 +02003592 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003593};
3594
3595enum {
3596 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3597};
3598
3599struct mlx5_ifc_query_vport_counter_in_bits {
3600 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003601 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003602
Matan Barakb4ff3a32016-02-09 14:57:42 +02003603 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604 u8 op_mod[0x10];
3605
3606 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003607 u8 reserved_at_41[0xb];
3608 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609 u8 vport_number[0x10];
3610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612
3613 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617};
3618
3619struct mlx5_ifc_query_tis_out_bits {
3620 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
3623 u8 syndrome[0x20];
3624
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626
3627 struct mlx5_ifc_tisc_bits tis_context;
3628};
3629
3630struct mlx5_ifc_query_tis_in_bits {
3631 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635 u8 op_mod[0x10];
3636
Matan Barakb4ff3a32016-02-09 14:57:42 +02003637 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003638 u8 tisn[0x18];
3639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641};
3642
3643struct mlx5_ifc_query_tir_out_bits {
3644 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646
3647 u8 syndrome[0x20];
3648
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650
3651 struct mlx5_ifc_tirc_bits tir_context;
3652};
3653
3654struct mlx5_ifc_query_tir_in_bits {
3655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659 u8 op_mod[0x10];
3660
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662 u8 tirn[0x18];
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665};
3666
3667struct mlx5_ifc_query_srq_out_bits {
3668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670
3671 u8 syndrome[0x20];
3672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674
3675 struct mlx5_ifc_srqc_bits srq_context_entry;
3676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678
3679 u8 pas[0][0x40];
3680};
3681
3682struct mlx5_ifc_query_srq_in_bits {
3683 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003684 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003685
Matan Barakb4ff3a32016-02-09 14:57:42 +02003686 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003687 u8 op_mod[0x10];
3688
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690 u8 srqn[0x18];
3691
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693};
3694
3695struct mlx5_ifc_query_sq_out_bits {
3696 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003697 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003698
3699 u8 syndrome[0x20];
3700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702
3703 struct mlx5_ifc_sqc_bits sq_context;
3704};
3705
3706struct mlx5_ifc_query_sq_in_bits {
3707 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709
Matan Barakb4ff3a32016-02-09 14:57:42 +02003710 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003711 u8 op_mod[0x10];
3712
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714 u8 sqn[0x18];
3715
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717};
3718
3719struct mlx5_ifc_query_special_contexts_out_bits {
3720 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722
3723 u8 syndrome[0x20];
3724
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003725 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726
3727 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003728
3729 u8 null_mkey[0x20];
3730
3731 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732};
3733
3734struct mlx5_ifc_query_special_contexts_in_bits {
3735 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737
Matan Barakb4ff3a32016-02-09 14:57:42 +02003738 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003739 u8 op_mod[0x10];
3740
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742};
3743
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003744struct mlx5_ifc_query_scheduling_element_out_bits {
3745 u8 opcode[0x10];
3746 u8 reserved_at_10[0x10];
3747
3748 u8 reserved_at_20[0x10];
3749 u8 op_mod[0x10];
3750
3751 u8 reserved_at_40[0xc0];
3752
3753 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3754
3755 u8 reserved_at_300[0x100];
3756};
3757
3758enum {
3759 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3760};
3761
3762struct mlx5_ifc_query_scheduling_element_in_bits {
3763 u8 opcode[0x10];
3764 u8 reserved_at_10[0x10];
3765
3766 u8 reserved_at_20[0x10];
3767 u8 op_mod[0x10];
3768
3769 u8 scheduling_hierarchy[0x8];
3770 u8 reserved_at_48[0x18];
3771
3772 u8 scheduling_element_id[0x20];
3773
3774 u8 reserved_at_80[0x180];
3775};
3776
Saeed Mahameede2816822015-05-28 22:28:40 +03003777struct mlx5_ifc_query_rqt_out_bits {
3778 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003779 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003780
3781 u8 syndrome[0x20];
3782
Matan Barakb4ff3a32016-02-09 14:57:42 +02003783 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003784
3785 struct mlx5_ifc_rqtc_bits rqt_context;
3786};
3787
3788struct mlx5_ifc_query_rqt_in_bits {
3789 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003790 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003791
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793 u8 op_mod[0x10];
3794
Matan Barakb4ff3a32016-02-09 14:57:42 +02003795 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796 u8 rqtn[0x18];
3797
Matan Barakb4ff3a32016-02-09 14:57:42 +02003798 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003799};
3800
3801struct mlx5_ifc_query_rq_out_bits {
3802 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804
3805 u8 syndrome[0x20];
3806
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808
3809 struct mlx5_ifc_rqc_bits rq_context;
3810};
3811
3812struct mlx5_ifc_query_rq_in_bits {
3813 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817 u8 op_mod[0x10];
3818
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820 u8 rqn[0x18];
3821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823};
3824
3825struct mlx5_ifc_query_roce_address_out_bits {
3826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828
3829 u8 syndrome[0x20];
3830
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832
3833 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3834};
3835
3836struct mlx5_ifc_query_roce_address_in_bits {
3837 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003838 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003839
Matan Barakb4ff3a32016-02-09 14:57:42 +02003840 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841 u8 op_mod[0x10];
3842
3843 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847};
3848
3849struct mlx5_ifc_query_rmp_out_bits {
3850 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852
3853 u8 syndrome[0x20];
3854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856
3857 struct mlx5_ifc_rmpc_bits rmp_context;
3858};
3859
3860struct mlx5_ifc_query_rmp_in_bits {
3861 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003862 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003863
Matan Barakb4ff3a32016-02-09 14:57:42 +02003864 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003865 u8 op_mod[0x10];
3866
Matan Barakb4ff3a32016-02-09 14:57:42 +02003867 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868 u8 rmpn[0x18];
3869
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871};
3872
3873struct mlx5_ifc_query_qp_out_bits {
3874 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876
3877 u8 syndrome[0x20];
3878
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880
3881 u8 opt_param_mask[0x20];
3882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884
3885 struct mlx5_ifc_qpc_bits qpc;
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 u8 pas[0][0x40];
3890};
3891
3892struct mlx5_ifc_query_qp_in_bits {
3893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897 u8 op_mod[0x10];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900 u8 qpn[0x18];
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903};
3904
3905struct mlx5_ifc_query_q_counter_out_bits {
3906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908
3909 u8 syndrome[0x20];
3910
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 u8 rx_write_requests[0x20];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 u8 rx_read_requests[0x20];
3918
Matan Barakb4ff3a32016-02-09 14:57:42 +02003919 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920
3921 u8 rx_atomic_requests[0x20];
3922
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924
3925 u8 rx_dct_connect[0x20];
3926
Matan Barakb4ff3a32016-02-09 14:57:42 +02003927 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928
3929 u8 out_of_buffer[0x20];
3930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932
3933 u8 out_of_sequence[0x20];
3934
Saeed Mahameed74862162016-06-09 15:11:34 +03003935 u8 reserved_at_1e0[0x20];
3936
3937 u8 duplicate_request[0x20];
3938
3939 u8 reserved_at_220[0x20];
3940
3941 u8 rnr_nak_retry_err[0x20];
3942
3943 u8 reserved_at_260[0x20];
3944
3945 u8 packet_seq_err[0x20];
3946
3947 u8 reserved_at_2a0[0x20];
3948
3949 u8 implied_nak_seq_err[0x20];
3950
3951 u8 reserved_at_2e0[0x20];
3952
3953 u8 local_ack_timeout_err[0x20];
3954
3955 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956};
3957
3958struct mlx5_ifc_query_q_counter_in_bits {
3959 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963 u8 op_mod[0x10];
3964
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966
3967 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003968 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003969
Matan Barakb4ff3a32016-02-09 14:57:42 +02003970 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971 u8 counter_set_id[0x8];
3972};
3973
3974struct mlx5_ifc_query_pages_out_bits {
3975 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003976 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003977
3978 u8 syndrome[0x20];
3979
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981 u8 function_id[0x10];
3982
3983 u8 num_pages[0x20];
3984};
3985
3986enum {
3987 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3988 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3989 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3990};
3991
3992struct mlx5_ifc_query_pages_in_bits {
3993 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003994 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003995
Matan Barakb4ff3a32016-02-09 14:57:42 +02003996 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003997 u8 op_mod[0x10];
3998
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000 u8 function_id[0x10];
4001
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003};
4004
4005struct mlx5_ifc_query_nic_vport_context_out_bits {
4006 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008
4009 u8 syndrome[0x20];
4010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012
4013 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4014};
4015
4016struct mlx5_ifc_query_nic_vport_context_in_bits {
4017 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021 u8 op_mod[0x10];
4022
4023 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025 u8 vport_number[0x10];
4026
Matan Barakb4ff3a32016-02-09 14:57:42 +02004027 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004028 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004029 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004030};
4031
4032struct mlx5_ifc_query_mkey_out_bits {
4033 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004034 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004035
4036 u8 syndrome[0x20];
4037
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039
4040 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
4044 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4045
4046 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4047};
4048
4049struct mlx5_ifc_query_mkey_in_bits {
4050 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054 u8 op_mod[0x10];
4055
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057 u8 mkey_index[0x18];
4058
4059 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004060 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004061};
4062
4063struct mlx5_ifc_query_mad_demux_out_bits {
4064 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004065 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004066
4067 u8 syndrome[0x20];
4068
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070
4071 u8 mad_dumux_parameters_block[0x20];
4072};
4073
4074struct mlx5_ifc_query_mad_demux_in_bits {
4075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004077
Matan Barakb4ff3a32016-02-09 14:57:42 +02004078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004079 u8 op_mod[0x10];
4080
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082};
4083
4084struct mlx5_ifc_query_l2_table_entry_out_bits {
4085 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087
4088 u8 syndrome[0x20];
4089
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093 u8 vlan_valid[0x1];
4094 u8 vlan[0xc];
4095
4096 struct mlx5_ifc_mac_address_layout_bits mac_address;
4097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099};
4100
4101struct mlx5_ifc_query_l2_table_entry_in_bits {
4102 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106 u8 op_mod[0x10];
4107
Matan Barakb4ff3a32016-02-09 14:57:42 +02004108 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004109
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111 u8 table_index[0x18];
4112
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114};
4115
4116struct mlx5_ifc_query_issi_out_bits {
4117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
4120 u8 syndrome[0x20];
4121
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123 u8 current_issi[0x10];
4124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128 u8 supported_issi_dw0[0x20];
4129};
4130
4131struct mlx5_ifc_query_issi_in_bits {
4132 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134
Matan Barakb4ff3a32016-02-09 14:57:42 +02004135 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004136 u8 op_mod[0x10];
4137
Matan Barakb4ff3a32016-02-09 14:57:42 +02004138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004139};
4140
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004141struct mlx5_ifc_set_driver_version_out_bits {
4142 u8 status[0x8];
4143 u8 reserved_0[0x18];
4144
4145 u8 syndrome[0x20];
4146 u8 reserved_1[0x40];
4147};
4148
4149struct mlx5_ifc_set_driver_version_in_bits {
4150 u8 opcode[0x10];
4151 u8 reserved_0[0x10];
4152
4153 u8 reserved_1[0x10];
4154 u8 op_mod[0x10];
4155
4156 u8 reserved_2[0x40];
4157 u8 driver_version[64][0x8];
4158};
4159
Saeed Mahameede2816822015-05-28 22:28:40 +03004160struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4161 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004162 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004163
4164 u8 syndrome[0x20];
4165
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167
4168 struct mlx5_ifc_pkey_bits pkey[0];
4169};
4170
4171struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4172 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004173 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004174
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176 u8 op_mod[0x10];
4177
4178 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004180 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004181 u8 vport_number[0x10];
4182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184 u8 pkey_index[0x10];
4185};
4186
Eli Coheneff901d2016-03-11 22:58:42 +02004187enum {
4188 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4189 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4190 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4191};
4192
Saeed Mahameede2816822015-05-28 22:28:40 +03004193struct mlx5_ifc_query_hca_vport_gid_out_bits {
4194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196
4197 u8 syndrome[0x20];
4198
Matan Barakb4ff3a32016-02-09 14:57:42 +02004199 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004200
4201 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203
4204 struct mlx5_ifc_array128_auto_bits gid[0];
4205};
4206
4207struct mlx5_ifc_query_hca_vport_gid_in_bits {
4208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212 u8 op_mod[0x10];
4213
4214 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004216 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217 u8 vport_number[0x10];
4218
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220 u8 gid_index[0x10];
4221};
4222
4223struct mlx5_ifc_query_hca_vport_context_out_bits {
4224 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004225 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004226
4227 u8 syndrome[0x20];
4228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230
4231 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4232};
4233
4234struct mlx5_ifc_query_hca_vport_context_in_bits {
4235 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004237
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239 u8 op_mod[0x10];
4240
4241 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004243 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244 u8 vport_number[0x10];
4245
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247};
4248
4249struct mlx5_ifc_query_hca_cap_out_bits {
4250 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252
4253 u8 syndrome[0x20];
4254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256
4257 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004258};
4259
4260struct mlx5_ifc_query_hca_cap_in_bits {
4261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004263
Matan Barakb4ff3a32016-02-09 14:57:42 +02004264 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004265 u8 op_mod[0x10];
4266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004268};
4269
Saeed Mahameede2816822015-05-28 22:28:40 +03004270struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004273
4274 u8 syndrome[0x20];
4275
Matan Barakb4ff3a32016-02-09 14:57:42 +02004276 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004277
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281 u8 log_size[0x8];
4282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004284};
4285
Saeed Mahameede2816822015-05-28 22:28:40 +03004286struct mlx5_ifc_query_flow_table_in_bits {
4287 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289
Matan Barakb4ff3a32016-02-09 14:57:42 +02004290 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004291 u8 op_mod[0x10];
4292
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294
4295 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299 u8 table_id[0x18];
4300
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302};
4303
4304struct mlx5_ifc_query_fte_out_bits {
4305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307
4308 u8 syndrome[0x20];
4309
Matan Barakb4ff3a32016-02-09 14:57:42 +02004310 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004311
4312 struct mlx5_ifc_flow_context_bits flow_context;
4313};
4314
4315struct mlx5_ifc_query_fte_in_bits {
4316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320 u8 op_mod[0x10];
4321
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323
4324 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328 u8 table_id[0x18];
4329
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331
4332 u8 flow_index[0x20];
4333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335};
4336
4337enum {
4338 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4339 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4340 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4341};
4342
4343struct mlx5_ifc_query_flow_group_out_bits {
4344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004346
4347 u8 syndrome[0x20];
4348
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350
4351 u8 start_flow_index[0x20];
4352
Matan Barakb4ff3a32016-02-09 14:57:42 +02004353 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004354
4355 u8 end_flow_index[0x20];
4356
Matan Barakb4ff3a32016-02-09 14:57:42 +02004357 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004358
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004360 u8 match_criteria_enable[0x8];
4361
4362 struct mlx5_ifc_fte_match_param_bits match_criteria;
4363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365};
4366
4367struct mlx5_ifc_query_flow_group_in_bits {
4368 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372 u8 op_mod[0x10];
4373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375
4376 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380 u8 table_id[0x18];
4381
4382 u8 group_id[0x20];
4383
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385};
4386
Amir Vadai9dc0b282016-05-13 12:55:39 +00004387struct mlx5_ifc_query_flow_counter_out_bits {
4388 u8 status[0x8];
4389 u8 reserved_at_8[0x18];
4390
4391 u8 syndrome[0x20];
4392
4393 u8 reserved_at_40[0x40];
4394
4395 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4396};
4397
4398struct mlx5_ifc_query_flow_counter_in_bits {
4399 u8 opcode[0x10];
4400 u8 reserved_at_10[0x10];
4401
4402 u8 reserved_at_20[0x10];
4403 u8 op_mod[0x10];
4404
4405 u8 reserved_at_40[0x80];
4406
4407 u8 clear[0x1];
4408 u8 reserved_at_c1[0xf];
4409 u8 num_of_counters[0x10];
4410
4411 u8 reserved_at_e0[0x10];
4412 u8 flow_counter_id[0x10];
4413};
4414
Saeed Mahameedd6666752015-12-01 18:03:22 +02004415struct mlx5_ifc_query_esw_vport_context_out_bits {
4416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004417 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004418
4419 u8 syndrome[0x20];
4420
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004422
4423 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4424};
4425
4426struct mlx5_ifc_query_esw_vport_context_in_bits {
4427 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004431 u8 op_mod[0x10];
4432
4433 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004435 u8 vport_number[0x10];
4436
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004438};
4439
4440struct mlx5_ifc_modify_esw_vport_context_out_bits {
4441 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004443
4444 u8 syndrome[0x20];
4445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004447};
4448
4449struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004451 u8 vport_cvlan_insert[0x1];
4452 u8 vport_svlan_insert[0x1];
4453 u8 vport_cvlan_strip[0x1];
4454 u8 vport_svlan_strip[0x1];
4455};
4456
4457struct mlx5_ifc_modify_esw_vport_context_in_bits {
4458 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004460
Matan Barakb4ff3a32016-02-09 14:57:42 +02004461 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004462 u8 op_mod[0x10];
4463
4464 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004465 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004466 u8 vport_number[0x10];
4467
4468 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4469
4470 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4471};
4472
Saeed Mahameede2816822015-05-28 22:28:40 +03004473struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004474 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004476
4477 u8 syndrome[0x20];
4478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480
4481 struct mlx5_ifc_eqc_bits eq_context_entry;
4482
Matan Barakb4ff3a32016-02-09 14:57:42 +02004483 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004484
4485 u8 event_bitmask[0x40];
4486
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004488
4489 u8 pas[0][0x40];
4490};
4491
4492struct mlx5_ifc_query_eq_in_bits {
4493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004497 u8 op_mod[0x10];
4498
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004500 u8 eq_number[0x8];
4501
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503};
4504
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004505struct mlx5_ifc_encap_header_in_bits {
4506 u8 reserved_at_0[0x5];
4507 u8 header_type[0x3];
4508 u8 reserved_at_8[0xe];
4509 u8 encap_header_size[0xa];
4510
4511 u8 reserved_at_20[0x10];
4512 u8 encap_header[2][0x8];
4513
4514 u8 more_encap_header[0][0x8];
4515};
4516
4517struct mlx5_ifc_query_encap_header_out_bits {
4518 u8 status[0x8];
4519 u8 reserved_at_8[0x18];
4520
4521 u8 syndrome[0x20];
4522
4523 u8 reserved_at_40[0xa0];
4524
4525 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4526};
4527
4528struct mlx5_ifc_query_encap_header_in_bits {
4529 u8 opcode[0x10];
4530 u8 reserved_at_10[0x10];
4531
4532 u8 reserved_at_20[0x10];
4533 u8 op_mod[0x10];
4534
4535 u8 encap_id[0x20];
4536
4537 u8 reserved_at_60[0xa0];
4538};
4539
4540struct mlx5_ifc_alloc_encap_header_out_bits {
4541 u8 status[0x8];
4542 u8 reserved_at_8[0x18];
4543
4544 u8 syndrome[0x20];
4545
4546 u8 encap_id[0x20];
4547
4548 u8 reserved_at_60[0x20];
4549};
4550
4551struct mlx5_ifc_alloc_encap_header_in_bits {
4552 u8 opcode[0x10];
4553 u8 reserved_at_10[0x10];
4554
4555 u8 reserved_at_20[0x10];
4556 u8 op_mod[0x10];
4557
4558 u8 reserved_at_40[0xa0];
4559
4560 struct mlx5_ifc_encap_header_in_bits encap_header;
4561};
4562
4563struct mlx5_ifc_dealloc_encap_header_out_bits {
4564 u8 status[0x8];
4565 u8 reserved_at_8[0x18];
4566
4567 u8 syndrome[0x20];
4568
4569 u8 reserved_at_40[0x40];
4570};
4571
4572struct mlx5_ifc_dealloc_encap_header_in_bits {
4573 u8 opcode[0x10];
4574 u8 reserved_at_10[0x10];
4575
4576 u8 reserved_20[0x10];
4577 u8 op_mod[0x10];
4578
4579 u8 encap_id[0x20];
4580
4581 u8 reserved_60[0x20];
4582};
4583
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004584struct mlx5_ifc_set_action_in_bits {
4585 u8 action_type[0x4];
4586 u8 field[0xc];
4587 u8 reserved_at_10[0x3];
4588 u8 offset[0x5];
4589 u8 reserved_at_18[0x3];
4590 u8 length[0x5];
4591
4592 u8 data[0x20];
4593};
4594
4595struct mlx5_ifc_add_action_in_bits {
4596 u8 action_type[0x4];
4597 u8 field[0xc];
4598 u8 reserved_at_10[0x10];
4599
4600 u8 data[0x20];
4601};
4602
4603union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4604 struct mlx5_ifc_set_action_in_bits set_action_in;
4605 struct mlx5_ifc_add_action_in_bits add_action_in;
4606 u8 reserved_at_0[0x40];
4607};
4608
4609enum {
4610 MLX5_ACTION_TYPE_SET = 0x1,
4611 MLX5_ACTION_TYPE_ADD = 0x2,
4612};
4613
4614enum {
4615 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4616 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4617 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4618 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4619 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4620 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4621 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4622 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4623 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4624 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4625 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4626 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4627 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4628 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4629 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4630 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4631 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4632 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4633 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4634 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4635 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4636 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004637 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004638};
4639
4640struct mlx5_ifc_alloc_modify_header_context_out_bits {
4641 u8 status[0x8];
4642 u8 reserved_at_8[0x18];
4643
4644 u8 syndrome[0x20];
4645
4646 u8 modify_header_id[0x20];
4647
4648 u8 reserved_at_60[0x20];
4649};
4650
4651struct mlx5_ifc_alloc_modify_header_context_in_bits {
4652 u8 opcode[0x10];
4653 u8 reserved_at_10[0x10];
4654
4655 u8 reserved_at_20[0x10];
4656 u8 op_mod[0x10];
4657
4658 u8 reserved_at_40[0x20];
4659
4660 u8 table_type[0x8];
4661 u8 reserved_at_68[0x10];
4662 u8 num_of_actions[0x8];
4663
4664 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4665};
4666
4667struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4668 u8 status[0x8];
4669 u8 reserved_at_8[0x18];
4670
4671 u8 syndrome[0x20];
4672
4673 u8 reserved_at_40[0x40];
4674};
4675
4676struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4677 u8 opcode[0x10];
4678 u8 reserved_at_10[0x10];
4679
4680 u8 reserved_at_20[0x10];
4681 u8 op_mod[0x10];
4682
4683 u8 modify_header_id[0x20];
4684
4685 u8 reserved_at_60[0x20];
4686};
4687
Saeed Mahameede2816822015-05-28 22:28:40 +03004688struct mlx5_ifc_query_dct_out_bits {
4689 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004690 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004691
4692 u8 syndrome[0x20];
4693
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004695
4696 struct mlx5_ifc_dctc_bits dct_context_entry;
4697
Matan Barakb4ff3a32016-02-09 14:57:42 +02004698 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004699};
4700
4701struct mlx5_ifc_query_dct_in_bits {
4702 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004704
Matan Barakb4ff3a32016-02-09 14:57:42 +02004705 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004706 u8 op_mod[0x10];
4707
Matan Barakb4ff3a32016-02-09 14:57:42 +02004708 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004709 u8 dctn[0x18];
4710
Matan Barakb4ff3a32016-02-09 14:57:42 +02004711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004712};
4713
4714struct mlx5_ifc_query_cq_out_bits {
4715 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004716 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004717
4718 u8 syndrome[0x20];
4719
Matan Barakb4ff3a32016-02-09 14:57:42 +02004720 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004721
4722 struct mlx5_ifc_cqc_bits cq_context;
4723
Matan Barakb4ff3a32016-02-09 14:57:42 +02004724 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004725
4726 u8 pas[0][0x40];
4727};
4728
4729struct mlx5_ifc_query_cq_in_bits {
4730 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004731 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004732
Matan Barakb4ff3a32016-02-09 14:57:42 +02004733 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004734 u8 op_mod[0x10];
4735
Matan Barakb4ff3a32016-02-09 14:57:42 +02004736 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004737 u8 cqn[0x18];
4738
Matan Barakb4ff3a32016-02-09 14:57:42 +02004739 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004740};
4741
4742struct mlx5_ifc_query_cong_status_out_bits {
4743 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004744 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004745
4746 u8 syndrome[0x20];
4747
Matan Barakb4ff3a32016-02-09 14:57:42 +02004748 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004749
4750 u8 enable[0x1];
4751 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004752 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004753};
4754
4755struct mlx5_ifc_query_cong_status_in_bits {
4756 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004757 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004758
Matan Barakb4ff3a32016-02-09 14:57:42 +02004759 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004760 u8 op_mod[0x10];
4761
Matan Barakb4ff3a32016-02-09 14:57:42 +02004762 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004763 u8 priority[0x4];
4764 u8 cong_protocol[0x4];
4765
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767};
4768
4769struct mlx5_ifc_query_cong_statistics_out_bits {
4770 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004771 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004772
4773 u8 syndrome[0x20];
4774
Matan Barakb4ff3a32016-02-09 14:57:42 +02004775 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776
Parav Pandite1f24a72017-04-16 07:29:29 +03004777 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004778
4779 u8 sum_flows[0x20];
4780
Parav Pandite1f24a72017-04-16 07:29:29 +03004781 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
Parav Pandite1f24a72017-04-16 07:29:29 +03004783 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784
Parav Pandite1f24a72017-04-16 07:29:29 +03004785 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004786
Parav Pandite1f24a72017-04-16 07:29:29 +03004787 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788
Matan Barakb4ff3a32016-02-09 14:57:42 +02004789 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790
4791 u8 time_stamp_high[0x20];
4792
4793 u8 time_stamp_low[0x20];
4794
4795 u8 accumulators_period[0x20];
4796
Parav Pandite1f24a72017-04-16 07:29:29 +03004797 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798
Parav Pandite1f24a72017-04-16 07:29:29 +03004799 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800
Parav Pandite1f24a72017-04-16 07:29:29 +03004801 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802
Parav Pandite1f24a72017-04-16 07:29:29 +03004803 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004804
Matan Barakb4ff3a32016-02-09 14:57:42 +02004805 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004806};
4807
4808struct mlx5_ifc_query_cong_statistics_in_bits {
4809 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811
Matan Barakb4ff3a32016-02-09 14:57:42 +02004812 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004813 u8 op_mod[0x10];
4814
4815 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004816 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819};
4820
4821struct mlx5_ifc_query_cong_params_out_bits {
4822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004824
4825 u8 syndrome[0x20];
4826
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
4829 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4830};
4831
4832struct mlx5_ifc_query_cong_params_in_bits {
4833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837 u8 op_mod[0x10];
4838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840 u8 cong_protocol[0x4];
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843};
4844
4845struct mlx5_ifc_query_adapter_out_bits {
4846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
4849 u8 syndrome[0x20];
4850
Matan Barakb4ff3a32016-02-09 14:57:42 +02004851 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
4853 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4854};
4855
4856struct mlx5_ifc_query_adapter_in_bits {
4857 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004858 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861 u8 op_mod[0x10];
4862
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864};
4865
4866struct mlx5_ifc_qp_2rst_out_bits {
4867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
4870 u8 syndrome[0x20];
4871
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873};
4874
4875struct mlx5_ifc_qp_2rst_in_bits {
4876 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880 u8 op_mod[0x10];
4881
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883 u8 qpn[0x18];
4884
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886};
4887
4888struct mlx5_ifc_qp_2err_out_bits {
4889 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004890 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891
4892 u8 syndrome[0x20];
4893
Matan Barakb4ff3a32016-02-09 14:57:42 +02004894 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004895};
4896
4897struct mlx5_ifc_qp_2err_in_bits {
4898 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902 u8 op_mod[0x10];
4903
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905 u8 qpn[0x18];
4906
Matan Barakb4ff3a32016-02-09 14:57:42 +02004907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908};
4909
4910struct mlx5_ifc_page_fault_resume_out_bits {
4911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913
4914 u8 syndrome[0x20];
4915
Matan Barakb4ff3a32016-02-09 14:57:42 +02004916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917};
4918
4919struct mlx5_ifc_page_fault_resume_in_bits {
4920 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
Matan Barakb4ff3a32016-02-09 14:57:42 +02004923 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924 u8 op_mod[0x10];
4925
4926 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004928 u8 page_fault_type[0x3];
4929 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004931 u8 reserved_at_60[0x8];
4932 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933};
4934
4935struct mlx5_ifc_nop_out_bits {
4936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938
4939 u8 syndrome[0x20];
4940
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942};
4943
4944struct mlx5_ifc_nop_in_bits {
4945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947
Matan Barakb4ff3a32016-02-09 14:57:42 +02004948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949 u8 op_mod[0x10];
4950
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952};
4953
4954struct mlx5_ifc_modify_vport_state_out_bits {
4955 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957
4958 u8 syndrome[0x20];
4959
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961};
4962
4963struct mlx5_ifc_modify_vport_state_in_bits {
4964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968 u8 op_mod[0x10];
4969
4970 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972 u8 vport_number[0x10];
4973
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977};
4978
4979struct mlx5_ifc_modify_tis_out_bits {
4980 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004981 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004982
4983 u8 syndrome[0x20];
4984
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986};
4987
majd@mellanox.com75850d02016-01-14 19:13:06 +02004988struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004989 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004990
Aviv Heller84df61e2016-05-10 13:47:50 +03004991 u8 reserved_at_20[0x1d];
4992 u8 lag_tx_port_affinity[0x1];
4993 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004994 u8 prio[0x1];
4995};
4996
Saeed Mahameede2816822015-05-28 22:28:40 +03004997struct mlx5_ifc_modify_tis_in_bits {
4998 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002 u8 op_mod[0x10];
5003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005 u8 tisn[0x18];
5006
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008
majd@mellanox.com75850d02016-01-14 19:13:06 +02005009 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012
5013 struct mlx5_ifc_tisc_bits ctx;
5014};
5015
Achiad Shochatd9eea402015-08-04 14:05:42 +03005016struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005020 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005021 u8 reserved_at_3c[0x1];
5022 u8 hash[0x1];
5023 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005024 u8 lro[0x1];
5025};
5026
Saeed Mahameede2816822015-05-28 22:28:40 +03005027struct mlx5_ifc_modify_tir_out_bits {
5028 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005029 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
5031 u8 syndrome[0x20];
5032
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034};
5035
5036struct mlx5_ifc_modify_tir_in_bits {
5037 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041 u8 op_mod[0x10];
5042
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044 u8 tirn[0x18];
5045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047
Achiad Shochatd9eea402015-08-04 14:05:42 +03005048 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005049
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051
5052 struct mlx5_ifc_tirc_bits ctx;
5053};
5054
5055struct mlx5_ifc_modify_sq_out_bits {
5056 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058
5059 u8 syndrome[0x20];
5060
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062};
5063
5064struct mlx5_ifc_modify_sq_in_bits {
5065 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005066 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005067
Matan Barakb4ff3a32016-02-09 14:57:42 +02005068 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005069 u8 op_mod[0x10];
5070
5071 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073 u8 sqn[0x18];
5074
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076
5077 u8 modify_bitmask[0x40];
5078
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080
5081 struct mlx5_ifc_sqc_bits ctx;
5082};
5083
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005084struct mlx5_ifc_modify_scheduling_element_out_bits {
5085 u8 status[0x8];
5086 u8 reserved_at_8[0x18];
5087
5088 u8 syndrome[0x20];
5089
5090 u8 reserved_at_40[0x1c0];
5091};
5092
5093enum {
5094 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5095 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5096};
5097
5098struct mlx5_ifc_modify_scheduling_element_in_bits {
5099 u8 opcode[0x10];
5100 u8 reserved_at_10[0x10];
5101
5102 u8 reserved_at_20[0x10];
5103 u8 op_mod[0x10];
5104
5105 u8 scheduling_hierarchy[0x8];
5106 u8 reserved_at_48[0x18];
5107
5108 u8 scheduling_element_id[0x20];
5109
5110 u8 reserved_at_80[0x20];
5111
5112 u8 modify_bitmask[0x20];
5113
5114 u8 reserved_at_c0[0x40];
5115
5116 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5117
5118 u8 reserved_at_300[0x100];
5119};
5120
Saeed Mahameede2816822015-05-28 22:28:40 +03005121struct mlx5_ifc_modify_rqt_out_bits {
5122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124
5125 u8 syndrome[0x20];
5126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128};
5129
Achiad Shochat5c503682015-08-04 14:05:43 +03005130struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005131 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005132
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005134 u8 rqn_list[0x1];
5135};
5136
Saeed Mahameede2816822015-05-28 22:28:40 +03005137struct mlx5_ifc_modify_rqt_in_bits {
5138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142 u8 op_mod[0x10];
5143
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145 u8 rqtn[0x18];
5146
Matan Barakb4ff3a32016-02-09 14:57:42 +02005147 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005148
Achiad Shochat5c503682015-08-04 14:05:43 +03005149 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152
5153 struct mlx5_ifc_rqtc_bits ctx;
5154};
5155
5156struct mlx5_ifc_modify_rq_out_bits {
5157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159
5160 u8 syndrome[0x20];
5161
Matan Barakb4ff3a32016-02-09 14:57:42 +02005162 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005163};
5164
Alex Vesker83b502a2016-08-04 17:32:02 +03005165enum {
5166 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005167 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005168 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005169};
5170
Saeed Mahameede2816822015-05-28 22:28:40 +03005171struct mlx5_ifc_modify_rq_in_bits {
5172 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
Matan Barakb4ff3a32016-02-09 14:57:42 +02005175 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005176 u8 op_mod[0x10];
5177
5178 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005180 u8 rqn[0x18];
5181
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183
5184 u8 modify_bitmask[0x40];
5185
Matan Barakb4ff3a32016-02-09 14:57:42 +02005186 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005187
5188 struct mlx5_ifc_rqc_bits ctx;
5189};
5190
5191struct mlx5_ifc_modify_rmp_out_bits {
5192 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194
5195 u8 syndrome[0x20];
5196
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198};
5199
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005200struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005204 u8 lwm[0x1];
5205};
5206
Saeed Mahameede2816822015-05-28 22:28:40 +03005207struct mlx5_ifc_modify_rmp_in_bits {
5208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212 u8 op_mod[0x10];
5213
5214 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216 u8 rmpn[0x18];
5217
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005220 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005221
Matan Barakb4ff3a32016-02-09 14:57:42 +02005222 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005223
5224 struct mlx5_ifc_rmpc_bits ctx;
5225};
5226
5227struct mlx5_ifc_modify_nic_vport_context_out_bits {
5228 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230
5231 u8 syndrome[0x20];
5232
Matan Barakb4ff3a32016-02-09 14:57:42 +02005233 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005234};
5235
5236struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005237 u8 reserved_at_0[0x14];
5238 u8 disable_uc_local_lb[0x1];
5239 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005240 u8 node_guid[0x1];
5241 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005242 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005243 u8 mtu[0x1];
5244 u8 change_event[0x1];
5245 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246 u8 permanent_address[0x1];
5247 u8 addresses_list[0x1];
5248 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250};
5251
5252struct mlx5_ifc_modify_nic_vport_context_in_bits {
5253 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257 u8 op_mod[0x10];
5258
5259 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005260 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005261 u8 vport_number[0x10];
5262
5263 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266
5267 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5268};
5269
5270struct mlx5_ifc_modify_hca_vport_context_out_bits {
5271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273
5274 u8 syndrome[0x20];
5275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277};
5278
5279struct mlx5_ifc_modify_hca_vport_context_in_bits {
5280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284 u8 op_mod[0x10];
5285
5286 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005287 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005288 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289 u8 vport_number[0x10];
5290
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292
5293 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5294};
5295
5296struct mlx5_ifc_modify_cq_out_bits {
5297 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005299
5300 u8 syndrome[0x20];
5301
Matan Barakb4ff3a32016-02-09 14:57:42 +02005302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005303};
5304
5305enum {
5306 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5307 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5308};
5309
5310struct mlx5_ifc_modify_cq_in_bits {
5311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315 u8 op_mod[0x10];
5316
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318 u8 cqn[0x18];
5319
5320 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5321
5322 struct mlx5_ifc_cqc_bits cq_context;
5323
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
5326 u8 pas[0][0x40];
5327};
5328
5329struct mlx5_ifc_modify_cong_status_out_bits {
5330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332
5333 u8 syndrome[0x20];
5334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336};
5337
5338struct mlx5_ifc_modify_cong_status_in_bits {
5339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005341
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343 u8 op_mod[0x10];
5344
Matan Barakb4ff3a32016-02-09 14:57:42 +02005345 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005346 u8 priority[0x4];
5347 u8 cong_protocol[0x4];
5348
5349 u8 enable[0x1];
5350 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352};
5353
5354struct mlx5_ifc_modify_cong_params_out_bits {
5355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
5358 u8 syndrome[0x20];
5359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361};
5362
5363struct mlx5_ifc_modify_cong_params_in_bits {
5364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368 u8 op_mod[0x10];
5369
Matan Barakb4ff3a32016-02-09 14:57:42 +02005370 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005371 u8 cong_protocol[0x4];
5372
5373 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5374
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
5377 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5378};
5379
5380struct mlx5_ifc_manage_pages_out_bits {
5381 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383
5384 u8 syndrome[0x20];
5385
5386 u8 output_num_entries[0x20];
5387
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389
5390 u8 pas[0][0x40];
5391};
5392
5393enum {
5394 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5395 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5396 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5397};
5398
5399struct mlx5_ifc_manage_pages_in_bits {
5400 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
Matan Barakb4ff3a32016-02-09 14:57:42 +02005403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005404 u8 op_mod[0x10];
5405
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407 u8 function_id[0x10];
5408
5409 u8 input_num_entries[0x20];
5410
5411 u8 pas[0][0x40];
5412};
5413
5414struct mlx5_ifc_mad_ifc_out_bits {
5415 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417
5418 u8 syndrome[0x20];
5419
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421
5422 u8 response_mad_packet[256][0x8];
5423};
5424
5425struct mlx5_ifc_mad_ifc_in_bits {
5426 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430 u8 op_mod[0x10];
5431
5432 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005433 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005434 u8 port[0x8];
5435
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437
5438 u8 mad[256][0x8];
5439};
5440
5441struct mlx5_ifc_init_hca_out_bits {
5442 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444
5445 u8 syndrome[0x20];
5446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448};
5449
5450struct mlx5_ifc_init_hca_in_bits {
5451 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
Matan Barakb4ff3a32016-02-09 14:57:42 +02005454 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005455 u8 op_mod[0x10];
5456
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458};
5459
5460struct mlx5_ifc_init2rtr_qp_out_bits {
5461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005462 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005463
5464 u8 syndrome[0x20];
5465
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467};
5468
5469struct mlx5_ifc_init2rtr_qp_in_bits {
5470 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005471 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474 u8 op_mod[0x10];
5475
Matan Barakb4ff3a32016-02-09 14:57:42 +02005476 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005477 u8 qpn[0x18];
5478
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480
5481 u8 opt_param_mask[0x20];
5482
Matan Barakb4ff3a32016-02-09 14:57:42 +02005483 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005484
5485 struct mlx5_ifc_qpc_bits qpc;
5486
Matan Barakb4ff3a32016-02-09 14:57:42 +02005487 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005488};
5489
5490struct mlx5_ifc_init2init_qp_out_bits {
5491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493
5494 u8 syndrome[0x20];
5495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497};
5498
5499struct mlx5_ifc_init2init_qp_in_bits {
5500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005502
Matan Barakb4ff3a32016-02-09 14:57:42 +02005503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005504 u8 op_mod[0x10];
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507 u8 qpn[0x18];
5508
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
5511 u8 opt_param_mask[0x20];
5512
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514
5515 struct mlx5_ifc_qpc_bits qpc;
5516
Matan Barakb4ff3a32016-02-09 14:57:42 +02005517 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005518};
5519
5520struct mlx5_ifc_get_dropped_packet_log_out_bits {
5521 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523
5524 u8 syndrome[0x20];
5525
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527
5528 u8 packet_headers_log[128][0x8];
5529
5530 u8 packet_syndrome[64][0x8];
5531};
5532
5533struct mlx5_ifc_get_dropped_packet_log_in_bits {
5534 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538 u8 op_mod[0x10];
5539
Matan Barakb4ff3a32016-02-09 14:57:42 +02005540 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005541};
5542
5543struct mlx5_ifc_gen_eqe_in_bits {
5544 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005546
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548 u8 op_mod[0x10];
5549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551 u8 eq_number[0x8];
5552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
5555 u8 eqe[64][0x8];
5556};
5557
5558struct mlx5_ifc_gen_eq_out_bits {
5559 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561
5562 u8 syndrome[0x20];
5563
Matan Barakb4ff3a32016-02-09 14:57:42 +02005564 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005565};
5566
5567struct mlx5_ifc_enable_hca_out_bits {
5568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
5571 u8 syndrome[0x20];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574};
5575
5576struct mlx5_ifc_enable_hca_in_bits {
5577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 op_mod[0x10];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584 u8 function_id[0x10];
5585
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587};
5588
5589struct mlx5_ifc_drain_dct_out_bits {
5590 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005591 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592
5593 u8 syndrome[0x20];
5594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596};
5597
5598struct mlx5_ifc_drain_dct_in_bits {
5599 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601
Matan Barakb4ff3a32016-02-09 14:57:42 +02005602 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005603 u8 op_mod[0x10];
5604
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606 u8 dctn[0x18];
5607
Matan Barakb4ff3a32016-02-09 14:57:42 +02005608 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005609};
5610
5611struct mlx5_ifc_disable_hca_out_bits {
5612 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614
5615 u8 syndrome[0x20];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618};
5619
5620struct mlx5_ifc_disable_hca_in_bits {
5621 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005622 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005623
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625 u8 op_mod[0x10];
5626
Matan Barakb4ff3a32016-02-09 14:57:42 +02005627 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005628 u8 function_id[0x10];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631};
5632
5633struct mlx5_ifc_detach_from_mcg_out_bits {
5634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636
5637 u8 syndrome[0x20];
5638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640};
5641
5642struct mlx5_ifc_detach_from_mcg_in_bits {
5643 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645
Matan Barakb4ff3a32016-02-09 14:57:42 +02005646 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005647 u8 op_mod[0x10];
5648
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650 u8 qpn[0x18];
5651
Matan Barakb4ff3a32016-02-09 14:57:42 +02005652 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005653
5654 u8 multicast_gid[16][0x8];
5655};
5656
Saeed Mahameed74862162016-06-09 15:11:34 +03005657struct mlx5_ifc_destroy_xrq_out_bits {
5658 u8 status[0x8];
5659 u8 reserved_at_8[0x18];
5660
5661 u8 syndrome[0x20];
5662
5663 u8 reserved_at_40[0x40];
5664};
5665
5666struct mlx5_ifc_destroy_xrq_in_bits {
5667 u8 opcode[0x10];
5668 u8 reserved_at_10[0x10];
5669
5670 u8 reserved_at_20[0x10];
5671 u8 op_mod[0x10];
5672
5673 u8 reserved_at_40[0x8];
5674 u8 xrqn[0x18];
5675
5676 u8 reserved_at_60[0x20];
5677};
5678
Saeed Mahameede2816822015-05-28 22:28:40 +03005679struct mlx5_ifc_destroy_xrc_srq_out_bits {
5680 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682
5683 u8 syndrome[0x20];
5684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686};
5687
5688struct mlx5_ifc_destroy_xrc_srq_in_bits {
5689 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005690 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005691
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693 u8 op_mod[0x10];
5694
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696 u8 xrc_srqn[0x18];
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699};
5700
5701struct mlx5_ifc_destroy_tis_out_bits {
5702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704
5705 u8 syndrome[0x20];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708};
5709
5710struct mlx5_ifc_destroy_tis_in_bits {
5711 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715 u8 op_mod[0x10];
5716
Matan Barakb4ff3a32016-02-09 14:57:42 +02005717 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005718 u8 tisn[0x18];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721};
5722
5723struct mlx5_ifc_destroy_tir_out_bits {
5724 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726
5727 u8 syndrome[0x20];
5728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730};
5731
5732struct mlx5_ifc_destroy_tir_in_bits {
5733 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735
Matan Barakb4ff3a32016-02-09 14:57:42 +02005736 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005737 u8 op_mod[0x10];
5738
Matan Barakb4ff3a32016-02-09 14:57:42 +02005739 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005740 u8 tirn[0x18];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743};
5744
5745struct mlx5_ifc_destroy_srq_out_bits {
5746 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748
5749 u8 syndrome[0x20];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752};
5753
5754struct mlx5_ifc_destroy_srq_in_bits {
5755 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759 u8 op_mod[0x10];
5760
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762 u8 srqn[0x18];
5763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765};
5766
5767struct mlx5_ifc_destroy_sq_out_bits {
5768 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770
5771 u8 syndrome[0x20];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774};
5775
5776struct mlx5_ifc_destroy_sq_in_bits {
5777 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781 u8 op_mod[0x10];
5782
Matan Barakb4ff3a32016-02-09 14:57:42 +02005783 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005784 u8 sqn[0x18];
5785
Matan Barakb4ff3a32016-02-09 14:57:42 +02005786 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005787};
5788
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005789struct mlx5_ifc_destroy_scheduling_element_out_bits {
5790 u8 status[0x8];
5791 u8 reserved_at_8[0x18];
5792
5793 u8 syndrome[0x20];
5794
5795 u8 reserved_at_40[0x1c0];
5796};
5797
5798struct mlx5_ifc_destroy_scheduling_element_in_bits {
5799 u8 opcode[0x10];
5800 u8 reserved_at_10[0x10];
5801
5802 u8 reserved_at_20[0x10];
5803 u8 op_mod[0x10];
5804
5805 u8 scheduling_hierarchy[0x8];
5806 u8 reserved_at_48[0x18];
5807
5808 u8 scheduling_element_id[0x20];
5809
5810 u8 reserved_at_80[0x180];
5811};
5812
Saeed Mahameede2816822015-05-28 22:28:40 +03005813struct mlx5_ifc_destroy_rqt_out_bits {
5814 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816
5817 u8 syndrome[0x20];
5818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820};
5821
5822struct mlx5_ifc_destroy_rqt_in_bits {
5823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827 u8 op_mod[0x10];
5828
Matan Barakb4ff3a32016-02-09 14:57:42 +02005829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005830 u8 rqtn[0x18];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833};
5834
5835struct mlx5_ifc_destroy_rq_out_bits {
5836 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838
5839 u8 syndrome[0x20];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842};
5843
5844struct mlx5_ifc_destroy_rq_in_bits {
5845 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849 u8 op_mod[0x10];
5850
Matan Barakb4ff3a32016-02-09 14:57:42 +02005851 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005852 u8 rqn[0x18];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855};
5856
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005857struct mlx5_ifc_set_delay_drop_params_in_bits {
5858 u8 opcode[0x10];
5859 u8 reserved_at_10[0x10];
5860
5861 u8 reserved_at_20[0x10];
5862 u8 op_mod[0x10];
5863
5864 u8 reserved_at_40[0x20];
5865
5866 u8 reserved_at_60[0x10];
5867 u8 delay_drop_timeout[0x10];
5868};
5869
5870struct mlx5_ifc_set_delay_drop_params_out_bits {
5871 u8 status[0x8];
5872 u8 reserved_at_8[0x18];
5873
5874 u8 syndrome[0x20];
5875
5876 u8 reserved_at_40[0x40];
5877};
5878
Saeed Mahameede2816822015-05-28 22:28:40 +03005879struct mlx5_ifc_destroy_rmp_out_bits {
5880 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
5883 u8 syndrome[0x20];
5884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886};
5887
5888struct mlx5_ifc_destroy_rmp_in_bits {
5889 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891
Matan Barakb4ff3a32016-02-09 14:57:42 +02005892 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005893 u8 op_mod[0x10];
5894
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896 u8 rmpn[0x18];
5897
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899};
5900
5901struct mlx5_ifc_destroy_qp_out_bits {
5902 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904
5905 u8 syndrome[0x20];
5906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908};
5909
5910struct mlx5_ifc_destroy_qp_in_bits {
5911 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915 u8 op_mod[0x10];
5916
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918 u8 qpn[0x18];
5919
Matan Barakb4ff3a32016-02-09 14:57:42 +02005920 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921};
5922
5923struct mlx5_ifc_destroy_psv_out_bits {
5924 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926
5927 u8 syndrome[0x20];
5928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930};
5931
5932struct mlx5_ifc_destroy_psv_in_bits {
5933 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935
Matan Barakb4ff3a32016-02-09 14:57:42 +02005936 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005937 u8 op_mod[0x10];
5938
Matan Barakb4ff3a32016-02-09 14:57:42 +02005939 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005940 u8 psvn[0x18];
5941
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943};
5944
5945struct mlx5_ifc_destroy_mkey_out_bits {
5946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948
5949 u8 syndrome[0x20];
5950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952};
5953
5954struct mlx5_ifc_destroy_mkey_in_bits {
5955 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959 u8 op_mod[0x10];
5960
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962 u8 mkey_index[0x18];
5963
Matan Barakb4ff3a32016-02-09 14:57:42 +02005964 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005965};
5966
5967struct mlx5_ifc_destroy_flow_table_out_bits {
5968 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005969 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005970
5971 u8 syndrome[0x20];
5972
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974};
5975
5976struct mlx5_ifc_destroy_flow_table_in_bits {
5977 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981 u8 op_mod[0x10];
5982
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005983 u8 other_vport[0x1];
5984 u8 reserved_at_41[0xf];
5985 u8 vport_number[0x10];
5986
5987 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988
5989 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993 u8 table_id[0x18];
5994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996};
5997
5998struct mlx5_ifc_destroy_flow_group_out_bits {
5999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001
6002 u8 syndrome[0x20];
6003
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005};
6006
6007struct mlx5_ifc_destroy_flow_group_in_bits {
6008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012 u8 op_mod[0x10];
6013
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006014 u8 other_vport[0x1];
6015 u8 reserved_at_41[0xf];
6016 u8 vport_number[0x10];
6017
6018 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019
6020 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006021 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006022
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024 u8 table_id[0x18];
6025
6026 u8 group_id[0x20];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029};
6030
6031struct mlx5_ifc_destroy_eq_out_bits {
6032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034
6035 u8 syndrome[0x20];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038};
6039
6040struct mlx5_ifc_destroy_eq_in_bits {
6041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045 u8 op_mod[0x10];
6046
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048 u8 eq_number[0x8];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_destroy_dct_out_bits {
6054 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
6057 u8 syndrome[0x20];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060};
6061
6062struct mlx5_ifc_destroy_dct_in_bits {
6063 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067 u8 op_mod[0x10];
6068
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070 u8 dctn[0x18];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_destroy_cq_out_bits {
6076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
6079 u8 syndrome[0x20];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082};
6083
6084struct mlx5_ifc_destroy_cq_in_bits {
6085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089 u8 op_mod[0x10];
6090
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092 u8 cqn[0x18];
6093
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095};
6096
6097struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100
6101 u8 syndrome[0x20];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104};
6105
6106struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111 u8 op_mod[0x10];
6112
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 vxlan_udp_port[0x10];
6117};
6118
6119struct mlx5_ifc_delete_l2_table_entry_out_bits {
6120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
6123 u8 syndrome[0x20];
6124
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126};
6127
6128struct mlx5_ifc_delete_l2_table_entry_in_bits {
6129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133 u8 op_mod[0x10];
6134
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138 u8 table_index[0x18];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141};
6142
6143struct mlx5_ifc_delete_fte_out_bits {
6144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
6147 u8 syndrome[0x20];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_delete_fte_in_bits {
6153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157 u8 op_mod[0x10];
6158
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006159 u8 other_vport[0x1];
6160 u8 reserved_at_41[0xf];
6161 u8 vport_number[0x10];
6162
6163 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
6165 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 table_id[0x18];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172
6173 u8 flow_index[0x20];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_dealloc_xrcd_out_bits {
6179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
6182 u8 syndrome[0x20];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185};
6186
6187struct mlx5_ifc_dealloc_xrcd_in_bits {
6188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192 u8 op_mod[0x10];
6193
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195 u8 xrcd[0x18];
6196
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198};
6199
6200struct mlx5_ifc_dealloc_uar_out_bits {
6201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203
6204 u8 syndrome[0x20];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_dealloc_uar_in_bits {
6210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 op_mod[0x10];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217 u8 uar[0x18];
6218
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220};
6221
6222struct mlx5_ifc_dealloc_transport_domain_out_bits {
6223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225
6226 u8 syndrome[0x20];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229};
6230
6231struct mlx5_ifc_dealloc_transport_domain_in_bits {
6232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236 u8 op_mod[0x10];
6237
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239 u8 transport_domain[0x18];
6240
Matan Barakb4ff3a32016-02-09 14:57:42 +02006241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006242};
6243
6244struct mlx5_ifc_dealloc_q_counter_out_bits {
6245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247
6248 u8 syndrome[0x20];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251};
6252
6253struct mlx5_ifc_dealloc_q_counter_in_bits {
6254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258 u8 op_mod[0x10];
6259
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261 u8 counter_set_id[0x8];
6262
Matan Barakb4ff3a32016-02-09 14:57:42 +02006263 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006264};
6265
6266struct mlx5_ifc_dealloc_pd_out_bits {
6267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269
6270 u8 syndrome[0x20];
6271
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273};
6274
6275struct mlx5_ifc_dealloc_pd_in_bits {
6276 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280 u8 op_mod[0x10];
6281
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283 u8 pd[0x18];
6284
Matan Barakb4ff3a32016-02-09 14:57:42 +02006285 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006286};
6287
Amir Vadai9dc0b282016-05-13 12:55:39 +00006288struct mlx5_ifc_dealloc_flow_counter_out_bits {
6289 u8 status[0x8];
6290 u8 reserved_at_8[0x18];
6291
6292 u8 syndrome[0x20];
6293
6294 u8 reserved_at_40[0x40];
6295};
6296
6297struct mlx5_ifc_dealloc_flow_counter_in_bits {
6298 u8 opcode[0x10];
6299 u8 reserved_at_10[0x10];
6300
6301 u8 reserved_at_20[0x10];
6302 u8 op_mod[0x10];
6303
6304 u8 reserved_at_40[0x10];
6305 u8 flow_counter_id[0x10];
6306
6307 u8 reserved_at_60[0x20];
6308};
6309
Saeed Mahameed74862162016-06-09 15:11:34 +03006310struct mlx5_ifc_create_xrq_out_bits {
6311 u8 status[0x8];
6312 u8 reserved_at_8[0x18];
6313
6314 u8 syndrome[0x20];
6315
6316 u8 reserved_at_40[0x8];
6317 u8 xrqn[0x18];
6318
6319 u8 reserved_at_60[0x20];
6320};
6321
6322struct mlx5_ifc_create_xrq_in_bits {
6323 u8 opcode[0x10];
6324 u8 reserved_at_10[0x10];
6325
6326 u8 reserved_at_20[0x10];
6327 u8 op_mod[0x10];
6328
6329 u8 reserved_at_40[0x40];
6330
6331 struct mlx5_ifc_xrqc_bits xrq_context;
6332};
6333
Saeed Mahameede2816822015-05-28 22:28:40 +03006334struct mlx5_ifc_create_xrc_srq_out_bits {
6335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337
6338 u8 syndrome[0x20];
6339
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341 u8 xrc_srqn[0x18];
6342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344};
6345
6346struct mlx5_ifc_create_xrc_srq_in_bits {
6347 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351 u8 op_mod[0x10];
6352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354
6355 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6356
Matan Barakb4ff3a32016-02-09 14:57:42 +02006357 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006358
6359 u8 pas[0][0x40];
6360};
6361
6362struct mlx5_ifc_create_tis_out_bits {
6363 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006364 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006365
6366 u8 syndrome[0x20];
6367
Matan Barakb4ff3a32016-02-09 14:57:42 +02006368 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006369 u8 tisn[0x18];
6370
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372};
6373
6374struct mlx5_ifc_create_tis_in_bits {
6375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379 u8 op_mod[0x10];
6380
Matan Barakb4ff3a32016-02-09 14:57:42 +02006381 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006382
6383 struct mlx5_ifc_tisc_bits ctx;
6384};
6385
6386struct mlx5_ifc_create_tir_out_bits {
6387 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006388 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006389
6390 u8 syndrome[0x20];
6391
Matan Barakb4ff3a32016-02-09 14:57:42 +02006392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393 u8 tirn[0x18];
6394
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396};
6397
6398struct mlx5_ifc_create_tir_in_bits {
6399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403 u8 op_mod[0x10];
6404
Matan Barakb4ff3a32016-02-09 14:57:42 +02006405 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006406
6407 struct mlx5_ifc_tirc_bits ctx;
6408};
6409
6410struct mlx5_ifc_create_srq_out_bits {
6411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413
6414 u8 syndrome[0x20];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417 u8 srqn[0x18];
6418
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420};
6421
6422struct mlx5_ifc_create_srq_in_bits {
6423 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427 u8 op_mod[0x10];
6428
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430
6431 struct mlx5_ifc_srqc_bits srq_context_entry;
6432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
6435 u8 pas[0][0x40];
6436};
6437
6438struct mlx5_ifc_create_sq_out_bits {
6439 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441
6442 u8 syndrome[0x20];
6443
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445 u8 sqn[0x18];
6446
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448};
6449
6450struct mlx5_ifc_create_sq_in_bits {
6451 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453
Matan Barakb4ff3a32016-02-09 14:57:42 +02006454 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006455 u8 op_mod[0x10];
6456
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458
6459 struct mlx5_ifc_sqc_bits ctx;
6460};
6461
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006462struct mlx5_ifc_create_scheduling_element_out_bits {
6463 u8 status[0x8];
6464 u8 reserved_at_8[0x18];
6465
6466 u8 syndrome[0x20];
6467
6468 u8 reserved_at_40[0x40];
6469
6470 u8 scheduling_element_id[0x20];
6471
6472 u8 reserved_at_a0[0x160];
6473};
6474
6475struct mlx5_ifc_create_scheduling_element_in_bits {
6476 u8 opcode[0x10];
6477 u8 reserved_at_10[0x10];
6478
6479 u8 reserved_at_20[0x10];
6480 u8 op_mod[0x10];
6481
6482 u8 scheduling_hierarchy[0x8];
6483 u8 reserved_at_48[0x18];
6484
6485 u8 reserved_at_60[0xa0];
6486
6487 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6488
6489 u8 reserved_at_300[0x100];
6490};
6491
Saeed Mahameede2816822015-05-28 22:28:40 +03006492struct mlx5_ifc_create_rqt_out_bits {
6493 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495
6496 u8 syndrome[0x20];
6497
Matan Barakb4ff3a32016-02-09 14:57:42 +02006498 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006499 u8 rqtn[0x18];
6500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502};
6503
6504struct mlx5_ifc_create_rqt_in_bits {
6505 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509 u8 op_mod[0x10];
6510
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512
6513 struct mlx5_ifc_rqtc_bits rqt_context;
6514};
6515
6516struct mlx5_ifc_create_rq_out_bits {
6517 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006518 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006519
6520 u8 syndrome[0x20];
6521
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523 u8 rqn[0x18];
6524
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006526};
6527
6528struct mlx5_ifc_create_rq_in_bits {
6529 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531
Matan Barakb4ff3a32016-02-09 14:57:42 +02006532 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006533 u8 op_mod[0x10];
6534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536
6537 struct mlx5_ifc_rqc_bits ctx;
6538};
6539
6540struct mlx5_ifc_create_rmp_out_bits {
6541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006543
6544 u8 syndrome[0x20];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547 u8 rmpn[0x18];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550};
6551
6552struct mlx5_ifc_create_rmp_in_bits {
6553 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557 u8 op_mod[0x10];
6558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560
6561 struct mlx5_ifc_rmpc_bits ctx;
6562};
6563
6564struct mlx5_ifc_create_qp_out_bits {
6565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 syndrome[0x20];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571 u8 qpn[0x18];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574};
6575
6576struct mlx5_ifc_create_qp_in_bits {
6577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 op_mod[0x10];
6582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584
6585 u8 opt_param_mask[0x20];
6586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 struct mlx5_ifc_qpc_bits qpc;
6590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592
6593 u8 pas[0][0x40];
6594};
6595
6596struct mlx5_ifc_create_psv_out_bits {
6597 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599
6600 u8 syndrome[0x20];
6601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605 u8 psv0_index[0x18];
6606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608 u8 psv1_index[0x18];
6609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611 u8 psv2_index[0x18];
6612
Matan Barakb4ff3a32016-02-09 14:57:42 +02006613 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006614 u8 psv3_index[0x18];
6615};
6616
6617struct mlx5_ifc_create_psv_in_bits {
6618 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006619 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006620
Matan Barakb4ff3a32016-02-09 14:57:42 +02006621 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006622 u8 op_mod[0x10];
6623
6624 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626 u8 pd[0x18];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629};
6630
6631struct mlx5_ifc_create_mkey_out_bits {
6632 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006633 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006634
6635 u8 syndrome[0x20];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638 u8 mkey_index[0x18];
6639
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641};
6642
6643struct mlx5_ifc_create_mkey_in_bits {
6644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648 u8 op_mod[0x10];
6649
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651
6652 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006653 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006654
6655 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 u8 translations_octword_actual_size[0x20];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 u8 klm_pas_mtt[0][0x20];
6664};
6665
6666struct mlx5_ifc_create_flow_table_out_bits {
6667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 u8 syndrome[0x20];
6671
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673 u8 table_id[0x18];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676};
6677
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006678struct mlx5_ifc_flow_table_context_bits {
6679 u8 encap_en[0x1];
6680 u8 decap_en[0x1];
6681 u8 reserved_at_2[0x2];
6682 u8 table_miss_action[0x4];
6683 u8 level[0x8];
6684 u8 reserved_at_10[0x8];
6685 u8 log_size[0x8];
6686
6687 u8 reserved_at_20[0x8];
6688 u8 table_miss_id[0x18];
6689
6690 u8 reserved_at_40[0x8];
6691 u8 lag_master_next_table_id[0x18];
6692
6693 u8 reserved_at_60[0xe0];
6694};
6695
Saeed Mahameede2816822015-05-28 22:28:40 +03006696struct mlx5_ifc_create_flow_table_in_bits {
6697 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701 u8 op_mod[0x10];
6702
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006703 u8 other_vport[0x1];
6704 u8 reserved_at_41[0xf];
6705 u8 vport_number[0x10];
6706
6707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
6709 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006714 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006715};
6716
6717struct mlx5_ifc_create_flow_group_out_bits {
6718 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
6721 u8 syndrome[0x20];
6722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 group_id[0x18];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727};
6728
6729enum {
6730 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6731 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6732 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6733};
6734
6735struct mlx5_ifc_create_flow_group_in_bits {
6736 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006737 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740 u8 op_mod[0x10];
6741
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006742 u8 other_vport[0x1];
6743 u8 reserved_at_41[0xf];
6744 u8 vport_number[0x10];
6745
6746 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006747
6748 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752 u8 table_id[0x18];
6753
Matan Barakb4ff3a32016-02-09 14:57:42 +02006754 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006755
6756 u8 start_flow_index[0x20];
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759
6760 u8 end_flow_index[0x20];
6761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765 u8 match_criteria_enable[0x8];
6766
6767 struct mlx5_ifc_fte_match_param_bits match_criteria;
6768
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770};
6771
6772struct mlx5_ifc_create_eq_out_bits {
6773 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775
6776 u8 syndrome[0x20];
6777
Matan Barakb4ff3a32016-02-09 14:57:42 +02006778 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006779 u8 eq_number[0x8];
6780
Matan Barakb4ff3a32016-02-09 14:57:42 +02006781 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006782};
6783
6784struct mlx5_ifc_create_eq_in_bits {
6785 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789 u8 op_mod[0x10];
6790
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792
6793 struct mlx5_ifc_eqc_bits eq_context_entry;
6794
Matan Barakb4ff3a32016-02-09 14:57:42 +02006795 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006796
6797 u8 event_bitmask[0x40];
6798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
6801 u8 pas[0][0x40];
6802};
6803
6804struct mlx5_ifc_create_dct_out_bits {
6805 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807
6808 u8 syndrome[0x20];
6809
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811 u8 dctn[0x18];
6812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814};
6815
6816struct mlx5_ifc_create_dct_in_bits {
6817 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006818 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821 u8 op_mod[0x10];
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824
6825 struct mlx5_ifc_dctc_bits dct_context_entry;
6826
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828};
6829
6830struct mlx5_ifc_create_cq_out_bits {
6831 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833
6834 u8 syndrome[0x20];
6835
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837 u8 cqn[0x18];
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842struct mlx5_ifc_create_cq_in_bits {
6843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847 u8 op_mod[0x10];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 struct mlx5_ifc_cqc_bits cq_context;
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854
6855 u8 pas[0][0x40];
6856};
6857
6858struct mlx5_ifc_config_int_moderation_out_bits {
6859 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
6862 u8 syndrome[0x20];
6863
Matan Barakb4ff3a32016-02-09 14:57:42 +02006864 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006865 u8 min_delay[0xc];
6866 u8 int_vector[0x10];
6867
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869};
6870
6871enum {
6872 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6873 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6874};
6875
6876struct mlx5_ifc_config_int_moderation_in_bits {
6877 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006878 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881 u8 op_mod[0x10];
6882
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884 u8 min_delay[0xc];
6885 u8 int_vector[0x10];
6886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888};
6889
6890struct mlx5_ifc_attach_to_mcg_out_bits {
6891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893
6894 u8 syndrome[0x20];
6895
Matan Barakb4ff3a32016-02-09 14:57:42 +02006896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006897};
6898
6899struct mlx5_ifc_attach_to_mcg_in_bits {
6900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904 u8 op_mod[0x10];
6905
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907 u8 qpn[0x18];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
6911 u8 multicast_gid[16][0x8];
6912};
6913
Saeed Mahameed74862162016-06-09 15:11:34 +03006914struct mlx5_ifc_arm_xrq_out_bits {
6915 u8 status[0x8];
6916 u8 reserved_at_8[0x18];
6917
6918 u8 syndrome[0x20];
6919
6920 u8 reserved_at_40[0x40];
6921};
6922
6923struct mlx5_ifc_arm_xrq_in_bits {
6924 u8 opcode[0x10];
6925 u8 reserved_at_10[0x10];
6926
6927 u8 reserved_at_20[0x10];
6928 u8 op_mod[0x10];
6929
6930 u8 reserved_at_40[0x8];
6931 u8 xrqn[0x18];
6932
6933 u8 reserved_at_60[0x10];
6934 u8 lwm[0x10];
6935};
6936
Saeed Mahameede2816822015-05-28 22:28:40 +03006937struct mlx5_ifc_arm_xrc_srq_out_bits {
6938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940
6941 u8 syndrome[0x20];
6942
Matan Barakb4ff3a32016-02-09 14:57:42 +02006943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006944};
6945
6946enum {
6947 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6948};
6949
6950struct mlx5_ifc_arm_xrc_srq_in_bits {
6951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955 u8 op_mod[0x10];
6956
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958 u8 xrc_srqn[0x18];
6959
Matan Barakb4ff3a32016-02-09 14:57:42 +02006960 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006961 u8 lwm[0x10];
6962};
6963
6964struct mlx5_ifc_arm_rq_out_bits {
6965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967
6968 u8 syndrome[0x20];
6969
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971};
6972
6973enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006974 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6975 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006976};
6977
6978struct mlx5_ifc_arm_rq_in_bits {
6979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983 u8 op_mod[0x10];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986 u8 srq_number[0x18];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989 u8 lwm[0x10];
6990};
6991
6992struct mlx5_ifc_arm_dct_out_bits {
6993 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995
6996 u8 syndrome[0x20];
6997
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999};
7000
7001struct mlx5_ifc_arm_dct_in_bits {
7002 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006 u8 op_mod[0x10];
7007
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009 u8 dct_number[0x18];
7010
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012};
7013
7014struct mlx5_ifc_alloc_xrcd_out_bits {
7015 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017
7018 u8 syndrome[0x20];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021 u8 xrcd[0x18];
7022
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024};
7025
7026struct mlx5_ifc_alloc_xrcd_in_bits {
7027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 op_mod[0x10];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034};
7035
7036struct mlx5_ifc_alloc_uar_out_bits {
7037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039
7040 u8 syndrome[0x20];
7041
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043 u8 uar[0x18];
7044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046};
7047
7048struct mlx5_ifc_alloc_uar_in_bits {
7049 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053 u8 op_mod[0x10];
7054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056};
7057
7058struct mlx5_ifc_alloc_transport_domain_out_bits {
7059 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061
7062 u8 syndrome[0x20];
7063
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065 u8 transport_domain[0x18];
7066
Matan Barakb4ff3a32016-02-09 14:57:42 +02007067 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007068};
7069
7070struct mlx5_ifc_alloc_transport_domain_in_bits {
7071 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075 u8 op_mod[0x10];
7076
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078};
7079
7080struct mlx5_ifc_alloc_q_counter_out_bits {
7081 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007082 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007083
7084 u8 syndrome[0x20];
7085
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087 u8 counter_set_id[0x8];
7088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090};
7091
7092struct mlx5_ifc_alloc_q_counter_in_bits {
7093 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007094 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097 u8 op_mod[0x10];
7098
Matan Barakb4ff3a32016-02-09 14:57:42 +02007099 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007100};
7101
7102struct mlx5_ifc_alloc_pd_out_bits {
7103 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007104 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007105
7106 u8 syndrome[0x20];
7107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109 u8 pd[0x18];
7110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112};
7113
7114struct mlx5_ifc_alloc_pd_in_bits {
7115 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119 u8 op_mod[0x10];
7120
Matan Barakb4ff3a32016-02-09 14:57:42 +02007121 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007122};
7123
Amir Vadai9dc0b282016-05-13 12:55:39 +00007124struct mlx5_ifc_alloc_flow_counter_out_bits {
7125 u8 status[0x8];
7126 u8 reserved_at_8[0x18];
7127
7128 u8 syndrome[0x20];
7129
7130 u8 reserved_at_40[0x10];
7131 u8 flow_counter_id[0x10];
7132
7133 u8 reserved_at_60[0x20];
7134};
7135
7136struct mlx5_ifc_alloc_flow_counter_in_bits {
7137 u8 opcode[0x10];
7138 u8 reserved_at_10[0x10];
7139
7140 u8 reserved_at_20[0x10];
7141 u8 op_mod[0x10];
7142
7143 u8 reserved_at_40[0x40];
7144};
7145
Saeed Mahameede2816822015-05-28 22:28:40 +03007146struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007149
7150 u8 syndrome[0x20];
7151
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153};
7154
7155struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7156 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160 u8 op_mod[0x10];
7161
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165 u8 vxlan_udp_port[0x10];
7166};
7167
Saeed Mahameed74862162016-06-09 15:11:34 +03007168struct mlx5_ifc_set_rate_limit_out_bits {
7169 u8 status[0x8];
7170 u8 reserved_at_8[0x18];
7171
7172 u8 syndrome[0x20];
7173
7174 u8 reserved_at_40[0x40];
7175};
7176
7177struct mlx5_ifc_set_rate_limit_in_bits {
7178 u8 opcode[0x10];
7179 u8 reserved_at_10[0x10];
7180
7181 u8 reserved_at_20[0x10];
7182 u8 op_mod[0x10];
7183
7184 u8 reserved_at_40[0x10];
7185 u8 rate_limit_index[0x10];
7186
7187 u8 reserved_at_60[0x20];
7188
7189 u8 rate_limit[0x20];
7190};
7191
Saeed Mahameede2816822015-05-28 22:28:40 +03007192struct mlx5_ifc_access_register_out_bits {
7193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007195
7196 u8 syndrome[0x20];
7197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
7200 u8 register_data[0][0x20];
7201};
7202
7203enum {
7204 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7205 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7206};
7207
7208struct mlx5_ifc_access_register_in_bits {
7209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213 u8 op_mod[0x10];
7214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216 u8 register_id[0x10];
7217
7218 u8 argument[0x20];
7219
7220 u8 register_data[0][0x20];
7221};
7222
7223struct mlx5_ifc_sltp_reg_bits {
7224 u8 status[0x4];
7225 u8 version[0x4];
7226 u8 local_port[0x8];
7227 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233
Matan Barakb4ff3a32016-02-09 14:57:42 +02007234 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007235 u8 polarity[0x1];
7236 u8 ob_tap0[0x8];
7237 u8 ob_tap1[0x8];
7238 u8 ob_tap2[0x8];
7239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241 u8 ob_preemp_mode[0x4];
7242 u8 ob_reg[0x8];
7243 u8 ob_bias[0x8];
7244
Matan Barakb4ff3a32016-02-09 14:57:42 +02007245 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007246};
7247
7248struct mlx5_ifc_slrg_reg_bits {
7249 u8 status[0x4];
7250 u8 version[0x4];
7251 u8 local_port[0x8];
7252 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256
7257 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007258 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007259 u8 grade_lane_speed[0x4];
7260
7261 u8 grade_version[0x8];
7262 u8 grade[0x18];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 height_grade_type[0x4];
7266 u8 height_grade[0x18];
7267
7268 u8 height_dz[0x10];
7269 u8 height_dv[0x10];
7270
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272 u8 height_sigma[0x10];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275
Matan Barakb4ff3a32016-02-09 14:57:42 +02007276 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007277 u8 phase_grade_type[0x4];
7278 u8 phase_grade[0x18];
7279
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283 u8 phase_eo_neg[0x8];
7284
7285 u8 ffe_set_tested[0x10];
7286 u8 test_errors_per_lane[0x10];
7287};
7288
7289struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007290 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293
Matan Barakb4ff3a32016-02-09 14:57:42 +02007294 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007295 u8 vl_hw_cap[0x4];
7296
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298 u8 vl_admin[0x4];
7299
Matan Barakb4ff3a32016-02-09 14:57:42 +02007300 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007301 u8 vl_operational[0x4];
7302};
7303
7304struct mlx5_ifc_pude_reg_bits {
7305 u8 swid[0x8];
7306 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 oper_status[0x4];
7311
Matan Barakb4ff3a32016-02-09 14:57:42 +02007312 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007313};
7314
7315struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007316 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007317 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007318 u8 an_disable_cap[0x1];
7319 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007320 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 proto_mask[0x3];
7323
Saeed Mahameed74862162016-06-09 15:11:34 +03007324 u8 an_status[0x4];
7325 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007326
7327 u8 eth_proto_capability[0x20];
7328
7329 u8 ib_link_width_capability[0x10];
7330 u8 ib_proto_capability[0x10];
7331
Matan Barakb4ff3a32016-02-09 14:57:42 +02007332 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007333
7334 u8 eth_proto_admin[0x20];
7335
7336 u8 ib_link_width_admin[0x10];
7337 u8 ib_proto_admin[0x10];
7338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340
7341 u8 eth_proto_oper[0x20];
7342
7343 u8 ib_link_width_oper[0x10];
7344 u8 ib_proto_oper[0x10];
7345
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007346 u8 reserved_at_160[0x1c];
7347 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348
7349 u8 eth_proto_lp_advertise[0x20];
7350
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352};
7353
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007354struct mlx5_ifc_mlcr_reg_bits {
7355 u8 reserved_at_0[0x8];
7356 u8 local_port[0x8];
7357 u8 reserved_at_10[0x20];
7358
7359 u8 beacon_duration[0x10];
7360 u8 reserved_at_40[0x10];
7361
7362 u8 beacon_remain[0x10];
7363};
7364
Saeed Mahameede2816822015-05-28 22:28:40 +03007365struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367
7368 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 repetitions_mode[0x4];
7371 u8 num_of_repetitions[0x8];
7372
7373 u8 grade_version[0x8];
7374 u8 height_grade_type[0x4];
7375 u8 phase_grade_type[0x4];
7376 u8 height_grade_weight[0x8];
7377 u8 phase_grade_weight[0x8];
7378
7379 u8 gisim_measure_bits[0x10];
7380 u8 adaptive_tap_measure_bits[0x10];
7381
7382 u8 ber_bath_high_error_threshold[0x10];
7383 u8 ber_bath_mid_error_threshold[0x10];
7384
7385 u8 ber_bath_low_error_threshold[0x10];
7386 u8 one_ratio_high_threshold[0x10];
7387
7388 u8 one_ratio_high_mid_threshold[0x10];
7389 u8 one_ratio_low_mid_threshold[0x10];
7390
7391 u8 one_ratio_low_threshold[0x10];
7392 u8 ndeo_error_threshold[0x10];
7393
7394 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396 u8 mix90_phase_for_voltage_bath[0x8];
7397
7398 u8 mixer_offset_start[0x10];
7399 u8 mixer_offset_end[0x10];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402 u8 ber_test_time[0xb];
7403};
7404
7405struct mlx5_ifc_pspa_reg_bits {
7406 u8 swid[0x8];
7407 u8 local_port[0x8];
7408 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410
Matan Barakb4ff3a32016-02-09 14:57:42 +02007411 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007412};
7413
7414struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007417 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007418 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420 u8 mode[0x2];
7421
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425 u8 min_threshold[0x10];
7426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428 u8 max_threshold[0x10];
7429
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431 u8 mark_probability_denominator[0x10];
7432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434};
7435
7436struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440
Matan Barakb4ff3a32016-02-09 14:57:42 +02007441 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007442
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444 u8 wrps_admin[0x4];
7445
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447 u8 wrps_status[0x4];
7448
Matan Barakb4ff3a32016-02-09 14:57:42 +02007449 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007450 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 down_threshold[0x8];
7453
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457 u8 srps_admin[0x4];
7458
Matan Barakb4ff3a32016-02-09 14:57:42 +02007459 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007460 u8 srps_status[0x4];
7461
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463};
7464
7465struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469
Matan Barakb4ff3a32016-02-09 14:57:42 +02007470 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007471 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 lb_en[0x8];
7474};
7475
7476struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007477 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007478 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007479 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007480
Matan Barakb4ff3a32016-02-09 14:57:42 +02007481 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007482
7483 u8 port_profile_mode[0x8];
7484 u8 static_port_profile[0x8];
7485 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487
7488 u8 retransmission_active[0x8];
7489 u8 fec_mode_active[0x18];
7490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492};
7493
7494struct mlx5_ifc_ppcnt_reg_bits {
7495 u8 swid[0x8];
7496 u8 local_port[0x8];
7497 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499 u8 grp[0x6];
7500
7501 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503 u8 prio_tc[0x3];
7504
7505 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7506};
7507
Gal Pressman8ed1a632016-11-17 13:46:01 +02007508struct mlx5_ifc_mpcnt_reg_bits {
7509 u8 reserved_at_0[0x8];
7510 u8 pcie_index[0x8];
7511 u8 reserved_at_10[0xa];
7512 u8 grp[0x6];
7513
7514 u8 clr[0x1];
7515 u8 reserved_at_21[0x1f];
7516
7517 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7518};
7519
Saeed Mahameede2816822015-05-28 22:28:40 +03007520struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524 u8 local_port[0x8];
7525 u8 mac_47_32[0x10];
7526
7527 u8 mac_31_0[0x20];
7528
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530};
7531
7532struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536
7537 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539
7540 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542
7543 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545};
7546
7547struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553 u8 attenuation_5g[0x8];
7554
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 attenuation_7g[0x8];
7557
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559 u8 attenuation_12g[0x8];
7560};
7561
7562struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007563 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007564 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007565 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007566 u8 module_status[0x4];
7567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569};
7570
7571struct mlx5_ifc_pmpc_reg_bits {
7572 u8 module_state_updated[32][0x8];
7573};
7574
7575struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 mlpn_status[0x4];
7578 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580
7581 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583};
7584
7585struct mlx5_ifc_pmlp_reg_bits {
7586 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590 u8 width[0x8];
7591
7592 u8 lane0_module_mapping[0x20];
7593
7594 u8 lane1_module_mapping[0x20];
7595
7596 u8 lane2_module_mapping[0x20];
7597
7598 u8 lane3_module_mapping[0x20];
7599
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601};
7602
7603struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007604 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007605 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 oper_status[0x4];
7610
7611 u8 ase[0x1];
7612 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 e[0x2];
7615
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617};
7618
7619struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 lane_speed[0x10];
7628
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 lpbf[0x1];
7631 u8 fec_mode_policy[0x8];
7632
7633 u8 retransmission_capability[0x8];
7634 u8 fec_mode_capability[0x18];
7635
7636 u8 retransmission_support_admin[0x8];
7637 u8 fec_mode_support_admin[0x18];
7638
7639 u8 retransmission_request_admin[0x8];
7640 u8 fec_mode_request_admin[0x18];
7641
Matan Barakb4ff3a32016-02-09 14:57:42 +02007642 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007643};
7644
7645struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007646 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007647 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649 u8 ib_port[0x8];
7650
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652};
7653
7654struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 lbf_mode[0x3];
7659
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661};
7662
7663struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007664 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007665 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667
7668 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672};
7673
7674struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680
7681 u8 port_filter[8][0x20];
7682
7683 u8 port_filter_update_en[8][0x20];
7684};
7685
7686struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
7691 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 prio_mask_rx[0x8];
7696
7697 u8 pptx[0x1];
7698 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702
7703 u8 pprx[0x1];
7704 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710};
7711
7712struct mlx5_ifc_pelc_reg_bits {
7713 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717
7718 u8 op_admin[0x8];
7719 u8 op_capability[0x8];
7720 u8 op_request[0x8];
7721 u8 op_active[0x8];
7722
7723 u8 admin[0x40];
7724
7725 u8 capability[0x40];
7726
7727 u8 request[0x40];
7728
7729 u8 active[0x40];
7730
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732};
7733
7734struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007741 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007742
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746 u8 error_type[0x8];
7747};
7748
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007749struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007750 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007751
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007752 u8 ptys_connector_type[0x1];
7753 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007754 u8 ppcnt_discard_group[0x1];
7755 u8 ppcnt_statistical_group[0x1];
7756};
7757
7758struct mlx5_ifc_pcam_reg_bits {
7759 u8 reserved_at_0[0x8];
7760 u8 feature_group[0x8];
7761 u8 reserved_at_10[0x8];
7762 u8 access_reg_group[0x8];
7763
7764 u8 reserved_at_20[0x20];
7765
7766 union {
7767 u8 reserved_at_0[0x80];
7768 } port_access_reg_cap_mask;
7769
7770 u8 reserved_at_c0[0x80];
7771
7772 union {
7773 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7774 u8 reserved_at_0[0x80];
7775 } feature_cap_mask;
7776
7777 u8 reserved_at_1c0[0xc0];
7778};
7779
7780struct mlx5_ifc_mcam_enhanced_features_bits {
7781 u8 reserved_at_0[0x7f];
7782
7783 u8 pcie_performance_group[0x1];
7784};
7785
Or Gerlitz0ab87742017-06-11 15:25:38 +03007786struct mlx5_ifc_mcam_access_reg_bits {
7787 u8 reserved_at_0[0x1c];
7788 u8 mcda[0x1];
7789 u8 mcc[0x1];
7790 u8 mcqi[0x1];
7791 u8 reserved_at_1f[0x1];
7792
7793 u8 regs_95_to_64[0x20];
7794 u8 regs_63_to_32[0x20];
7795 u8 regs_31_to_0[0x20];
7796};
7797
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007798struct mlx5_ifc_mcam_reg_bits {
7799 u8 reserved_at_0[0x8];
7800 u8 feature_group[0x8];
7801 u8 reserved_at_10[0x8];
7802 u8 access_reg_group[0x8];
7803
7804 u8 reserved_at_20[0x20];
7805
7806 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007807 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007808 u8 reserved_at_0[0x80];
7809 } mng_access_reg_cap_mask;
7810
7811 u8 reserved_at_c0[0x80];
7812
7813 union {
7814 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7815 u8 reserved_at_0[0x80];
7816 } mng_feature_cap_mask;
7817
7818 u8 reserved_at_1c0[0x80];
7819};
7820
Saeed Mahameede2816822015-05-28 22:28:40 +03007821struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007822 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007823 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825
7826 u8 port_capability_mask[4][0x20];
7827};
7828
7829struct mlx5_ifc_paos_reg_bits {
7830 u8 swid[0x8];
7831 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835 u8 oper_status[0x4];
7836
7837 u8 ase[0x1];
7838 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 e[0x2];
7841
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843};
7844
7845struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849 u8 opamp_group_type[0x4];
7850
7851 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853 u8 num_of_indices[0xc];
7854
7855 u8 index_data[18][0x10];
7856};
7857
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007858struct mlx5_ifc_pcmr_reg_bits {
7859 u8 reserved_at_0[0x8];
7860 u8 local_port[0x8];
7861 u8 reserved_at_10[0x2e];
7862 u8 fcs_cap[0x1];
7863 u8 reserved_at_3f[0x1f];
7864 u8 fcs_chk[0x1];
7865 u8 reserved_at_5f[0x1];
7866};
7867
Saeed Mahameede2816822015-05-28 22:28:40 +03007868struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007869 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007870 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874 u8 module[0x8];
7875};
7876
7877struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879 u8 lossy[0x1];
7880 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007881 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007882 u8 size[0xc];
7883
7884 u8 xoff_threshold[0x10];
7885 u8 xon_threshold[0x10];
7886};
7887
7888struct mlx5_ifc_set_node_in_bits {
7889 u8 node_description[64][0x8];
7890};
7891
7892struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007893 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007894 u8 power_settings_level[0x8];
7895
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897};
7898
7899struct mlx5_ifc_register_host_endianness_bits {
7900 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007901 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007902
Matan Barakb4ff3a32016-02-09 14:57:42 +02007903 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007904};
7905
7906struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908
7909 u8 mkey[0x20];
7910
7911 u8 addressh_63_32[0x20];
7912
7913 u8 addressl_31_0[0x20];
7914};
7915
7916struct mlx5_ifc_ud_adrs_vector_bits {
7917 u8 dc_key[0x40];
7918
7919 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007920 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007921 u8 destination_qp_dct[0x18];
7922
7923 u8 static_rate[0x4];
7924 u8 sl_eth_prio[0x4];
7925 u8 fl[0x1];
7926 u8 mlid[0x7];
7927 u8 rlid_udp_sport[0x10];
7928
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930
7931 u8 rmac_47_16[0x20];
7932
7933 u8 rmac_15_0[0x10];
7934 u8 tclass[0x8];
7935 u8 hop_limit[0x8];
7936
Matan Barakb4ff3a32016-02-09 14:57:42 +02007937 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007938 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940 u8 src_addr_index[0x8];
7941 u8 flow_label[0x14];
7942
7943 u8 rgid_rip[16][0x8];
7944};
7945
7946struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007947 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007948 u8 function_id[0x10];
7949
7950 u8 num_pages[0x20];
7951
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953};
7954
7955struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959 u8 event_sub_type[0x8];
7960
Matan Barakb4ff3a32016-02-09 14:57:42 +02007961 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962
7963 union mlx5_ifc_event_auto_bits event_data;
7964
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007967 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007968 u8 owner[0x1];
7969};
7970
7971enum {
7972 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7973};
7974
7975struct mlx5_ifc_cmd_queue_entry_bits {
7976 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007977 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007978
7979 u8 input_length[0x20];
7980
7981 u8 input_mailbox_pointer_63_32[0x20];
7982
7983 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985
7986 u8 command_input_inline_data[16][0x8];
7987
7988 u8 command_output_inline_data[16][0x8];
7989
7990 u8 output_mailbox_pointer_63_32[0x20];
7991
7992 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007993 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007994
7995 u8 output_length[0x20];
7996
7997 u8 token[0x8];
7998 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007999 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008000 u8 status[0x7];
8001 u8 ownership[0x1];
8002};
8003
8004struct mlx5_ifc_cmd_out_bits {
8005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007
8008 u8 syndrome[0x20];
8009
8010 u8 command_output[0x20];
8011};
8012
8013struct mlx5_ifc_cmd_in_bits {
8014 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008015 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008016
Matan Barakb4ff3a32016-02-09 14:57:42 +02008017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008018 u8 op_mod[0x10];
8019
8020 u8 command[0][0x20];
8021};
8022
8023struct mlx5_ifc_cmd_if_box_bits {
8024 u8 mailbox_data[512][0x8];
8025
Matan Barakb4ff3a32016-02-09 14:57:42 +02008026 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008027
8028 u8 next_pointer_63_32[0x20];
8029
8030 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008031 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008032
8033 u8 block_number[0x20];
8034
Matan Barakb4ff3a32016-02-09 14:57:42 +02008035 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008036 u8 token[0x8];
8037 u8 ctrl_signature[0x8];
8038 u8 signature[0x8];
8039};
8040
8041struct mlx5_ifc_mtt_bits {
8042 u8 ptag_63_32[0x20];
8043
8044 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008045 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008046 u8 wr_en[0x1];
8047 u8 rd_en[0x1];
8048};
8049
Tariq Toukan928cfe82016-02-22 18:17:29 +02008050struct mlx5_ifc_query_wol_rol_out_bits {
8051 u8 status[0x8];
8052 u8 reserved_at_8[0x18];
8053
8054 u8 syndrome[0x20];
8055
8056 u8 reserved_at_40[0x10];
8057 u8 rol_mode[0x8];
8058 u8 wol_mode[0x8];
8059
8060 u8 reserved_at_60[0x20];
8061};
8062
8063struct mlx5_ifc_query_wol_rol_in_bits {
8064 u8 opcode[0x10];
8065 u8 reserved_at_10[0x10];
8066
8067 u8 reserved_at_20[0x10];
8068 u8 op_mod[0x10];
8069
8070 u8 reserved_at_40[0x40];
8071};
8072
8073struct mlx5_ifc_set_wol_rol_out_bits {
8074 u8 status[0x8];
8075 u8 reserved_at_8[0x18];
8076
8077 u8 syndrome[0x20];
8078
8079 u8 reserved_at_40[0x40];
8080};
8081
8082struct mlx5_ifc_set_wol_rol_in_bits {
8083 u8 opcode[0x10];
8084 u8 reserved_at_10[0x10];
8085
8086 u8 reserved_at_20[0x10];
8087 u8 op_mod[0x10];
8088
8089 u8 rol_mode_valid[0x1];
8090 u8 wol_mode_valid[0x1];
8091 u8 reserved_at_42[0xe];
8092 u8 rol_mode[0x8];
8093 u8 wol_mode[0x8];
8094
8095 u8 reserved_at_60[0x20];
8096};
8097
Saeed Mahameede2816822015-05-28 22:28:40 +03008098enum {
8099 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8100 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8101 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8102};
8103
8104enum {
8105 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8106 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8107 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8108};
8109
8110enum {
8111 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8112 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8113 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8114 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8115 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8116 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8117 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8118 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8119 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8120 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8121 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8122};
8123
8124struct mlx5_ifc_initial_seg_bits {
8125 u8 fw_rev_minor[0x10];
8126 u8 fw_rev_major[0x10];
8127
8128 u8 cmd_interface_rev[0x10];
8129 u8 fw_rev_subminor[0x10];
8130
Matan Barakb4ff3a32016-02-09 14:57:42 +02008131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008132
8133 u8 cmdq_phy_addr_63_32[0x20];
8134
8135 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137 u8 nic_interface[0x2];
8138 u8 log_cmdq_size[0x4];
8139 u8 log_cmdq_stride[0x4];
8140
8141 u8 command_doorbell_vector[0x20];
8142
Matan Barakb4ff3a32016-02-09 14:57:42 +02008143 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008144
8145 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008146 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008147 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149
8150 struct mlx5_ifc_health_buffer_bits health_buffer;
8151
8152 u8 no_dram_nic_offset[0x20];
8153
Matan Barakb4ff3a32016-02-09 14:57:42 +02008154 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008155
Matan Barakb4ff3a32016-02-09 14:57:42 +02008156 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008157 u8 clear_int[0x1];
8158
8159 u8 health_syndrome[0x8];
8160 u8 health_counter[0x18];
8161
Matan Barakb4ff3a32016-02-09 14:57:42 +02008162 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008163};
8164
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008165struct mlx5_ifc_mtpps_reg_bits {
8166 u8 reserved_at_0[0xc];
8167 u8 cap_number_of_pps_pins[0x4];
8168 u8 reserved_at_10[0x4];
8169 u8 cap_max_num_of_pps_in_pins[0x4];
8170 u8 reserved_at_18[0x4];
8171 u8 cap_max_num_of_pps_out_pins[0x4];
8172
8173 u8 reserved_at_20[0x24];
8174 u8 cap_pin_3_mode[0x4];
8175 u8 reserved_at_48[0x4];
8176 u8 cap_pin_2_mode[0x4];
8177 u8 reserved_at_50[0x4];
8178 u8 cap_pin_1_mode[0x4];
8179 u8 reserved_at_58[0x4];
8180 u8 cap_pin_0_mode[0x4];
8181
8182 u8 reserved_at_60[0x4];
8183 u8 cap_pin_7_mode[0x4];
8184 u8 reserved_at_68[0x4];
8185 u8 cap_pin_6_mode[0x4];
8186 u8 reserved_at_70[0x4];
8187 u8 cap_pin_5_mode[0x4];
8188 u8 reserved_at_78[0x4];
8189 u8 cap_pin_4_mode[0x4];
8190
8191 u8 reserved_at_80[0x80];
8192
8193 u8 enable[0x1];
8194 u8 reserved_at_101[0xb];
8195 u8 pattern[0x4];
8196 u8 reserved_at_110[0x4];
8197 u8 pin_mode[0x4];
8198 u8 pin[0x8];
8199
8200 u8 reserved_at_120[0x20];
8201
8202 u8 time_stamp[0x40];
8203
8204 u8 out_pulse_duration[0x10];
8205 u8 out_periodic_adjustment[0x10];
8206
8207 u8 reserved_at_1a0[0x60];
8208};
8209
8210struct mlx5_ifc_mtppse_reg_bits {
8211 u8 reserved_at_0[0x18];
8212 u8 pin[0x8];
8213 u8 event_arm[0x1];
8214 u8 reserved_at_21[0x1b];
8215 u8 event_generation_mode[0x4];
8216 u8 reserved_at_40[0x40];
8217};
8218
Or Gerlitz47176282017-04-18 13:35:39 +03008219struct mlx5_ifc_mcqi_cap_bits {
8220 u8 supported_info_bitmask[0x20];
8221
8222 u8 component_size[0x20];
8223
8224 u8 max_component_size[0x20];
8225
8226 u8 log_mcda_word_size[0x4];
8227 u8 reserved_at_64[0xc];
8228 u8 mcda_max_write_size[0x10];
8229
8230 u8 rd_en[0x1];
8231 u8 reserved_at_81[0x1];
8232 u8 match_chip_id[0x1];
8233 u8 match_psid[0x1];
8234 u8 check_user_timestamp[0x1];
8235 u8 match_base_guid_mac[0x1];
8236 u8 reserved_at_86[0x1a];
8237};
8238
8239struct mlx5_ifc_mcqi_reg_bits {
8240 u8 read_pending_component[0x1];
8241 u8 reserved_at_1[0xf];
8242 u8 component_index[0x10];
8243
8244 u8 reserved_at_20[0x20];
8245
8246 u8 reserved_at_40[0x1b];
8247 u8 info_type[0x5];
8248
8249 u8 info_size[0x20];
8250
8251 u8 offset[0x20];
8252
8253 u8 reserved_at_a0[0x10];
8254 u8 data_size[0x10];
8255
8256 u8 data[0][0x20];
8257};
8258
8259struct mlx5_ifc_mcc_reg_bits {
8260 u8 reserved_at_0[0x4];
8261 u8 time_elapsed_since_last_cmd[0xc];
8262 u8 reserved_at_10[0x8];
8263 u8 instruction[0x8];
8264
8265 u8 reserved_at_20[0x10];
8266 u8 component_index[0x10];
8267
8268 u8 reserved_at_40[0x8];
8269 u8 update_handle[0x18];
8270
8271 u8 handle_owner_type[0x4];
8272 u8 handle_owner_host_id[0x4];
8273 u8 reserved_at_68[0x1];
8274 u8 control_progress[0x7];
8275 u8 error_code[0x8];
8276 u8 reserved_at_78[0x4];
8277 u8 control_state[0x4];
8278
8279 u8 component_size[0x20];
8280
8281 u8 reserved_at_a0[0x60];
8282};
8283
8284struct mlx5_ifc_mcda_reg_bits {
8285 u8 reserved_at_0[0x8];
8286 u8 update_handle[0x18];
8287
8288 u8 offset[0x20];
8289
8290 u8 reserved_at_40[0x10];
8291 u8 size[0x10];
8292
8293 u8 reserved_at_60[0x20];
8294
8295 u8 data[0][0x20];
8296};
8297
Saeed Mahameede2816822015-05-28 22:28:40 +03008298union mlx5_ifc_ports_control_registers_document_bits {
8299 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8300 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8301 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8302 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8303 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8304 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8305 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8306 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8307 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8308 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8309 struct mlx5_ifc_paos_reg_bits paos_reg;
8310 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8311 struct mlx5_ifc_peir_reg_bits peir_reg;
8312 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8313 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008314 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008315 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8316 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8317 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8318 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8319 struct mlx5_ifc_plib_reg_bits plib_reg;
8320 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8321 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8322 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8323 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8324 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8325 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8326 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8327 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8328 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8329 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008330 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008331 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8332 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8333 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8334 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8335 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8336 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8337 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008338 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008339 struct mlx5_ifc_pude_reg_bits pude_reg;
8340 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8341 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8342 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008343 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8344 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008345 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008346 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8347 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008348 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8349 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8350 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008351 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008352};
8353
8354union mlx5_ifc_debug_enhancements_document_bits {
8355 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008356 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008357};
8358
8359union mlx5_ifc_uplink_pci_interface_document_bits {
8360 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008361 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008362};
8363
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008364struct mlx5_ifc_set_flow_table_root_out_bits {
8365 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008366 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008367
8368 u8 syndrome[0x20];
8369
Matan Barakb4ff3a32016-02-09 14:57:42 +02008370 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008371};
8372
8373struct mlx5_ifc_set_flow_table_root_in_bits {
8374 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008375 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008376
Matan Barakb4ff3a32016-02-09 14:57:42 +02008377 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008378 u8 op_mod[0x10];
8379
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008380 u8 other_vport[0x1];
8381 u8 reserved_at_41[0xf];
8382 u8 vport_number[0x10];
8383
8384 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008385
8386 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008387 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008388
Matan Barakb4ff3a32016-02-09 14:57:42 +02008389 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008390 u8 table_id[0x18];
8391
Erez Shitrit500a3d02017-04-13 06:36:51 +03008392 u8 reserved_at_c0[0x8];
8393 u8 underlay_qpn[0x18];
8394 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008395};
8396
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008397enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008398 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8399 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008400};
8401
8402struct mlx5_ifc_modify_flow_table_out_bits {
8403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008404 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008405
8406 u8 syndrome[0x20];
8407
Matan Barakb4ff3a32016-02-09 14:57:42 +02008408 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008409};
8410
8411struct mlx5_ifc_modify_flow_table_in_bits {
8412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008413 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008414
Matan Barakb4ff3a32016-02-09 14:57:42 +02008415 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008416 u8 op_mod[0x10];
8417
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008418 u8 other_vport[0x1];
8419 u8 reserved_at_41[0xf];
8420 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008421
Matan Barakb4ff3a32016-02-09 14:57:42 +02008422 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008423 u8 modify_field_select[0x10];
8424
8425 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008426 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008427
Matan Barakb4ff3a32016-02-09 14:57:42 +02008428 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008429 u8 table_id[0x18];
8430
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008431 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008432};
8433
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008434struct mlx5_ifc_ets_tcn_config_reg_bits {
8435 u8 g[0x1];
8436 u8 b[0x1];
8437 u8 r[0x1];
8438 u8 reserved_at_3[0x9];
8439 u8 group[0x4];
8440 u8 reserved_at_10[0x9];
8441 u8 bw_allocation[0x7];
8442
8443 u8 reserved_at_20[0xc];
8444 u8 max_bw_units[0x4];
8445 u8 reserved_at_30[0x8];
8446 u8 max_bw_value[0x8];
8447};
8448
8449struct mlx5_ifc_ets_global_config_reg_bits {
8450 u8 reserved_at_0[0x2];
8451 u8 r[0x1];
8452 u8 reserved_at_3[0x1d];
8453
8454 u8 reserved_at_20[0xc];
8455 u8 max_bw_units[0x4];
8456 u8 reserved_at_30[0x8];
8457 u8 max_bw_value[0x8];
8458};
8459
8460struct mlx5_ifc_qetc_reg_bits {
8461 u8 reserved_at_0[0x8];
8462 u8 port_number[0x8];
8463 u8 reserved_at_10[0x30];
8464
8465 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8466 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8467};
8468
8469struct mlx5_ifc_qtct_reg_bits {
8470 u8 reserved_at_0[0x8];
8471 u8 port_number[0x8];
8472 u8 reserved_at_10[0xd];
8473 u8 prio[0x3];
8474
8475 u8 reserved_at_20[0x1d];
8476 u8 tclass[0x3];
8477};
8478
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008479struct mlx5_ifc_mcia_reg_bits {
8480 u8 l[0x1];
8481 u8 reserved_at_1[0x7];
8482 u8 module[0x8];
8483 u8 reserved_at_10[0x8];
8484 u8 status[0x8];
8485
8486 u8 i2c_device_address[0x8];
8487 u8 page_number[0x8];
8488 u8 device_address[0x10];
8489
8490 u8 reserved_at_40[0x10];
8491 u8 size[0x10];
8492
8493 u8 reserved_at_60[0x20];
8494
8495 u8 dword_0[0x20];
8496 u8 dword_1[0x20];
8497 u8 dword_2[0x20];
8498 u8 dword_3[0x20];
8499 u8 dword_4[0x20];
8500 u8 dword_5[0x20];
8501 u8 dword_6[0x20];
8502 u8 dword_7[0x20];
8503 u8 dword_8[0x20];
8504 u8 dword_9[0x20];
8505 u8 dword_10[0x20];
8506 u8 dword_11[0x20];
8507};
8508
Saeed Mahameed74862162016-06-09 15:11:34 +03008509struct mlx5_ifc_dcbx_param_bits {
8510 u8 dcbx_cee_cap[0x1];
8511 u8 dcbx_ieee_cap[0x1];
8512 u8 dcbx_standby_cap[0x1];
8513 u8 reserved_at_0[0x5];
8514 u8 port_number[0x8];
8515 u8 reserved_at_10[0xa];
8516 u8 max_application_table_size[6];
8517 u8 reserved_at_20[0x15];
8518 u8 version_oper[0x3];
8519 u8 reserved_at_38[5];
8520 u8 version_admin[0x3];
8521 u8 willing_admin[0x1];
8522 u8 reserved_at_41[0x3];
8523 u8 pfc_cap_oper[0x4];
8524 u8 reserved_at_48[0x4];
8525 u8 pfc_cap_admin[0x4];
8526 u8 reserved_at_50[0x4];
8527 u8 num_of_tc_oper[0x4];
8528 u8 reserved_at_58[0x4];
8529 u8 num_of_tc_admin[0x4];
8530 u8 remote_willing[0x1];
8531 u8 reserved_at_61[3];
8532 u8 remote_pfc_cap[4];
8533 u8 reserved_at_68[0x14];
8534 u8 remote_num_of_tc[0x4];
8535 u8 reserved_at_80[0x18];
8536 u8 error[0x8];
8537 u8 reserved_at_a0[0x160];
8538};
Aviv Heller84df61e2016-05-10 13:47:50 +03008539
8540struct mlx5_ifc_lagc_bits {
8541 u8 reserved_at_0[0x1d];
8542 u8 lag_state[0x3];
8543
8544 u8 reserved_at_20[0x14];
8545 u8 tx_remap_affinity_2[0x4];
8546 u8 reserved_at_38[0x4];
8547 u8 tx_remap_affinity_1[0x4];
8548};
8549
8550struct mlx5_ifc_create_lag_out_bits {
8551 u8 status[0x8];
8552 u8 reserved_at_8[0x18];
8553
8554 u8 syndrome[0x20];
8555
8556 u8 reserved_at_40[0x40];
8557};
8558
8559struct mlx5_ifc_create_lag_in_bits {
8560 u8 opcode[0x10];
8561 u8 reserved_at_10[0x10];
8562
8563 u8 reserved_at_20[0x10];
8564 u8 op_mod[0x10];
8565
8566 struct mlx5_ifc_lagc_bits ctx;
8567};
8568
8569struct mlx5_ifc_modify_lag_out_bits {
8570 u8 status[0x8];
8571 u8 reserved_at_8[0x18];
8572
8573 u8 syndrome[0x20];
8574
8575 u8 reserved_at_40[0x40];
8576};
8577
8578struct mlx5_ifc_modify_lag_in_bits {
8579 u8 opcode[0x10];
8580 u8 reserved_at_10[0x10];
8581
8582 u8 reserved_at_20[0x10];
8583 u8 op_mod[0x10];
8584
8585 u8 reserved_at_40[0x20];
8586 u8 field_select[0x20];
8587
8588 struct mlx5_ifc_lagc_bits ctx;
8589};
8590
8591struct mlx5_ifc_query_lag_out_bits {
8592 u8 status[0x8];
8593 u8 reserved_at_8[0x18];
8594
8595 u8 syndrome[0x20];
8596
8597 u8 reserved_at_40[0x40];
8598
8599 struct mlx5_ifc_lagc_bits ctx;
8600};
8601
8602struct mlx5_ifc_query_lag_in_bits {
8603 u8 opcode[0x10];
8604 u8 reserved_at_10[0x10];
8605
8606 u8 reserved_at_20[0x10];
8607 u8 op_mod[0x10];
8608
8609 u8 reserved_at_40[0x40];
8610};
8611
8612struct mlx5_ifc_destroy_lag_out_bits {
8613 u8 status[0x8];
8614 u8 reserved_at_8[0x18];
8615
8616 u8 syndrome[0x20];
8617
8618 u8 reserved_at_40[0x40];
8619};
8620
8621struct mlx5_ifc_destroy_lag_in_bits {
8622 u8 opcode[0x10];
8623 u8 reserved_at_10[0x10];
8624
8625 u8 reserved_at_20[0x10];
8626 u8 op_mod[0x10];
8627
8628 u8 reserved_at_40[0x40];
8629};
8630
8631struct mlx5_ifc_create_vport_lag_out_bits {
8632 u8 status[0x8];
8633 u8 reserved_at_8[0x18];
8634
8635 u8 syndrome[0x20];
8636
8637 u8 reserved_at_40[0x40];
8638};
8639
8640struct mlx5_ifc_create_vport_lag_in_bits {
8641 u8 opcode[0x10];
8642 u8 reserved_at_10[0x10];
8643
8644 u8 reserved_at_20[0x10];
8645 u8 op_mod[0x10];
8646
8647 u8 reserved_at_40[0x40];
8648};
8649
8650struct mlx5_ifc_destroy_vport_lag_out_bits {
8651 u8 status[0x8];
8652 u8 reserved_at_8[0x18];
8653
8654 u8 syndrome[0x20];
8655
8656 u8 reserved_at_40[0x40];
8657};
8658
8659struct mlx5_ifc_destroy_vport_lag_in_bits {
8660 u8 opcode[0x10];
8661 u8 reserved_at_10[0x10];
8662
8663 u8 reserved_at_20[0x10];
8664 u8 op_mod[0x10];
8665
8666 u8 reserved_at_40[0x40];
8667};
8668
Eli Cohend29b7962014-10-02 12:19:43 +03008669#endif /* MLX5_IFC_H */