blob: 9ae3be43156af6ae03a4c51c079d5101812b262c [file] [log] [blame]
Michael Wueff1a592007-09-25 18:11:01 -07001
2/*
3 * Common code for mac80211 Prism54 drivers
4 *
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
7 *
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/firmware.h>
18#include <linux/etherdevice.h>
19
20#include <net/mac80211.h>
21
22#include "p54.h"
23#include "p54common.h"
24
25MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26MODULE_DESCRIPTION("Softmac Prism54 common code");
27MODULE_LICENSE("GPL");
28MODULE_ALIAS("prism54common");
29
Johannes Berg8318d782008-01-24 19:38:38 +010030static struct ieee80211_rate p54_rates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
43};
44
45static struct ieee80211_channel p54_channels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
60};
61
Johannes Bergc2976ab2008-02-20 12:08:12 +010062static struct ieee80211_supported_band band_2GHz = {
Johannes Berg8318d782008-01-24 19:38:38 +010063 .channels = p54_channels,
64 .n_channels = ARRAY_SIZE(p54_channels),
65 .bitrates = p54_rates,
66 .n_bitrates = ARRAY_SIZE(p54_rates),
67};
68
69
Michael Wueff1a592007-09-25 18:11:01 -070070void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
71{
72 struct p54_common *priv = dev->priv;
73 struct bootrec_exp_if *exp_if;
74 struct bootrec *bootrec;
75 u32 *data = (u32 *)fw->data;
76 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
77 u8 *fw_version = NULL;
78 size_t len;
79 int i;
80
81 if (priv->rx_start)
82 return;
83
84 while (data < end_data && *data)
85 data++;
86
87 while (data < end_data && !*data)
88 data++;
89
90 bootrec = (struct bootrec *) data;
91
92 while (bootrec->data <= end_data &&
93 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
94 u32 code = le32_to_cpu(bootrec->code);
95 switch (code) {
96 case BR_CODE_COMPONENT_ID:
Al Virodc73c622007-12-21 23:49:02 -050097 switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
Michael Wueff1a592007-09-25 18:11:01 -070098 case FW_FMAC:
99 printk(KERN_INFO "p54: FreeMAC firmware\n");
100 break;
101 case FW_LM20:
102 printk(KERN_INFO "p54: LM20 firmware\n");
103 break;
104 case FW_LM86:
105 printk(KERN_INFO "p54: LM86 firmware\n");
106 break;
107 case FW_LM87:
108 printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
109 break;
110 default:
111 printk(KERN_INFO "p54: unknown firmware\n");
112 break;
113 }
114 break;
115 case BR_CODE_COMPONENT_VERSION:
116 /* 24 bytes should be enough for all firmwares */
117 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
118 fw_version = (unsigned char*)bootrec->data;
119 break;
120 case BR_CODE_DESCR:
Al Virodc73c622007-12-21 23:49:02 -0500121 priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
Michael Wueff1a592007-09-25 18:11:01 -0700122 /* FIXME add sanity checking */
Al Virodc73c622007-12-21 23:49:02 -0500123 priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
Michael Wueff1a592007-09-25 18:11:01 -0700124 break;
125 case BR_CODE_EXPOSED_IF:
126 exp_if = (struct bootrec_exp_if *) bootrec->data;
127 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
Al Virodc73c622007-12-21 23:49:02 -0500128 if (exp_if[i].if_id == cpu_to_le16(0x1a))
Michael Wueff1a592007-09-25 18:11:01 -0700129 priv->fw_var = le16_to_cpu(exp_if[i].variant);
130 break;
131 case BR_CODE_DEPENDENT_IF:
132 break;
133 case BR_CODE_END_OF_BRA:
134 case LEGACY_BR_CODE_END_OF_BRA:
135 end_data = NULL;
136 break;
137 default:
138 break;
139 }
140 bootrec = (struct bootrec *)&bootrec->data[len];
141 }
142
143 if (fw_version)
144 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
145 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
146
147 if (priv->fw_var >= 0x300) {
148 /* Firmware supports QoS, use it! */
149 priv->tx_stats.data[0].limit = 3;
150 priv->tx_stats.data[1].limit = 4;
151 priv->tx_stats.data[2].limit = 3;
152 priv->tx_stats.data[3].limit = 1;
153 dev->queues = 4;
154 }
155}
156EXPORT_SYMBOL_GPL(p54_parse_firmware);
157
158static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
159 struct pda_pa_curve_data *curve_data)
160{
161 struct p54_common *priv = dev->priv;
162 struct pda_pa_curve_data_sample_rev1 *rev1;
163 struct pda_pa_curve_data_sample_rev0 *rev0;
164 size_t cd_len = sizeof(*curve_data) +
165 (curve_data->points_per_channel*sizeof(*rev1) + 2) *
166 curve_data->channels;
167 unsigned int i, j;
168 void *source, *target;
169
170 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
171 if (!priv->curve_data)
172 return -ENOMEM;
173
174 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
175 source = curve_data->data;
176 target = priv->curve_data->data;
177 for (i = 0; i < curve_data->channels; i++) {
178 __le16 *freq = source;
179 source += sizeof(__le16);
180 *((__le16 *)target) = *freq;
181 target += sizeof(__le16);
182 for (j = 0; j < curve_data->points_per_channel; j++) {
183 rev1 = target;
184 rev0 = source;
185
186 rev1->rf_power = rev0->rf_power;
187 rev1->pa_detector = rev0->pa_detector;
188 rev1->data_64qam = rev0->pcv;
189 /* "invent" the points for the other modulations */
190#define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
191 rev1->data_16qam = SUB(rev0->pcv, 12);
192 rev1->data_qpsk = SUB(rev1->data_16qam, 12);
193 rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
194 rev1->data_barker= SUB(rev1->data_bpsk, 14);
195#undef SUB
196 target += sizeof(*rev1);
197 source += sizeof(*rev0);
198 }
199 }
200
201 return 0;
202}
203
204int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
205{
206 struct p54_common *priv = dev->priv;
207 struct eeprom_pda_wrap *wrap = NULL;
208 struct pda_entry *entry;
209 int i = 0;
210 unsigned int data_len, entry_len;
211 void *tmp;
212 int err;
213
214 wrap = (struct eeprom_pda_wrap *) eeprom;
215 entry = (void *)wrap->data + wrap->len;
216 i += 2;
217 i += le16_to_cpu(entry->len)*2;
218 while (i < len) {
219 entry_len = le16_to_cpu(entry->len);
220 data_len = ((entry_len - 1) << 1);
221 switch (le16_to_cpu(entry->code)) {
222 case PDR_MAC_ADDRESS:
223 SET_IEEE80211_PERM_ADDR(dev, entry->data);
224 break;
225 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
226 if (data_len < 2) {
227 err = -EINVAL;
228 goto err;
229 }
230
231 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
232 err = -EINVAL;
233 goto err;
234 }
235
236 priv->output_limit = kmalloc(entry->data[1] *
237 sizeof(*priv->output_limit), GFP_KERNEL);
238
239 if (!priv->output_limit) {
240 err = -ENOMEM;
241 goto err;
242 }
243
244 memcpy(priv->output_limit, &entry->data[2],
245 entry->data[1]*sizeof(*priv->output_limit));
246 priv->output_limit_len = entry->data[1];
247 break;
248 case PDR_PRISM_PA_CAL_CURVE_DATA:
249 if (data_len < sizeof(struct pda_pa_curve_data)) {
250 err = -EINVAL;
251 goto err;
252 }
253
254 if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
255 priv->curve_data = kmalloc(data_len, GFP_KERNEL);
256 if (!priv->curve_data) {
257 err = -ENOMEM;
258 goto err;
259 }
260
261 memcpy(priv->curve_data, entry->data, data_len);
262 } else {
263 err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
264 if (err)
265 goto err;
266 }
267
268 break;
269 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
270 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
271 if (!priv->iq_autocal) {
272 err = -ENOMEM;
273 goto err;
274 }
275
276 memcpy(priv->iq_autocal, entry->data, data_len);
277 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
278 break;
279 case PDR_INTERFACE_LIST:
280 tmp = entry->data;
281 while ((u8 *)tmp < entry->data + data_len) {
282 struct bootrec_exp_if *exp_if = tmp;
283 if (le16_to_cpu(exp_if->if_id) == 0xF)
284 priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
285 tmp += sizeof(struct bootrec_exp_if);
286 }
287 break;
288 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
289 priv->version = *(u8 *)(entry->data + 1);
290 break;
291 case PDR_END:
292 i = len;
293 break;
294 }
295
296 entry = (void *)entry + (entry_len + 1)*2;
297 i += 2;
298 i += entry_len*2;
299 }
300
301 if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
302 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
303 err = -EINVAL;
304 goto err;
305 }
306
307 return 0;
308
309 err:
310 if (priv->iq_autocal) {
311 kfree(priv->iq_autocal);
312 priv->iq_autocal = NULL;
313 }
314
315 if (priv->output_limit) {
316 kfree(priv->output_limit);
317 priv->output_limit = NULL;
318 }
319
320 if (priv->curve_data) {
321 kfree(priv->curve_data);
322 priv->curve_data = NULL;
323 }
324
325 printk(KERN_ERR "p54: eeprom parse failed!\n");
326 return err;
327}
328EXPORT_SYMBOL_GPL(p54_parse_eeprom);
329
330void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
331{
332 struct p54_eeprom_lm86 *eeprom_hdr;
333
334 hdr->magic1 = cpu_to_le16(0x8000);
335 hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
336 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
337 hdr->retry1 = hdr->retry2 = 0;
338 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
339 eeprom_hdr->offset = 0x0;
340 eeprom_hdr->len = cpu_to_le16(0x2000);
341}
342EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
343
344static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
345{
346 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
347 struct ieee80211_rx_status rx_status = {0};
348 u16 freq = le16_to_cpu(hdr->freq);
349
350 rx_status.ssi = hdr->rssi;
Johannes Berg8318d782008-01-24 19:38:38 +0100351 /* XX correct? */
352 rx_status.rate_idx = hdr->rate & 0xf;
Michael Wueff1a592007-09-25 18:11:01 -0700353 rx_status.freq = freq;
Johannes Berg8318d782008-01-24 19:38:38 +0100354 rx_status.band = IEEE80211_BAND_2GHZ;
Michael Wueff1a592007-09-25 18:11:01 -0700355 rx_status.antenna = hdr->antenna;
356 rx_status.mactime = le64_to_cpu(hdr->timestamp);
Johannes Berg03bffc12007-12-04 20:33:40 +0100357 rx_status.flag |= RX_FLAG_TSFT;
Michael Wueff1a592007-09-25 18:11:01 -0700358
359 skb_pull(skb, sizeof(*hdr));
360 skb_trim(skb, le16_to_cpu(hdr->len));
361
362 ieee80211_rx_irqsafe(dev, skb, &rx_status);
363}
364
365static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
366{
367 struct p54_common *priv = dev->priv;
368 int i;
369
370 /* ieee80211_start_queues is great if all queues are really empty.
371 * But, what if some are full? */
372
373 for (i = 0; i < dev->queues; i++)
374 if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
375 ieee80211_wake_queue(dev, i);
376}
377
378static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
379{
380 struct p54_common *priv = dev->priv;
381 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
382 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
383 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
384 u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
385 struct memrecord *range = NULL;
386 u32 freed = 0;
387 u32 last_addr = priv->rx_start;
388
389 while (entry != (struct sk_buff *)&priv->tx_queue) {
390 range = (struct memrecord *)&entry->cb;
391 if (range->start_addr == addr) {
Johannes Bergc2976ab2008-02-20 12:08:12 +0100392 struct ieee80211_tx_status status;
Michael Wueff1a592007-09-25 18:11:01 -0700393 struct p54_control_hdr *entry_hdr;
394 struct p54_tx_control_allocdata *entry_data;
395 int pad = 0;
396
397 if (entry->next != (struct sk_buff *)&priv->tx_queue)
398 freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
399 else
400 freed = priv->rx_end - last_addr;
401
402 last_addr = range->end_addr;
403 __skb_unlink(entry, &priv->tx_queue);
404 if (!range->control) {
405 kfree_skb(entry);
406 break;
407 }
Johannes Bergc2976ab2008-02-20 12:08:12 +0100408 memset(&status, 0, sizeof(status));
Michael Wueff1a592007-09-25 18:11:01 -0700409 memcpy(&status.control, range->control,
410 sizeof(status.control));
411 kfree(range->control);
412 priv->tx_stats.data[status.control.queue].len--;
413
414 entry_hdr = (struct p54_control_hdr *) entry->data;
415 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
416 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
417 pad = entry_data->align[0];
418
Roel Kluinf59d9782007-10-26 21:51:26 +0200419 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
Michael Wueff1a592007-09-25 18:11:01 -0700420 if (!(payload->status & 0x01))
421 status.flags |= IEEE80211_TX_STATUS_ACK;
422 else
423 status.excessive_retries = 1;
424 }
425 status.retry_count = payload->retries - 1;
426 status.ack_signal = le16_to_cpu(payload->ack_rssi);
427 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
428 ieee80211_tx_status_irqsafe(dev, entry, &status);
429 break;
430 } else
431 last_addr = range->end_addr;
432 entry = entry->next;
433 }
434
435 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
436 sizeof(struct p54_control_hdr))
437 p54_wake_free_queues(dev);
438}
439
440static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
441{
442 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
443
444 switch (le16_to_cpu(hdr->type)) {
445 case P54_CONTROL_TYPE_TXDONE:
446 p54_rx_frame_sent(dev, skb);
447 break;
448 case P54_CONTROL_TYPE_BBP:
449 break;
450 default:
451 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
452 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
453 break;
454 }
455}
456
457/* returns zero if skb can be reused */
458int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
459{
460 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
461 switch (type) {
462 case 0x00:
463 case 0x01:
464 p54_rx_data(dev, skb);
465 return -1;
466 case 0x4d:
467 /* TODO: do something better... but then again, I've never seen this happen */
468 printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
469 wiphy_name(dev->wiphy));
470 break;
471 case 0x80:
472 p54_rx_control(dev, skb);
473 break;
474 default:
475 printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
476 wiphy_name(dev->wiphy), type);
477 break;
478 }
479 return 0;
480}
481EXPORT_SYMBOL_GPL(p54_rx);
482
483/*
484 * So, the firmware is somewhat stupid and doesn't know what places in its
485 * memory incoming data should go to. By poking around in the firmware, we
486 * can find some unused memory to upload our packets to. However, data that we
487 * want the card to TX needs to stay intact until the card has told us that
488 * it is done with it. This function finds empty places we can upload to and
489 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
490 * allocated areas.
491 */
492static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
493 struct p54_control_hdr *data, u32 len,
494 struct ieee80211_tx_control *control)
495{
496 struct p54_common *priv = dev->priv;
497 struct sk_buff *entry = priv->tx_queue.next;
498 struct sk_buff *target_skb = NULL;
499 struct memrecord *range;
500 u32 last_addr = priv->rx_start;
501 u32 largest_hole = 0;
502 u32 target_addr = priv->rx_start;
503 unsigned long flags;
504 unsigned int left;
505 len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
506
507 spin_lock_irqsave(&priv->tx_queue.lock, flags);
508 left = skb_queue_len(&priv->tx_queue);
509 while (left--) {
510 u32 hole_size;
511 range = (struct memrecord *)&entry->cb;
512 hole_size = range->start_addr - last_addr;
513 if (!target_skb && hole_size >= len) {
514 target_skb = entry->prev;
515 hole_size -= len;
516 target_addr = last_addr;
517 }
518 largest_hole = max(largest_hole, hole_size);
519 last_addr = range->end_addr;
520 entry = entry->next;
521 }
522 if (!target_skb && priv->rx_end - last_addr >= len) {
523 target_skb = priv->tx_queue.prev;
524 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
525 if (!skb_queue_empty(&priv->tx_queue)) {
526 range = (struct memrecord *)&target_skb->cb;
527 target_addr = range->end_addr;
528 }
529 } else
530 largest_hole = max(largest_hole, priv->rx_end - last_addr);
531
532 if (skb) {
533 range = (struct memrecord *)&skb->cb;
534 range->start_addr = target_addr;
535 range->end_addr = target_addr + len;
536 range->control = control;
537 __skb_queue_after(&priv->tx_queue, target_skb, skb);
538 if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
539 sizeof(struct p54_control_hdr))
540 ieee80211_stop_queues(dev);
541 }
542 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
543
544 data->req_id = cpu_to_le32(target_addr + 0x70);
545}
546
547static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
548 struct ieee80211_tx_control *control)
549{
550 struct ieee80211_tx_queue_stats_data *current_queue;
551 struct p54_common *priv = dev->priv;
552 struct p54_control_hdr *hdr;
553 struct p54_tx_control_allocdata *txhdr;
554 struct ieee80211_tx_control *control_copy;
555 size_t padding, len;
556 u8 rate;
557
558 current_queue = &priv->tx_stats.data[control->queue];
559 if (unlikely(current_queue->len > current_queue->limit))
560 return NETDEV_TX_BUSY;
561 current_queue->len++;
562 current_queue->count++;
563 if (current_queue->len == current_queue->limit)
564 ieee80211_stop_queue(dev, control->queue);
565
566 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
567 len = skb->len;
568
569 control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
570 if (control_copy)
571 memcpy(control_copy, control, sizeof(*control));
572
573 txhdr = (struct p54_tx_control_allocdata *)
574 skb_push(skb, sizeof(*txhdr) + padding);
575 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
576
577 if (padding)
578 hdr->magic1 = cpu_to_le16(0x4010);
579 else
580 hdr->magic1 = cpu_to_le16(0x0010);
581 hdr->len = cpu_to_le16(len);
582 hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
583 hdr->retry1 = hdr->retry2 = control->retry_limit;
584 p54_assign_address(dev, skb, hdr, skb->len, control_copy);
585
586 memset(txhdr->wep_key, 0x0, 16);
587 txhdr->padding = 0;
588 txhdr->padding2 = 0;
589
590 /* TODO: add support for alternate retry TX rates */
Johannes Berg8318d782008-01-24 19:38:38 +0100591 rate = control->tx_rate->hw_value;
592 if (control->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
593 rate |= 0x10;
Michael Wueff1a592007-09-25 18:11:01 -0700594 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
595 rate |= 0x40;
596 else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
597 rate |= 0x20;
598 memset(txhdr->rateset, rate, 8);
599 txhdr->wep_key_present = 0;
600 txhdr->wep_key_len = 0;
601 txhdr->frame_type = cpu_to_le32(control->queue + 4);
602 txhdr->magic4 = 0;
603 txhdr->antenna = (control->antenna_sel_tx == 0) ?
604 2 : control->antenna_sel_tx - 1;
605 txhdr->output_power = 0x7f; // HW Maximum
606 txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
607 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
608 if (padding)
609 txhdr->align[0] = padding;
610
611 priv->tx(dev, hdr, skb->len, 0);
612 return 0;
613}
614
615static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
616 const u8 *dst, const u8 *src, u8 antenna,
617 u32 magic3, u32 magic8, u32 magic9)
618{
619 struct p54_common *priv = dev->priv;
620 struct p54_control_hdr *hdr;
621 struct p54_tx_control_filter *filter;
622
623 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
Michael Wuba8007c2007-10-13 20:35:05 -0400624 priv->tx_hdr_len, GFP_ATOMIC);
Michael Wueff1a592007-09-25 18:11:01 -0700625 if (!hdr)
626 return -ENOMEM;
627
628 hdr = (void *)hdr + priv->tx_hdr_len;
629
630 filter = (struct p54_tx_control_filter *) hdr->data;
631 hdr->magic1 = cpu_to_le16(0x8001);
632 hdr->len = cpu_to_le16(sizeof(*filter));
633 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
634 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
635
636 filter->filter_type = cpu_to_le16(filter_type);
637 memcpy(filter->dst, dst, ETH_ALEN);
638 if (!src)
639 memset(filter->src, ~0, ETH_ALEN);
640 else
641 memcpy(filter->src, src, ETH_ALEN);
642 filter->antenna = antenna;
643 filter->magic3 = cpu_to_le32(magic3);
644 filter->rx_addr = cpu_to_le32(priv->rx_end);
645 filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
646 filter->rxhw = priv->rxhw;
647 filter->magic8 = cpu_to_le16(magic8);
648 filter->magic9 = cpu_to_le16(magic9);
649
650 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
651 return 0;
652}
653
654static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
655{
656 struct p54_common *priv = dev->priv;
657 struct p54_control_hdr *hdr;
658 struct p54_tx_control_channel *chan;
659 unsigned int i;
660 size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
661 sizeof(*chan->curve_data) *
662 priv->curve_data->points_per_channel;
663 void *entry;
664
665 hdr = kzalloc(sizeof(*hdr) + payload_len +
666 priv->tx_hdr_len, GFP_KERNEL);
667 if (!hdr)
668 return -ENOMEM;
669
670 hdr = (void *)hdr + priv->tx_hdr_len;
671
672 chan = (struct p54_tx_control_channel *) hdr->data;
673
674 hdr->magic1 = cpu_to_le16(0x8001);
675 hdr->len = cpu_to_le16(sizeof(*chan));
676 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
677 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
678
679 chan->magic1 = cpu_to_le16(0x1);
680 chan->magic2 = cpu_to_le16(0x0);
681
682 for (i = 0; i < priv->iq_autocal_len; i++) {
683 if (priv->iq_autocal[i].freq != freq)
684 continue;
685
686 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
687 sizeof(*priv->iq_autocal));
688 break;
689 }
690 if (i == priv->iq_autocal_len)
691 goto err;
692
693 for (i = 0; i < priv->output_limit_len; i++) {
694 if (priv->output_limit[i].freq != freq)
695 continue;
696
697 chan->val_barker = 0x38;
698 chan->val_bpsk = priv->output_limit[i].val_bpsk;
699 chan->val_qpsk = priv->output_limit[i].val_qpsk;
700 chan->val_16qam = priv->output_limit[i].val_16qam;
701 chan->val_64qam = priv->output_limit[i].val_64qam;
702 break;
703 }
704 if (i == priv->output_limit_len)
705 goto err;
706
707 chan->pa_points_per_curve = priv->curve_data->points_per_channel;
708
709 entry = priv->curve_data->data;
710 for (i = 0; i < priv->curve_data->channels; i++) {
711 if (*((__le16 *)entry) != freq) {
712 entry += sizeof(__le16);
713 entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
714 chan->pa_points_per_curve;
715 continue;
716 }
717
718 entry += sizeof(__le16);
719 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
720 chan->pa_points_per_curve);
721 break;
722 }
723
724 memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
725
726 priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
727 return 0;
728
729 err:
730 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
731 kfree(hdr);
732 return -EINVAL;
733}
734
735static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
736{
737 struct p54_common *priv = dev->priv;
738 struct p54_control_hdr *hdr;
739 struct p54_tx_control_led *led;
740
741 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
742 priv->tx_hdr_len, GFP_KERNEL);
743 if (!hdr)
744 return -ENOMEM;
745
746 hdr = (void *)hdr + priv->tx_hdr_len;
747 hdr->magic1 = cpu_to_le16(0x8001);
748 hdr->len = cpu_to_le16(sizeof(*led));
749 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
750 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
751
752 led = (struct p54_tx_control_led *) hdr->data;
753 led->mode = cpu_to_le16(mode);
754 led->led_permanent = cpu_to_le16(link);
755 led->led_temporary = cpu_to_le16(act);
756 led->duration = cpu_to_le16(1000);
757
758 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
759
760 return 0;
761}
762
Johannes Berg3330d7b2008-02-10 16:49:38 +0100763#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
Michael Wueff1a592007-09-25 18:11:01 -0700764do { \
765 queue.aifs = cpu_to_le16(ai_fs); \
766 queue.cwmin = cpu_to_le16(cw_min); \
767 queue.cwmax = cpu_to_le16(cw_max); \
Johannes Berg3330d7b2008-02-10 16:49:38 +0100768 queue.txop = cpu_to_le16(_txop); \
Michael Wueff1a592007-09-25 18:11:01 -0700769} while(0)
770
771static void p54_init_vdcf(struct ieee80211_hw *dev)
772{
773 struct p54_common *priv = dev->priv;
774 struct p54_control_hdr *hdr;
775 struct p54_tx_control_vdcf *vdcf;
776
777 /* all USB V1 adapters need a extra headroom */
778 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
779 hdr->magic1 = cpu_to_le16(0x8001);
780 hdr->len = cpu_to_le16(sizeof(*vdcf));
781 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
782 hdr->req_id = cpu_to_le32(priv->rx_start);
783
784 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
785
Johannes Berg3330d7b2008-02-10 16:49:38 +0100786 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
787 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
Christian Lamparter5200e8c2008-02-12 14:02:06 +0100788 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
Johannes Berg3330d7b2008-02-10 16:49:38 +0100789 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
Michael Wueff1a592007-09-25 18:11:01 -0700790}
791
792static void p54_set_vdcf(struct ieee80211_hw *dev)
793{
794 struct p54_common *priv = dev->priv;
795 struct p54_control_hdr *hdr;
796 struct p54_tx_control_vdcf *vdcf;
797
798 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
799
800 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
801
802 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
803
804 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
805 vdcf->slottime = 9;
806 vdcf->magic1 = 0x00;
807 vdcf->magic2 = 0x10;
808 } else {
809 vdcf->slottime = 20;
810 vdcf->magic1 = 0x0a;
811 vdcf->magic2 = 0x06;
812 }
813
814 /* (see prism54/isl_oid.h for further details) */
815 vdcf->frameburst = cpu_to_le16(0);
816
817 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
818}
819
Johannes Berg4150c572007-09-17 01:29:23 -0400820static int p54_start(struct ieee80211_hw *dev)
Michael Wueff1a592007-09-25 18:11:01 -0700821{
822 struct p54_common *priv = dev->priv;
823 int err;
824
Johannes Berg4150c572007-09-17 01:29:23 -0400825 err = priv->open(dev);
826 if (!err)
827 priv->mode = IEEE80211_IF_TYPE_MNTR;
828
829 return err;
830}
831
832static void p54_stop(struct ieee80211_hw *dev)
833{
834 struct p54_common *priv = dev->priv;
835 struct sk_buff *skb;
836 while ((skb = skb_dequeue(&priv->tx_queue))) {
837 struct memrecord *range = (struct memrecord *)&skb->cb;
838 if (range->control)
839 kfree(range->control);
840 kfree_skb(skb);
841 }
842 priv->stop(dev);
Johannes Berga2897552007-09-28 14:01:25 +0200843 priv->mode = IEEE80211_IF_TYPE_INVALID;
Johannes Berg4150c572007-09-17 01:29:23 -0400844}
845
846static int p54_add_interface(struct ieee80211_hw *dev,
847 struct ieee80211_if_init_conf *conf)
848{
849 struct p54_common *priv = dev->priv;
850
851 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
852 return -EOPNOTSUPP;
Michael Wueff1a592007-09-25 18:11:01 -0700853
854 switch (conf->type) {
855 case IEEE80211_IF_TYPE_STA:
856 priv->mode = conf->type;
857 break;
858 default:
859 return -EOPNOTSUPP;
860 }
861
Johannes Berg4150c572007-09-17 01:29:23 -0400862 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
Michael Wueff1a592007-09-25 18:11:01 -0700863
864 p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
865 p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
Michael Wueff1a592007-09-25 18:11:01 -0700866
867 switch (conf->type) {
868 case IEEE80211_IF_TYPE_STA:
869 p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
870 break;
Johannes Berg4150c572007-09-17 01:29:23 -0400871 default:
872 BUG(); /* impossible */
873 break;
Michael Wueff1a592007-09-25 18:11:01 -0700874 }
875
876 p54_set_leds(dev, 1, 0, 0);
877
878 return 0;
879}
880
881static void p54_remove_interface(struct ieee80211_hw *dev,
882 struct ieee80211_if_init_conf *conf)
883{
884 struct p54_common *priv = dev->priv;
Johannes Berg4150c572007-09-17 01:29:23 -0400885 priv->mode = IEEE80211_IF_TYPE_MNTR;
886 memset(priv->mac_addr, 0, ETH_ALEN);
887 p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
Michael Wueff1a592007-09-25 18:11:01 -0700888}
889
890static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
891{
892 int ret;
893
Johannes Berg8318d782008-01-24 19:38:38 +0100894 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
Michael Wueff1a592007-09-25 18:11:01 -0700895 p54_set_vdcf(dev);
896 return ret;
897}
898
Johannes Berg32bfd352007-12-19 01:31:26 +0100899static int p54_config_interface(struct ieee80211_hw *dev,
900 struct ieee80211_vif *vif,
Michael Wueff1a592007-09-25 18:11:01 -0700901 struct ieee80211_if_conf *conf)
902{
903 struct p54_common *priv = dev->priv;
904
905 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
906 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
907 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
Johannes Berg4150c572007-09-17 01:29:23 -0400908 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
Michael Wueff1a592007-09-25 18:11:01 -0700909 return 0;
910}
911
Johannes Berg4150c572007-09-17 01:29:23 -0400912static void p54_configure_filter(struct ieee80211_hw *dev,
913 unsigned int changed_flags,
914 unsigned int *total_flags,
915 int mc_count, struct dev_mc_list *mclist)
916{
917 struct p54_common *priv = dev->priv;
918
919 *total_flags &= FIF_BCN_PRBRESP_PROMISC;
920
921 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
922 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
923 p54_set_filter(dev, 0, priv->mac_addr,
924 NULL, 2, 0, 0, 0);
925 else
926 p54_set_filter(dev, 0, priv->mac_addr,
927 priv->bssid, 2, 0, 0, 0);
928 }
929}
930
Michael Wueff1a592007-09-25 18:11:01 -0700931static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
932 const struct ieee80211_tx_queue_params *params)
933{
934 struct p54_common *priv = dev->priv;
935 struct p54_tx_control_vdcf *vdcf;
936
937 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
938 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
939
940 if ((params) && !((queue < 0) || (queue > 4))) {
941 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
Johannes Berg3330d7b2008-02-10 16:49:38 +0100942 params->cw_min, params->cw_max, params->txop);
Michael Wueff1a592007-09-25 18:11:01 -0700943 } else
944 return -EINVAL;
945
946 p54_set_vdcf(dev);
947
948 return 0;
949}
950
951static int p54_get_stats(struct ieee80211_hw *dev,
952 struct ieee80211_low_level_stats *stats)
953{
954 /* TODO */
955 return 0;
956}
957
958static int p54_get_tx_stats(struct ieee80211_hw *dev,
959 struct ieee80211_tx_queue_stats *stats)
960{
961 struct p54_common *priv = dev->priv;
962 unsigned int i;
963
964 for (i = 0; i < dev->queues; i++)
965 memcpy(&stats->data[i], &priv->tx_stats.data[i],
966 sizeof(stats->data[i]));
967
968 return 0;
969}
970
971static const struct ieee80211_ops p54_ops = {
972 .tx = p54_tx,
Johannes Berg4150c572007-09-17 01:29:23 -0400973 .start = p54_start,
974 .stop = p54_stop,
Michael Wueff1a592007-09-25 18:11:01 -0700975 .add_interface = p54_add_interface,
976 .remove_interface = p54_remove_interface,
977 .config = p54_config,
978 .config_interface = p54_config_interface,
Johannes Berg4150c572007-09-17 01:29:23 -0400979 .configure_filter = p54_configure_filter,
Michael Wueff1a592007-09-25 18:11:01 -0700980 .conf_tx = p54_conf_tx,
981 .get_stats = p54_get_stats,
982 .get_tx_stats = p54_get_tx_stats
983};
984
985struct ieee80211_hw *p54_init_common(size_t priv_data_len)
986{
987 struct ieee80211_hw *dev;
988 struct p54_common *priv;
Michael Wueff1a592007-09-25 18:11:01 -0700989
990 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
991 if (!dev)
992 return NULL;
993
994 priv = dev->priv;
Johannes Berga2897552007-09-28 14:01:25 +0200995 priv->mode = IEEE80211_IF_TYPE_INVALID;
Michael Wueff1a592007-09-25 18:11:01 -0700996 skb_queue_head_init(&priv->tx_queue);
Johannes Berg8318d782008-01-24 19:38:38 +0100997 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
Michael Wueff1a592007-09-25 18:11:01 -0700998 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
999 IEEE80211_HW_RX_INCLUDES_FCS;
1000 dev->channel_change_time = 1000; /* TODO: find actual value */
1001 dev->max_rssi = 127;
1002
1003 priv->tx_stats.data[0].limit = 5;
1004 dev->queues = 1;
1005
1006 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1007 sizeof(struct p54_tx_control_allocdata);
1008
1009 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
1010 priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
1011
1012 if (!priv->cached_vdcf) {
1013 ieee80211_free_hw(dev);
1014 return NULL;
1015 }
1016
1017 p54_init_vdcf(dev);
1018
Michael Wueff1a592007-09-25 18:11:01 -07001019 return dev;
1020}
1021EXPORT_SYMBOL_GPL(p54_init_common);
1022
1023void p54_free_common(struct ieee80211_hw *dev)
1024{
1025 struct p54_common *priv = dev->priv;
1026 kfree(priv->iq_autocal);
1027 kfree(priv->output_limit);
1028 kfree(priv->curve_data);
1029 kfree(priv->cached_vdcf);
1030}
1031EXPORT_SYMBOL_GPL(p54_free_common);
1032
1033static int __init p54_init(void)
1034{
1035 return 0;
1036}
1037
1038static void __exit p54_exit(void)
1039{
1040}
1041
1042module_init(p54_init);
1043module_exit(p54_exit);