blob: 73b79bad613e500c85f46b807ad20f63224449e1 [file] [log] [blame]
Terje Bergstromd43f81c2013-03-22 16:34:09 +02001/*
Terje Bergstromd43f81c2013-03-22 16:34:09 +02002 * Copyright (c) 2012-2013, NVIDIA Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
Terje Bergstromd43f81c2013-03-22 16:34:09 +020017#include <linux/clk.h>
18
Terje Bergstromd43f81c2013-03-22 16:34:09 +020019#include "drm.h"
20#include "gem.h"
Thierry Reding497c56a2013-10-07 09:55:57 +020021#include "gr2d.h"
Thierry Redingc1bef812013-09-26 16:09:43 +020022
Terje Bergstromd43f81c2013-03-22 16:34:09 +020023struct gr2d {
Thierry Reding53fa7f72013-09-24 15:35:40 +020024 struct tegra_drm_client client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020025 struct host1x_channel *channel;
Thierry Redingc1bef812013-09-26 16:09:43 +020026 struct clk *clk;
27
28 DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020029};
30
Thierry Reding53fa7f72013-09-24 15:35:40 +020031static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020032{
33 return container_of(client, struct gr2d, client);
34}
35
Thierry Reding776dc382013-10-14 14:43:22 +020036static int gr2d_init(struct host1x_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020037{
Thierry Reding776dc382013-10-14 14:43:22 +020038 struct tegra_drm_client *drm = host1x_to_drm_client(client);
39 struct tegra_drm *tegra = dev_get_drvdata(client->parent);
40 struct gr2d *gr2d = to_gr2d(drm);
41
42 gr2d->channel = host1x_channel_request(client->dev);
43 if (!gr2d->channel)
44 return -ENOMEM;
45
46 client->syncpts[0] = host1x_syncpt_request(client->dev, false);
47 if (!client->syncpts[0]) {
48 host1x_channel_free(gr2d->channel);
49 return -ENOMEM;
50 }
51
52 return tegra_drm_register_client(tegra, drm);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020053}
54
Thierry Reding776dc382013-10-14 14:43:22 +020055static int gr2d_exit(struct host1x_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020056{
Thierry Reding776dc382013-10-14 14:43:22 +020057 struct tegra_drm_client *drm = host1x_to_drm_client(client);
58 struct tegra_drm *tegra = dev_get_drvdata(client->parent);
59 struct gr2d *gr2d = to_gr2d(drm);
60 int err;
61
62 err = tegra_drm_unregister_client(tegra, drm);
63 if (err < 0)
64 return err;
65
66 host1x_syncpt_free(client->syncpts[0]);
67 host1x_channel_free(gr2d->channel);
68
Terje Bergstromd43f81c2013-03-22 16:34:09 +020069 return 0;
70}
71
Thierry Reding53fa7f72013-09-24 15:35:40 +020072static const struct host1x_client_ops gr2d_client_ops = {
Thierry Reding776dc382013-10-14 14:43:22 +020073 .init = gr2d_init,
74 .exit = gr2d_exit,
Thierry Reding53fa7f72013-09-24 15:35:40 +020075};
76
77static int gr2d_open_channel(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020078 struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020079{
80 struct gr2d *gr2d = to_gr2d(client);
81
82 context->channel = host1x_channel_get(gr2d->channel);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020083 if (!context->channel)
84 return -ENOMEM;
85
86 return 0;
87}
88
Thierry Redingc88c3632013-09-26 16:08:22 +020089static void gr2d_close_channel(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020090{
91 host1x_channel_put(context->channel);
92}
93
Thierry Redingc1bef812013-09-26 16:09:43 +020094static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
95{
96 struct gr2d *gr2d = dev_get_drvdata(dev);
97
98 switch (class) {
99 case HOST1X_CLASS_HOST1X:
100 if (offset == 0x2b)
101 return 1;
102
103 break;
104
105 case HOST1X_CLASS_GR2D:
106 case HOST1X_CLASS_GR2D_SB:
107 if (offset >= GR2D_NUM_REGS)
108 break;
109
110 if (test_bit(offset, gr2d->addr_regs))
111 return 1;
112
113 break;
114 }
115
116 return 0;
117}
118
Thierry Reding53fa7f72013-09-24 15:35:40 +0200119static const struct tegra_drm_client_ops gr2d_ops = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200120 .open_channel = gr2d_open_channel,
121 .close_channel = gr2d_close_channel,
Thierry Redingc40f0f12013-10-10 11:00:33 +0200122 .is_addr_reg = gr2d_is_addr_reg,
123 .submit = tegra_drm_submit,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200124};
125
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200126static const struct of_device_id gr2d_match[] = {
127 { .compatible = "nvidia,tegra30-gr2d" },
128 { .compatible = "nvidia,tegra20-gr2d" },
129 { },
130};
131
Thierry Redingc1bef812013-09-26 16:09:43 +0200132static const u32 gr2d_addr_regs[] = {
Thierry Reding497c56a2013-10-07 09:55:57 +0200133 GR2D_UA_BASE_ADDR,
134 GR2D_VA_BASE_ADDR,
135 GR2D_PAT_BASE_ADDR,
136 GR2D_DSTA_BASE_ADDR,
137 GR2D_DSTB_BASE_ADDR,
138 GR2D_DSTC_BASE_ADDR,
139 GR2D_SRCA_BASE_ADDR,
140 GR2D_SRCB_BASE_ADDR,
141 GR2D_SRC_BASE_ADDR_SB,
142 GR2D_DSTA_BASE_ADDR_SB,
143 GR2D_DSTB_BASE_ADDR_SB,
144 GR2D_UA_BASE_ADDR_SB,
145 GR2D_VA_BASE_ADDR_SB,
Thierry Redingc1bef812013-09-26 16:09:43 +0200146};
147
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200148static int gr2d_probe(struct platform_device *pdev)
149{
150 struct device *dev = &pdev->dev;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200151 struct host1x_syncpt **syncpts;
Thierry Redingc1bef812013-09-26 16:09:43 +0200152 struct gr2d *gr2d;
153 unsigned int i;
154 int err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200155
156 gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
157 if (!gr2d)
158 return -ENOMEM;
159
160 syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
161 if (!syncpts)
162 return -ENOMEM;
163
164 gr2d->clk = devm_clk_get(dev, NULL);
165 if (IS_ERR(gr2d->clk)) {
166 dev_err(dev, "cannot get clock\n");
167 return PTR_ERR(gr2d->clk);
168 }
169
170 err = clk_prepare_enable(gr2d->clk);
171 if (err) {
172 dev_err(dev, "cannot turn on clock\n");
173 return err;
174 }
175
Thierry Reding53fa7f72013-09-24 15:35:40 +0200176 INIT_LIST_HEAD(&gr2d->client.base.list);
177 gr2d->client.base.ops = &gr2d_client_ops;
178 gr2d->client.base.dev = dev;
179 gr2d->client.base.class = HOST1X_CLASS_GR2D;
180 gr2d->client.base.syncpts = syncpts;
181 gr2d->client.base.num_syncpts = 1;
Thierry Reding776dc382013-10-14 14:43:22 +0200182
183 INIT_LIST_HEAD(&gr2d->client.list);
Thierry Reding53fa7f72013-09-24 15:35:40 +0200184 gr2d->client.ops = &gr2d_ops;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200185
Thierry Reding776dc382013-10-14 14:43:22 +0200186 err = host1x_client_register(&gr2d->client.base);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200187 if (err < 0) {
188 dev_err(dev, "failed to register host1x client: %d\n", err);
189 return err;
190 }
191
Thierry Redingc1bef812013-09-26 16:09:43 +0200192 /* initialize address register map */
193 for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
194 set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200195
196 platform_set_drvdata(pdev, gr2d);
197
198 return 0;
199}
200
Thierry Redingc1bef812013-09-26 16:09:43 +0200201static int gr2d_remove(struct platform_device *pdev)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200202{
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200203 struct gr2d *gr2d = platform_get_drvdata(pdev);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200204 int err;
205
Thierry Reding776dc382013-10-14 14:43:22 +0200206 err = host1x_client_unregister(&gr2d->client.base);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200207 if (err < 0) {
Thierry Redingc1bef812013-09-26 16:09:43 +0200208 dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
209 err);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200210 return err;
211 }
212
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200213 clk_disable_unprepare(gr2d->clk);
214
215 return 0;
216}
217
218struct platform_driver tegra_gr2d_driver = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200219 .driver = {
Thierry Redinga137ce32013-10-14 14:44:54 +0200220 .name = "tegra-gr2d",
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200221 .of_match_table = gr2d_match,
Thierry Redingc1bef812013-09-26 16:09:43 +0200222 },
223 .probe = gr2d_probe,
224 .remove = gr2d_remove,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200225};