Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-imx/time.c |
| 3 | * |
| 4 | * Copyright (C) 2000-2001 Deep Blue Solutions |
| 5 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 6 | * Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/sched.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/interrupt.h> |
Thomas Gleixner | a6284ac | 2006-07-01 22:32:34 +0100 | [diff] [blame] | 16 | #include <linux/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/time.h> |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 18 | #include <linux/clocksource.h> |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 19 | #include <linux/clockchips.h> |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 20 | #include <linux/clk.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 23 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/leds.h> |
| 25 | #include <asm/irq.h> |
| 26 | #include <asm/mach/time.h> |
| 27 | |
| 28 | /* Use timer 1 as system timer */ |
| 29 | #define TIMER_BASE IMX_TIM1_BASE |
| 30 | |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 31 | static struct clock_event_device clockevent_imx; |
| 32 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * IRQ handler for the timer |
| 36 | */ |
| 37 | static irqreturn_t |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 38 | imx_timer_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | { |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 40 | struct clock_event_device *evt = &clockevent_imx; |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 41 | uint32_t tstat; |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 42 | irqreturn_t ret = IRQ_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
| 44 | /* clear the interrupt */ |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 45 | tstat = IMX_TSTAT(TIMER_BASE); |
| 46 | IMX_TSTAT(TIMER_BASE) = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 48 | if (tstat & TSTAT_COMP) { |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 49 | evt->event_handler(evt); |
| 50 | ret = IRQ_HANDLED; |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 51 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 53 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | static struct irqaction imx_timer_irq = { |
| 57 | .name = "i.MX Timer Tick", |
Bernhard Walle | b30faba | 2007-05-08 00:35:39 -0700 | [diff] [blame] | 58 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
Russell King | 09b8b5f | 2005-06-26 17:06:36 +0100 | [diff] [blame] | 59 | .handler = imx_timer_interrupt, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | /* |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 63 | * Set up timer hardware into expected mode and state. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | */ |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 65 | static void __init imx_timer_hardware_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | { |
| 67 | /* |
| 68 | * Initialise to a known state (all timers off, and timing reset) |
| 69 | */ |
| 70 | IMX_TCTL(TIMER_BASE) = 0; |
| 71 | IMX_TPRER(TIMER_BASE) = 0; |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 72 | |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 73 | IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_TEN; |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | cycle_t imx_get_cycles(void) |
| 77 | { |
| 78 | return IMX_TCN(TIMER_BASE); |
| 79 | } |
| 80 | |
| 81 | static struct clocksource clocksource_imx = { |
| 82 | .name = "imx_timer1", |
| 83 | .rating = 200, |
| 84 | .read = imx_get_cycles, |
| 85 | .mask = 0xFFFFFFFF, |
| 86 | .shift = 20, |
Thomas Gleixner | c66699a | 2007-02-16 01:27:37 -0800 | [diff] [blame] | 87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 88 | }; |
| 89 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 90 | static int __init imx_clocksource_init(unsigned long rate) |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 91 | { |
| 92 | clocksource_imx.mult = |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 93 | clocksource_hz2mult(rate, clocksource_imx.shift); |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 94 | clocksource_register(&clocksource_imx); |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 99 | static int imx_set_next_event(unsigned long evt, |
| 100 | struct clock_event_device *unused) |
| 101 | { |
| 102 | unsigned long tcmp; |
| 103 | |
| 104 | tcmp = IMX_TCN(TIMER_BASE) + evt; |
| 105 | IMX_TCMP(TIMER_BASE) = tcmp; |
| 106 | |
| 107 | return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0; |
| 108 | } |
| 109 | |
| 110 | #ifdef DEBUG |
| 111 | static const char *clock_event_mode_label[]={ |
| 112 | [CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC", |
| 113 | [CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT", |
| 114 | [CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN", |
| 115 | [CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED" |
| 116 | }; |
| 117 | #endif /*DEBUG*/ |
| 118 | |
| 119 | static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) |
| 120 | { |
| 121 | unsigned long flags; |
| 122 | |
| 123 | /* |
| 124 | * The timer interrupt generation is disabled at least |
| 125 | * for enough time to call imx_set_next_event() |
| 126 | */ |
| 127 | local_irq_save(flags); |
| 128 | /* Disable interrupt in GPT module */ |
| 129 | IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN; |
| 130 | if (mode != clockevent_mode) { |
| 131 | /* Set event time into far-far future */ |
| 132 | IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3; |
| 133 | /* Clear pending interrupt */ |
| 134 | IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP; |
| 135 | } |
| 136 | |
| 137 | #ifdef DEBUG |
| 138 | printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n", |
| 139 | clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]); |
| 140 | #endif /*DEBUG*/ |
| 141 | |
| 142 | /* Remember timer mode */ |
| 143 | clockevent_mode = mode; |
| 144 | local_irq_restore(flags); |
| 145 | |
| 146 | switch (mode) { |
| 147 | case CLOCK_EVT_MODE_PERIODIC: |
| 148 | printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n"); |
| 149 | break; |
| 150 | case CLOCK_EVT_MODE_ONESHOT: |
| 151 | /* |
| 152 | * Do not put overhead of interrupt enable/disable into |
| 153 | * imx_set_next_event(), the core has about 4 minutes |
| 154 | * to call imx_set_next_event() or shutdown clock after |
| 155 | * mode switching |
| 156 | */ |
| 157 | local_irq_save(flags); |
| 158 | IMX_TCTL(TIMER_BASE) |= TCTL_IRQEN; |
| 159 | local_irq_restore(flags); |
| 160 | break; |
| 161 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 162 | case CLOCK_EVT_MODE_UNUSED: |
Thomas Gleixner | 18de5bc | 2007-07-21 04:37:34 -0700 | [diff] [blame] | 163 | case CLOCK_EVT_MODE_RESUME: |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 164 | /* Left event sources disabled, no more interrupts appears */ |
| 165 | break; |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | static struct clock_event_device clockevent_imx = { |
| 170 | .name = "imx_timer1", |
| 171 | .features = CLOCK_EVT_FEAT_ONESHOT, |
| 172 | .shift = 32, |
| 173 | .set_mode = imx_set_mode, |
| 174 | .set_next_event = imx_set_next_event, |
| 175 | .rating = 200, |
| 176 | }; |
| 177 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 178 | static int __init imx_clockevent_init(unsigned long rate) |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 179 | { |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 180 | clockevent_imx.mult = div_sc(rate, NSEC_PER_SEC, |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 181 | clockevent_imx.shift); |
| 182 | clockevent_imx.max_delta_ns = |
| 183 | clockevent_delta2ns(0xfffffffe, &clockevent_imx); |
| 184 | clockevent_imx.min_delta_ns = |
| 185 | clockevent_delta2ns(0xf, &clockevent_imx); |
| 186 | |
| 187 | clockevent_imx.cpumask = cpumask_of_cpu(0); |
| 188 | |
| 189 | clockevents_register_device(&clockevent_imx); |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 194 | extern int imx_clocks_init(void); |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 195 | |
Pavel Pisa | 86987d5 | 2006-12-06 17:19:44 +0100 | [diff] [blame] | 196 | static void __init imx_timer_init(void) |
| 197 | { |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 198 | struct clk *clk; |
| 199 | unsigned long rate; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | |
Sascha Hauer | 38a41fd | 2008-07-05 10:02:46 +0200 | [diff] [blame] | 201 | imx_clocks_init(); |
| 202 | |
| 203 | clk = clk_get(NULL, "perclk1"); |
| 204 | clk_enable(clk); |
| 205 | rate = clk_get_rate(clk); |
| 206 | |
| 207 | imx_timer_hardware_init(); |
| 208 | imx_clocksource_init(rate); |
| 209 | |
| 210 | imx_clockevent_init(rate); |
Pavel Pisa | 89bba43 | 2007-05-13 17:37:33 +0100 | [diff] [blame] | 211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | /* |
| 213 | * Make irqs happen for the system timer |
| 214 | */ |
| 215 | setup_irq(TIM1_INT, &imx_timer_irq); |
| 216 | } |
| 217 | |
| 218 | struct sys_timer imx_timer = { |
| 219 | .init = imx_timer_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | }; |