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Adit Ranadive29c8d9e2016-10-02 19:10:22 -07001/*
2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of EITHER the GNU General Public License
6 * version 2 as published by the Free Software Foundation or the BSD
7 * 2-Clause License. This program is distributed in the hope that it
8 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License version 2 for more details at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program available in the file COPYING in the main
15 * directory of this source tree.
16 *
17 * The BSD 2-Clause License
18 *
19 * Redistribution and use in source and binary forms, with or
20 * without modification, are permitted provided that the following
21 * conditions are met:
22 *
23 * - Redistributions of source code must retain the above
24 * copyright notice, this list of conditions and the following
25 * disclaimer.
26 *
27 * - Redistributions in binary form must reproduce the above
28 * copyright notice, this list of conditions and the following
29 * disclaimer in the documentation and/or other materials
30 * provided with the distribution.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43 * OF THE POSSIBILITY OF SUCH DAMAGE.
44 */
45
46#include <linux/errno.h>
47#include <linux/inetdevice.h>
48#include <linux/init.h>
49#include <linux/module.h>
50#include <linux/slab.h>
51#include <rdma/ib_addr.h>
52#include <rdma/ib_smi.h>
53#include <rdma/ib_user_verbs.h>
54#include <net/addrconf.h>
55
56#include "pvrdma.h"
57
58#define DRV_NAME "vmw_pvrdma"
59#define DRV_VERSION "1.0.0.0-k"
60
61static DEFINE_MUTEX(pvrdma_device_list_lock);
62static LIST_HEAD(pvrdma_device_list);
63static struct workqueue_struct *event_wq;
64
65static int pvrdma_add_gid(struct ib_device *ibdev,
66 u8 port_num,
67 unsigned int index,
68 const union ib_gid *gid,
69 const struct ib_gid_attr *attr,
70 void **context);
71static int pvrdma_del_gid(struct ib_device *ibdev,
72 u8 port_num,
73 unsigned int index,
74 void **context);
75
76
77static ssize_t show_hca(struct device *device, struct device_attribute *attr,
78 char *buf)
79{
80 return sprintf(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
81}
82
83static ssize_t show_rev(struct device *device, struct device_attribute *attr,
84 char *buf)
85{
86 return sprintf(buf, "%d\n", PVRDMA_REV_ID);
87}
88
89static ssize_t show_board(struct device *device, struct device_attribute *attr,
90 char *buf)
91{
92 return sprintf(buf, "%d\n", PVRDMA_BOARD_ID);
93}
94
95static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
96static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
97static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
98
99static struct device_attribute *pvrdma_class_attributes[] = {
100 &dev_attr_hw_rev,
101 &dev_attr_hca_type,
102 &dev_attr_board_id
103};
104
105static void pvrdma_get_fw_ver_str(struct ib_device *device, char *str,
106 size_t str_len)
107{
108 struct pvrdma_dev *dev =
109 container_of(device, struct pvrdma_dev, ib_dev);
110 snprintf(str, str_len, "%d.%d.%d\n",
111 (int) (dev->dsr->caps.fw_ver >> 32),
112 (int) (dev->dsr->caps.fw_ver >> 16) & 0xffff,
113 (int) dev->dsr->caps.fw_ver & 0xffff);
114}
115
116static int pvrdma_init_device(struct pvrdma_dev *dev)
117{
118 /* Initialize some device related stuff */
119 spin_lock_init(&dev->cmd_lock);
120 sema_init(&dev->cmd_sema, 1);
121 atomic_set(&dev->num_qps, 0);
122 atomic_set(&dev->num_cqs, 0);
123 atomic_set(&dev->num_pds, 0);
124 atomic_set(&dev->num_ahs, 0);
125
126 return 0;
127}
128
129static int pvrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
130 struct ib_port_immutable *immutable)
131{
132 struct ib_port_attr attr;
133 int err;
134
Or Gerlitzc4550c62017-01-24 13:02:39 +0200135 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
136
137 err = ib_query_port(ibdev, port_num, &attr);
Adit Ranadive29c8d9e2016-10-02 19:10:22 -0700138 if (err)
139 return err;
140
141 immutable->pkey_tbl_len = attr.pkey_tbl_len;
142 immutable->gid_tbl_len = attr.gid_tbl_len;
Adit Ranadive29c8d9e2016-10-02 19:10:22 -0700143 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
144 return 0;
145}
146
147static struct net_device *pvrdma_get_netdev(struct ib_device *ibdev,
148 u8 port_num)
149{
150 struct net_device *netdev;
151 struct pvrdma_dev *dev = to_vdev(ibdev);
152
153 if (port_num != 1)
154 return NULL;
155
156 rcu_read_lock();
157 netdev = dev->netdev;
158 if (netdev)
159 dev_hold(netdev);
160 rcu_read_unlock();
161
162 return netdev;
163}
164
165static int pvrdma_register_device(struct pvrdma_dev *dev)
166{
167 int ret = -1;
168 int i = 0;
169
170 strlcpy(dev->ib_dev.name, "vmw_pvrdma%d", IB_DEVICE_NAME_MAX);
171 dev->ib_dev.node_guid = dev->dsr->caps.node_guid;
172 dev->sys_image_guid = dev->dsr->caps.sys_image_guid;
173 dev->flags = 0;
174 dev->ib_dev.owner = THIS_MODULE;
175 dev->ib_dev.num_comp_vectors = 1;
176 dev->ib_dev.dma_device = &dev->pdev->dev;
177 dev->ib_dev.uverbs_abi_ver = PVRDMA_UVERBS_ABI_VERSION;
178 dev->ib_dev.uverbs_cmd_mask =
179 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
180 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
181 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
182 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
183 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
184 (1ull << IB_USER_VERBS_CMD_REG_MR) |
185 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
186 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
187 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
188 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
189 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
190 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
191 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
192 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
193 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
194 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
195 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
196 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
197 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
198 (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
199
200 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
201 dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
202
203 dev->ib_dev.query_device = pvrdma_query_device;
204 dev->ib_dev.query_port = pvrdma_query_port;
205 dev->ib_dev.query_gid = pvrdma_query_gid;
206 dev->ib_dev.query_pkey = pvrdma_query_pkey;
207 dev->ib_dev.modify_port = pvrdma_modify_port;
208 dev->ib_dev.alloc_ucontext = pvrdma_alloc_ucontext;
209 dev->ib_dev.dealloc_ucontext = pvrdma_dealloc_ucontext;
210 dev->ib_dev.mmap = pvrdma_mmap;
211 dev->ib_dev.alloc_pd = pvrdma_alloc_pd;
212 dev->ib_dev.dealloc_pd = pvrdma_dealloc_pd;
213 dev->ib_dev.create_ah = pvrdma_create_ah;
214 dev->ib_dev.destroy_ah = pvrdma_destroy_ah;
215 dev->ib_dev.create_qp = pvrdma_create_qp;
216 dev->ib_dev.modify_qp = pvrdma_modify_qp;
217 dev->ib_dev.query_qp = pvrdma_query_qp;
218 dev->ib_dev.destroy_qp = pvrdma_destroy_qp;
219 dev->ib_dev.post_send = pvrdma_post_send;
220 dev->ib_dev.post_recv = pvrdma_post_recv;
221 dev->ib_dev.create_cq = pvrdma_create_cq;
222 dev->ib_dev.modify_cq = pvrdma_modify_cq;
223 dev->ib_dev.resize_cq = pvrdma_resize_cq;
224 dev->ib_dev.destroy_cq = pvrdma_destroy_cq;
225 dev->ib_dev.poll_cq = pvrdma_poll_cq;
226 dev->ib_dev.req_notify_cq = pvrdma_req_notify_cq;
227 dev->ib_dev.get_dma_mr = pvrdma_get_dma_mr;
228 dev->ib_dev.reg_user_mr = pvrdma_reg_user_mr;
229 dev->ib_dev.dereg_mr = pvrdma_dereg_mr;
230 dev->ib_dev.alloc_mr = pvrdma_alloc_mr;
231 dev->ib_dev.map_mr_sg = pvrdma_map_mr_sg;
232 dev->ib_dev.add_gid = pvrdma_add_gid;
233 dev->ib_dev.del_gid = pvrdma_del_gid;
234 dev->ib_dev.get_netdev = pvrdma_get_netdev;
235 dev->ib_dev.get_port_immutable = pvrdma_port_immutable;
236 dev->ib_dev.get_link_layer = pvrdma_port_link_layer;
237 dev->ib_dev.get_dev_fw_str = pvrdma_get_fw_ver_str;
238
239 mutex_init(&dev->port_mutex);
240 spin_lock_init(&dev->desc_lock);
241
242 dev->cq_tbl = kcalloc(dev->dsr->caps.max_cq, sizeof(void *),
243 GFP_KERNEL);
244 if (!dev->cq_tbl)
245 return ret;
246 spin_lock_init(&dev->cq_tbl_lock);
247
248 dev->qp_tbl = kcalloc(dev->dsr->caps.max_qp, sizeof(void *),
249 GFP_KERNEL);
250 if (!dev->qp_tbl)
251 goto err_cq_free;
252 spin_lock_init(&dev->qp_tbl_lock);
253
254 ret = ib_register_device(&dev->ib_dev, NULL);
255 if (ret)
256 goto err_qp_free;
257
258 for (i = 0; i < ARRAY_SIZE(pvrdma_class_attributes); ++i) {
259 ret = device_create_file(&dev->ib_dev.dev,
260 pvrdma_class_attributes[i]);
261 if (ret)
262 goto err_class;
263 }
264
265 dev->ib_active = true;
266
267 return 0;
268
269err_class:
270 ib_unregister_device(&dev->ib_dev);
271err_qp_free:
272 kfree(dev->qp_tbl);
273err_cq_free:
274 kfree(dev->cq_tbl);
275
276 return ret;
277}
278
279static irqreturn_t pvrdma_intr0_handler(int irq, void *dev_id)
280{
281 u32 icr = PVRDMA_INTR_CAUSE_RESPONSE;
282 struct pvrdma_dev *dev = dev_id;
283
284 dev_dbg(&dev->pdev->dev, "interrupt 0 (response) handler\n");
285
286 if (dev->intr.type != PVRDMA_INTR_TYPE_MSIX) {
287 /* Legacy intr */
288 icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR);
289 if (icr == 0)
290 return IRQ_NONE;
291 }
292
293 if (icr == PVRDMA_INTR_CAUSE_RESPONSE)
294 complete(&dev->cmd_done);
295
296 return IRQ_HANDLED;
297}
298
299static void pvrdma_qp_event(struct pvrdma_dev *dev, u32 qpn, int type)
300{
301 struct pvrdma_qp *qp;
302 unsigned long flags;
303
304 spin_lock_irqsave(&dev->qp_tbl_lock, flags);
305 qp = dev->qp_tbl[qpn % dev->dsr->caps.max_qp];
306 if (qp)
307 atomic_inc(&qp->refcnt);
308 spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
309
310 if (qp && qp->ibqp.event_handler) {
311 struct ib_qp *ibqp = &qp->ibqp;
312 struct ib_event e;
313
314 e.device = ibqp->device;
315 e.element.qp = ibqp;
316 e.event = type; /* 1:1 mapping for now. */
317 ibqp->event_handler(&e, ibqp->qp_context);
318 }
319 if (qp) {
320 atomic_dec(&qp->refcnt);
321 if (atomic_read(&qp->refcnt) == 0)
322 wake_up(&qp->wait);
323 }
324}
325
326static void pvrdma_cq_event(struct pvrdma_dev *dev, u32 cqn, int type)
327{
328 struct pvrdma_cq *cq;
329 unsigned long flags;
330
331 spin_lock_irqsave(&dev->cq_tbl_lock, flags);
332 cq = dev->cq_tbl[cqn % dev->dsr->caps.max_cq];
333 if (cq)
334 atomic_inc(&cq->refcnt);
335 spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
336
337 if (cq && cq->ibcq.event_handler) {
338 struct ib_cq *ibcq = &cq->ibcq;
339 struct ib_event e;
340
341 e.device = ibcq->device;
342 e.element.cq = ibcq;
343 e.event = type; /* 1:1 mapping for now. */
344 ibcq->event_handler(&e, ibcq->cq_context);
345 }
346 if (cq) {
347 atomic_dec(&cq->refcnt);
348 if (atomic_read(&cq->refcnt) == 0)
349 wake_up(&cq->wait);
350 }
351}
352
353static void pvrdma_dispatch_event(struct pvrdma_dev *dev, int port,
354 enum ib_event_type event)
355{
356 struct ib_event ib_event;
357
358 memset(&ib_event, 0, sizeof(ib_event));
359 ib_event.device = &dev->ib_dev;
360 ib_event.element.port_num = port;
361 ib_event.event = event;
362 ib_dispatch_event(&ib_event);
363}
364
365static void pvrdma_dev_event(struct pvrdma_dev *dev, u8 port, int type)
366{
367 if (port < 1 || port > dev->dsr->caps.phys_port_cnt) {
368 dev_warn(&dev->pdev->dev, "event on port %d\n", port);
369 return;
370 }
371
372 pvrdma_dispatch_event(dev, port, type);
373}
374
375static inline struct pvrdma_eqe *get_eqe(struct pvrdma_dev *dev, unsigned int i)
376{
377 return (struct pvrdma_eqe *)pvrdma_page_dir_get_ptr(
378 &dev->async_pdir,
379 PAGE_SIZE +
380 sizeof(struct pvrdma_eqe) * i);
381}
382
383static irqreturn_t pvrdma_intr1_handler(int irq, void *dev_id)
384{
385 struct pvrdma_dev *dev = dev_id;
386 struct pvrdma_ring *ring = &dev->async_ring_state->rx;
387 int ring_slots = (dev->dsr->async_ring_pages.num_pages - 1) *
388 PAGE_SIZE / sizeof(struct pvrdma_eqe);
389 unsigned int head;
390
391 dev_dbg(&dev->pdev->dev, "interrupt 1 (async event) handler\n");
392
393 /*
394 * Don't process events until the IB device is registered. Otherwise
395 * we'll try to ib_dispatch_event() on an invalid device.
396 */
397 if (!dev->ib_active)
398 return IRQ_HANDLED;
399
400 while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
401 struct pvrdma_eqe *eqe;
402
403 eqe = get_eqe(dev, head);
404
405 switch (eqe->type) {
406 case PVRDMA_EVENT_QP_FATAL:
407 case PVRDMA_EVENT_QP_REQ_ERR:
408 case PVRDMA_EVENT_QP_ACCESS_ERR:
409 case PVRDMA_EVENT_COMM_EST:
410 case PVRDMA_EVENT_SQ_DRAINED:
411 case PVRDMA_EVENT_PATH_MIG:
412 case PVRDMA_EVENT_PATH_MIG_ERR:
413 case PVRDMA_EVENT_QP_LAST_WQE_REACHED:
414 pvrdma_qp_event(dev, eqe->info, eqe->type);
415 break;
416
417 case PVRDMA_EVENT_CQ_ERR:
418 pvrdma_cq_event(dev, eqe->info, eqe->type);
419 break;
420
421 case PVRDMA_EVENT_SRQ_ERR:
422 case PVRDMA_EVENT_SRQ_LIMIT_REACHED:
423 break;
424
425 case PVRDMA_EVENT_PORT_ACTIVE:
426 case PVRDMA_EVENT_PORT_ERR:
427 case PVRDMA_EVENT_LID_CHANGE:
428 case PVRDMA_EVENT_PKEY_CHANGE:
429 case PVRDMA_EVENT_SM_CHANGE:
430 case PVRDMA_EVENT_CLIENT_REREGISTER:
431 case PVRDMA_EVENT_GID_CHANGE:
432 pvrdma_dev_event(dev, eqe->info, eqe->type);
433 break;
434
435 case PVRDMA_EVENT_DEVICE_FATAL:
436 pvrdma_dev_event(dev, 1, eqe->type);
437 break;
438
439 default:
440 break;
441 }
442
443 pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
444 }
445
446 return IRQ_HANDLED;
447}
448
449static inline struct pvrdma_cqne *get_cqne(struct pvrdma_dev *dev,
450 unsigned int i)
451{
452 return (struct pvrdma_cqne *)pvrdma_page_dir_get_ptr(
453 &dev->cq_pdir,
454 PAGE_SIZE +
455 sizeof(struct pvrdma_cqne) * i);
456}
457
458static irqreturn_t pvrdma_intrx_handler(int irq, void *dev_id)
459{
460 struct pvrdma_dev *dev = dev_id;
461 struct pvrdma_ring *ring = &dev->cq_ring_state->rx;
462 int ring_slots = (dev->dsr->cq_ring_pages.num_pages - 1) * PAGE_SIZE /
463 sizeof(struct pvrdma_cqne);
464 unsigned int head;
465 unsigned long flags;
466
467 dev_dbg(&dev->pdev->dev, "interrupt x (completion) handler\n");
468
469 while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
470 struct pvrdma_cqne *cqne;
471 struct pvrdma_cq *cq;
472
473 cqne = get_cqne(dev, head);
474 spin_lock_irqsave(&dev->cq_tbl_lock, flags);
475 cq = dev->cq_tbl[cqne->info % dev->dsr->caps.max_cq];
476 if (cq)
477 atomic_inc(&cq->refcnt);
478 spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
479
480 if (cq && cq->ibcq.comp_handler)
481 cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
482 if (cq) {
483 atomic_dec(&cq->refcnt);
484 if (atomic_read(&cq->refcnt))
485 wake_up(&cq->wait);
486 }
487 pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
488 }
489
490 return IRQ_HANDLED;
491}
492
493static void pvrdma_disable_msi_all(struct pvrdma_dev *dev)
494{
495 if (dev->intr.type == PVRDMA_INTR_TYPE_MSIX)
496 pci_disable_msix(dev->pdev);
497 else if (dev->intr.type == PVRDMA_INTR_TYPE_MSI)
498 pci_disable_msi(dev->pdev);
499}
500
501static void pvrdma_free_irq(struct pvrdma_dev *dev)
502{
503 int i;
504
505 dev_dbg(&dev->pdev->dev, "freeing interrupts\n");
506
507 if (dev->intr.type == PVRDMA_INTR_TYPE_MSIX) {
508 for (i = 0; i < dev->intr.size; i++) {
509 if (dev->intr.enabled[i]) {
510 free_irq(dev->intr.msix_entry[i].vector, dev);
511 dev->intr.enabled[i] = 0;
512 }
513 }
514 } else if (dev->intr.type == PVRDMA_INTR_TYPE_INTX ||
515 dev->intr.type == PVRDMA_INTR_TYPE_MSI) {
516 free_irq(dev->pdev->irq, dev);
517 }
518}
519
520static void pvrdma_enable_intrs(struct pvrdma_dev *dev)
521{
522 dev_dbg(&dev->pdev->dev, "enable interrupts\n");
523 pvrdma_write_reg(dev, PVRDMA_REG_IMR, 0);
524}
525
526static void pvrdma_disable_intrs(struct pvrdma_dev *dev)
527{
528 dev_dbg(&dev->pdev->dev, "disable interrupts\n");
529 pvrdma_write_reg(dev, PVRDMA_REG_IMR, ~0);
530}
531
532static int pvrdma_enable_msix(struct pci_dev *pdev, struct pvrdma_dev *dev)
533{
534 int i;
535 int ret;
536
537 for (i = 0; i < PVRDMA_MAX_INTERRUPTS; i++) {
538 dev->intr.msix_entry[i].entry = i;
539 dev->intr.msix_entry[i].vector = i;
540
541 switch (i) {
542 case 0:
543 /* CMD ring handler */
544 dev->intr.handler[i] = pvrdma_intr0_handler;
545 break;
546 case 1:
547 /* Async event ring handler */
548 dev->intr.handler[i] = pvrdma_intr1_handler;
549 break;
550 default:
551 /* Completion queue handler */
552 dev->intr.handler[i] = pvrdma_intrx_handler;
553 break;
554 }
555 }
556
557 ret = pci_enable_msix(pdev, dev->intr.msix_entry,
558 PVRDMA_MAX_INTERRUPTS);
559 if (!ret) {
560 dev->intr.type = PVRDMA_INTR_TYPE_MSIX;
561 dev->intr.size = PVRDMA_MAX_INTERRUPTS;
562 } else if (ret > 0) {
563 ret = pci_enable_msix(pdev, dev->intr.msix_entry, ret);
564 if (!ret) {
565 dev->intr.type = PVRDMA_INTR_TYPE_MSIX;
566 dev->intr.size = ret;
567 } else {
568 dev->intr.size = 0;
569 }
570 }
571
572 dev_dbg(&pdev->dev, "using interrupt type %d, size %d\n",
573 dev->intr.type, dev->intr.size);
574
575 return ret;
576}
577
578static int pvrdma_alloc_intrs(struct pvrdma_dev *dev)
579{
580 int ret = 0;
581 int i;
582
583 if (pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX) &&
584 pvrdma_enable_msix(dev->pdev, dev)) {
585 /* Try MSI */
586 ret = pci_enable_msi(dev->pdev);
587 if (!ret) {
588 dev->intr.type = PVRDMA_INTR_TYPE_MSI;
589 } else {
590 /* Legacy INTR */
591 dev->intr.type = PVRDMA_INTR_TYPE_INTX;
592 }
593 }
594
595 /* Request First IRQ */
596 switch (dev->intr.type) {
597 case PVRDMA_INTR_TYPE_INTX:
598 case PVRDMA_INTR_TYPE_MSI:
599 ret = request_irq(dev->pdev->irq, pvrdma_intr0_handler,
600 IRQF_SHARED, DRV_NAME, dev);
601 if (ret) {
602 dev_err(&dev->pdev->dev,
603 "failed to request interrupt\n");
604 goto disable_msi;
605 }
606 break;
607 case PVRDMA_INTR_TYPE_MSIX:
608 ret = request_irq(dev->intr.msix_entry[0].vector,
609 pvrdma_intr0_handler, 0, DRV_NAME, dev);
610 if (ret) {
611 dev_err(&dev->pdev->dev,
612 "failed to request interrupt 0\n");
613 goto disable_msi;
614 }
615 dev->intr.enabled[0] = 1;
616 break;
617 default:
618 /* Not reached */
619 break;
620 }
621
622 /* For MSIX: request intr for each vector */
623 if (dev->intr.size > 1) {
624 ret = request_irq(dev->intr.msix_entry[1].vector,
625 pvrdma_intr1_handler, 0, DRV_NAME, dev);
626 if (ret) {
627 dev_err(&dev->pdev->dev,
628 "failed to request interrupt 1\n");
629 goto free_irq;
630 }
631 dev->intr.enabled[1] = 1;
632
633 for (i = 2; i < dev->intr.size; i++) {
634 ret = request_irq(dev->intr.msix_entry[i].vector,
635 pvrdma_intrx_handler, 0,
636 DRV_NAME, dev);
637 if (ret) {
638 dev_err(&dev->pdev->dev,
639 "failed to request interrupt %d\n", i);
640 goto free_irq;
641 }
642 dev->intr.enabled[i] = 1;
643 }
644 }
645
646 return 0;
647
648free_irq:
649 pvrdma_free_irq(dev);
650disable_msi:
651 pvrdma_disable_msi_all(dev);
652 return ret;
653}
654
655static void pvrdma_free_slots(struct pvrdma_dev *dev)
656{
657 struct pci_dev *pdev = dev->pdev;
658
659 if (dev->resp_slot)
660 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->resp_slot,
661 dev->dsr->resp_slot_dma);
662 if (dev->cmd_slot)
663 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot,
664 dev->dsr->cmd_slot_dma);
665}
666
667static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
668 const union ib_gid *gid,
669 int index)
670{
671 int ret;
672 union pvrdma_cmd_req req;
673 struct pvrdma_cmd_create_bind *cmd_bind = &req.create_bind;
674
675 if (!dev->sgid_tbl) {
676 dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
677 return -EINVAL;
678 }
679
680 memset(cmd_bind, 0, sizeof(*cmd_bind));
681 cmd_bind->hdr.cmd = PVRDMA_CMD_CREATE_BIND;
682 memcpy(cmd_bind->new_gid, gid->raw, 16);
683 cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
684 cmd_bind->vlan = 0xfff;
685 cmd_bind->index = index;
686 cmd_bind->gid_type = PVRDMA_GID_TYPE_FLAG_ROCE_V1;
687
688 ret = pvrdma_cmd_post(dev, &req, NULL, 0);
689 if (ret < 0) {
690 dev_warn(&dev->pdev->dev,
691 "could not create binding, error: %d\n", ret);
692 return -EFAULT;
693 }
694 memcpy(&dev->sgid_tbl[index], gid, sizeof(*gid));
695 return 0;
696}
697
698static int pvrdma_add_gid(struct ib_device *ibdev,
699 u8 port_num,
700 unsigned int index,
701 const union ib_gid *gid,
702 const struct ib_gid_attr *attr,
703 void **context)
704{
705 struct pvrdma_dev *dev = to_vdev(ibdev);
706
707 return pvrdma_add_gid_at_index(dev, gid, index);
708}
709
710static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
711{
712 int ret;
713 union pvrdma_cmd_req req;
714 struct pvrdma_cmd_destroy_bind *cmd_dest = &req.destroy_bind;
715
716 /* Update sgid table. */
717 if (!dev->sgid_tbl) {
718 dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
719 return -EINVAL;
720 }
721
722 memset(cmd_dest, 0, sizeof(*cmd_dest));
723 cmd_dest->hdr.cmd = PVRDMA_CMD_DESTROY_BIND;
724 memcpy(cmd_dest->dest_gid, &dev->sgid_tbl[index], 16);
725 cmd_dest->index = index;
726
727 ret = pvrdma_cmd_post(dev, &req, NULL, 0);
728 if (ret < 0) {
729 dev_warn(&dev->pdev->dev,
730 "could not destroy binding, error: %d\n", ret);
731 return ret;
732 }
733 memset(&dev->sgid_tbl[index], 0, 16);
734 return 0;
735}
736
737static int pvrdma_del_gid(struct ib_device *ibdev,
738 u8 port_num,
739 unsigned int index,
740 void **context)
741{
742 struct pvrdma_dev *dev = to_vdev(ibdev);
743
744 dev_dbg(&dev->pdev->dev, "removing gid at index %u from %s",
745 index, dev->netdev->name);
746
747 return pvrdma_del_gid_at_index(dev, index);
748}
749
750static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev,
751 unsigned long event)
752{
753 switch (event) {
754 case NETDEV_REBOOT:
755 case NETDEV_DOWN:
756 pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR);
757 break;
758 case NETDEV_UP:
759 pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE);
760 break;
761 default:
762 dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n",
763 event, dev->ib_dev.name);
764 break;
765 }
766}
767
768static void pvrdma_netdevice_event_work(struct work_struct *work)
769{
770 struct pvrdma_netdevice_work *netdev_work;
771 struct pvrdma_dev *dev;
772
773 netdev_work = container_of(work, struct pvrdma_netdevice_work, work);
774
775 mutex_lock(&pvrdma_device_list_lock);
776 list_for_each_entry(dev, &pvrdma_device_list, device_link) {
777 if (dev->netdev == netdev_work->event_netdev) {
778 pvrdma_netdevice_event_handle(dev, netdev_work->event);
779 break;
780 }
781 }
782 mutex_unlock(&pvrdma_device_list_lock);
783
784 kfree(netdev_work);
785}
786
787static int pvrdma_netdevice_event(struct notifier_block *this,
788 unsigned long event, void *ptr)
789{
790 struct net_device *event_netdev = netdev_notifier_info_to_dev(ptr);
791 struct pvrdma_netdevice_work *netdev_work;
792
793 netdev_work = kmalloc(sizeof(*netdev_work), GFP_ATOMIC);
794 if (!netdev_work)
795 return NOTIFY_BAD;
796
797 INIT_WORK(&netdev_work->work, pvrdma_netdevice_event_work);
798 netdev_work->event_netdev = event_netdev;
799 netdev_work->event = event;
800 queue_work(event_wq, &netdev_work->work);
801
802 return NOTIFY_DONE;
803}
804
805static int pvrdma_pci_probe(struct pci_dev *pdev,
806 const struct pci_device_id *id)
807{
808 struct pci_dev *pdev_net;
809 struct pvrdma_dev *dev;
810 int ret;
811 unsigned long start;
812 unsigned long len;
813 unsigned int version;
814 dma_addr_t slot_dma = 0;
815
816 dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
817
818 /* Allocate zero-out device */
819 dev = (struct pvrdma_dev *)ib_alloc_device(sizeof(*dev));
820 if (!dev) {
821 dev_err(&pdev->dev, "failed to allocate IB device\n");
822 return -ENOMEM;
823 }
824
825 mutex_lock(&pvrdma_device_list_lock);
826 list_add(&dev->device_link, &pvrdma_device_list);
827 mutex_unlock(&pvrdma_device_list_lock);
828
829 ret = pvrdma_init_device(dev);
830 if (ret)
831 goto err_free_device;
832
833 dev->pdev = pdev;
834 pci_set_drvdata(pdev, dev);
835
836 ret = pci_enable_device(pdev);
837 if (ret) {
838 dev_err(&pdev->dev, "cannot enable PCI device\n");
839 goto err_free_device;
840 }
841
842 dev_dbg(&pdev->dev, "PCI resource flags BAR0 %#lx\n",
843 pci_resource_flags(pdev, 0));
844 dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
845 (unsigned long long)pci_resource_len(pdev, 0));
846 dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
847 (unsigned long long)pci_resource_start(pdev, 0));
848 dev_dbg(&pdev->dev, "PCI resource flags BAR1 %#lx\n",
849 pci_resource_flags(pdev, 1));
850 dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
851 (unsigned long long)pci_resource_len(pdev, 1));
852 dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
853 (unsigned long long)pci_resource_start(pdev, 1));
854
855 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
856 !(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
857 dev_err(&pdev->dev, "PCI BAR region not MMIO\n");
858 ret = -ENOMEM;
859 goto err_free_device;
860 }
861
862 ret = pci_request_regions(pdev, DRV_NAME);
863 if (ret) {
864 dev_err(&pdev->dev, "cannot request PCI resources\n");
865 goto err_disable_pdev;
866 }
867
868 /* Enable 64-Bit DMA */
869 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
870 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
871 if (ret != 0) {
872 dev_err(&pdev->dev,
873 "pci_set_consistent_dma_mask failed\n");
874 goto err_free_resource;
875 }
876 } else {
877 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
878 if (ret != 0) {
879 dev_err(&pdev->dev,
880 "pci_set_dma_mask failed\n");
881 goto err_free_resource;
882 }
883 }
884
885 pci_set_master(pdev);
886
887 /* Map register space */
888 start = pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
889 len = pci_resource_len(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
890 dev->regs = ioremap(start, len);
891 if (!dev->regs) {
892 dev_err(&pdev->dev, "register mapping failed\n");
893 ret = -ENOMEM;
894 goto err_free_resource;
895 }
896
897 /* Setup per-device UAR. */
898 dev->driver_uar.index = 0;
899 dev->driver_uar.pfn =
900 pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_UAR) >>
901 PAGE_SHIFT;
902 dev->driver_uar.map =
903 ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
904 if (!dev->driver_uar.map) {
905 dev_err(&pdev->dev, "failed to remap UAR pages\n");
906 ret = -ENOMEM;
907 goto err_unmap_regs;
908 }
909
910 version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
911 dev_info(&pdev->dev, "device version %d, driver version %d\n",
912 version, PVRDMA_VERSION);
913 if (version < PVRDMA_VERSION) {
914 dev_err(&pdev->dev, "incompatible device version\n");
915 goto err_uar_unmap;
916 }
917
918 dev->dsr = dma_alloc_coherent(&pdev->dev, sizeof(*dev->dsr),
919 &dev->dsrbase, GFP_KERNEL);
920 if (!dev->dsr) {
921 dev_err(&pdev->dev, "failed to allocate shared region\n");
922 ret = -ENOMEM;
923 goto err_uar_unmap;
924 }
925
926 /* Setup the shared region */
927 memset(dev->dsr, 0, sizeof(*dev->dsr));
928 dev->dsr->driver_version = PVRDMA_VERSION;
929 dev->dsr->gos_info.gos_bits = sizeof(void *) == 4 ?
930 PVRDMA_GOS_BITS_32 :
931 PVRDMA_GOS_BITS_64;
932 dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
933 dev->dsr->gos_info.gos_ver = 1;
934 dev->dsr->uar_pfn = dev->driver_uar.pfn;
935
936 /* Command slot. */
937 dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
938 &slot_dma, GFP_KERNEL);
939 if (!dev->cmd_slot) {
940 ret = -ENOMEM;
941 goto err_free_dsr;
942 }
943
944 dev->dsr->cmd_slot_dma = (u64)slot_dma;
945
946 /* Response slot. */
947 dev->resp_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
948 &slot_dma, GFP_KERNEL);
949 if (!dev->resp_slot) {
950 ret = -ENOMEM;
951 goto err_free_slots;
952 }
953
954 dev->dsr->resp_slot_dma = (u64)slot_dma;
955
956 /* Async event ring */
957 dev->dsr->async_ring_pages.num_pages = 4;
958 ret = pvrdma_page_dir_init(dev, &dev->async_pdir,
959 dev->dsr->async_ring_pages.num_pages, true);
960 if (ret)
961 goto err_free_slots;
962 dev->async_ring_state = dev->async_pdir.pages[0];
963 dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma;
964
965 /* CQ notification ring */
966 dev->dsr->cq_ring_pages.num_pages = 4;
967 ret = pvrdma_page_dir_init(dev, &dev->cq_pdir,
968 dev->dsr->cq_ring_pages.num_pages, true);
969 if (ret)
970 goto err_free_async_ring;
971 dev->cq_ring_state = dev->cq_pdir.pages[0];
972 dev->dsr->cq_ring_pages.pdir_dma = dev->cq_pdir.dir_dma;
973
974 /*
975 * Write the PA of the shared region to the device. The writes must be
976 * ordered such that the high bits are written last. When the writes
977 * complete, the device will have filled out the capabilities.
978 */
979
980 pvrdma_write_reg(dev, PVRDMA_REG_DSRLOW, (u32)dev->dsrbase);
981 pvrdma_write_reg(dev, PVRDMA_REG_DSRHIGH,
982 (u32)((u64)(dev->dsrbase) >> 32));
983
984 /* Make sure the write is complete before reading status. */
985 mb();
986
987 /* Currently, the driver only supports RoCE mode. */
988 if (dev->dsr->caps.mode != PVRDMA_DEVICE_MODE_ROCE) {
989 dev_err(&pdev->dev, "unsupported transport %d\n",
990 dev->dsr->caps.mode);
991 ret = -EFAULT;
992 goto err_free_cq_ring;
993 }
994
995 /* Currently, the driver only supports RoCE V1. */
996 if (!(dev->dsr->caps.gid_types & PVRDMA_GID_TYPE_FLAG_ROCE_V1)) {
997 dev_err(&pdev->dev, "driver needs RoCE v1 support\n");
998 ret = -EFAULT;
999 goto err_free_cq_ring;
1000 }
1001
1002 /* Paired vmxnet3 will have same bus, slot. But func will be 0 */
1003 pdev_net = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
1004 if (!pdev_net) {
1005 dev_err(&pdev->dev, "failed to find paired net device\n");
1006 ret = -ENODEV;
1007 goto err_free_cq_ring;
1008 }
1009
1010 if (pdev_net->vendor != PCI_VENDOR_ID_VMWARE ||
1011 pdev_net->device != PCI_DEVICE_ID_VMWARE_VMXNET3) {
1012 dev_err(&pdev->dev, "failed to find paired vmxnet3 device\n");
1013 pci_dev_put(pdev_net);
1014 ret = -ENODEV;
1015 goto err_free_cq_ring;
1016 }
1017
1018 dev->netdev = pci_get_drvdata(pdev_net);
1019 pci_dev_put(pdev_net);
1020 if (!dev->netdev) {
1021 dev_err(&pdev->dev, "failed to get vmxnet3 device\n");
1022 ret = -ENODEV;
1023 goto err_free_cq_ring;
1024 }
1025
1026 dev_info(&pdev->dev, "paired device to %s\n", dev->netdev->name);
1027
1028 /* Interrupt setup */
1029 ret = pvrdma_alloc_intrs(dev);
1030 if (ret) {
1031 dev_err(&pdev->dev, "failed to allocate interrupts\n");
1032 ret = -ENOMEM;
1033 goto err_netdevice;
1034 }
1035
1036 /* Allocate UAR table. */
1037 ret = pvrdma_uar_table_init(dev);
1038 if (ret) {
1039 dev_err(&pdev->dev, "failed to allocate UAR table\n");
1040 ret = -ENOMEM;
1041 goto err_free_intrs;
1042 }
1043
1044 /* Allocate GID table */
1045 dev->sgid_tbl = kcalloc(dev->dsr->caps.gid_tbl_len,
1046 sizeof(union ib_gid), GFP_KERNEL);
1047 if (!dev->sgid_tbl) {
1048 ret = -ENOMEM;
1049 goto err_free_uar_table;
1050 }
1051 dev_dbg(&pdev->dev, "gid table len %d\n", dev->dsr->caps.gid_tbl_len);
1052
1053 pvrdma_enable_intrs(dev);
1054
1055 /* Activate pvrdma device */
1056 pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_ACTIVATE);
1057
1058 /* Make sure the write is complete before reading status. */
1059 mb();
1060
1061 /* Check if device was successfully activated */
1062 ret = pvrdma_read_reg(dev, PVRDMA_REG_ERR);
1063 if (ret != 0) {
1064 dev_err(&pdev->dev, "failed to activate device\n");
1065 ret = -EFAULT;
1066 goto err_disable_intr;
1067 }
1068
1069 /* Register IB device */
1070 ret = pvrdma_register_device(dev);
1071 if (ret) {
1072 dev_err(&pdev->dev, "failed to register IB device\n");
1073 goto err_disable_intr;
1074 }
1075
1076 dev->nb_netdev.notifier_call = pvrdma_netdevice_event;
1077 ret = register_netdevice_notifier(&dev->nb_netdev);
1078 if (ret) {
1079 dev_err(&pdev->dev, "failed to register netdevice events\n");
1080 goto err_unreg_ibdev;
1081 }
1082
1083 dev_info(&pdev->dev, "attached to device\n");
1084 return 0;
1085
1086err_unreg_ibdev:
1087 ib_unregister_device(&dev->ib_dev);
1088err_disable_intr:
1089 pvrdma_disable_intrs(dev);
1090 kfree(dev->sgid_tbl);
1091err_free_uar_table:
1092 pvrdma_uar_table_cleanup(dev);
1093err_free_intrs:
1094 pvrdma_free_irq(dev);
1095 pvrdma_disable_msi_all(dev);
1096err_netdevice:
1097 unregister_netdevice_notifier(&dev->nb_netdev);
1098err_free_cq_ring:
1099 pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
1100err_free_async_ring:
1101 pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
1102err_free_slots:
1103 pvrdma_free_slots(dev);
1104err_free_dsr:
1105 dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
1106 dev->dsrbase);
1107err_uar_unmap:
1108 iounmap(dev->driver_uar.map);
1109err_unmap_regs:
1110 iounmap(dev->regs);
1111err_free_resource:
1112 pci_release_regions(pdev);
1113err_disable_pdev:
1114 pci_disable_device(pdev);
1115 pci_set_drvdata(pdev, NULL);
1116err_free_device:
1117 mutex_lock(&pvrdma_device_list_lock);
1118 list_del(&dev->device_link);
1119 mutex_unlock(&pvrdma_device_list_lock);
1120 ib_dealloc_device(&dev->ib_dev);
1121 return ret;
1122}
1123
1124static void pvrdma_pci_remove(struct pci_dev *pdev)
1125{
1126 struct pvrdma_dev *dev = pci_get_drvdata(pdev);
1127
1128 if (!dev)
1129 return;
1130
1131 dev_info(&pdev->dev, "detaching from device\n");
1132
1133 unregister_netdevice_notifier(&dev->nb_netdev);
1134 dev->nb_netdev.notifier_call = NULL;
1135
1136 flush_workqueue(event_wq);
1137
1138 /* Unregister ib device */
1139 ib_unregister_device(&dev->ib_dev);
1140
1141 mutex_lock(&pvrdma_device_list_lock);
1142 list_del(&dev->device_link);
1143 mutex_unlock(&pvrdma_device_list_lock);
1144
1145 pvrdma_disable_intrs(dev);
1146 pvrdma_free_irq(dev);
1147 pvrdma_disable_msi_all(dev);
1148
1149 /* Deactivate pvrdma device */
1150 pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_RESET);
1151 pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
1152 pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
1153 pvrdma_free_slots(dev);
1154
1155 iounmap(dev->regs);
1156 kfree(dev->sgid_tbl);
1157 kfree(dev->cq_tbl);
1158 kfree(dev->qp_tbl);
1159 pvrdma_uar_table_cleanup(dev);
1160 iounmap(dev->driver_uar.map);
1161
1162 ib_dealloc_device(&dev->ib_dev);
1163
1164 /* Free pci resources */
1165 pci_release_regions(pdev);
1166 pci_disable_device(pdev);
1167 pci_set_drvdata(pdev, NULL);
1168}
1169
1170static struct pci_device_id pvrdma_pci_table[] = {
1171 { PCI_DEVICE(PCI_VENDOR_ID_VMWARE, PCI_DEVICE_ID_VMWARE_PVRDMA), },
1172 { 0 },
1173};
1174
1175MODULE_DEVICE_TABLE(pci, pvrdma_pci_table);
1176
1177static struct pci_driver pvrdma_driver = {
1178 .name = DRV_NAME,
1179 .id_table = pvrdma_pci_table,
1180 .probe = pvrdma_pci_probe,
1181 .remove = pvrdma_pci_remove,
1182};
1183
1184static int __init pvrdma_init(void)
1185{
1186 int err;
1187
1188 event_wq = alloc_ordered_workqueue("pvrdma_event_wq", WQ_MEM_RECLAIM);
1189 if (!event_wq)
1190 return -ENOMEM;
1191
1192 err = pci_register_driver(&pvrdma_driver);
1193 if (err)
1194 destroy_workqueue(event_wq);
1195
1196 return err;
1197}
1198
1199static void __exit pvrdma_cleanup(void)
1200{
1201 pci_unregister_driver(&pvrdma_driver);
1202
1203 destroy_workqueue(event_wq);
1204}
1205
1206module_init(pvrdma_init);
1207module_exit(pvrdma_cleanup);
1208
1209MODULE_AUTHOR("VMware, Inc");
1210MODULE_DESCRIPTION("VMware Paravirtual RDMA driver");
1211MODULE_VERSION(DRV_VERSION);
1212MODULE_LICENSE("Dual BSD/GPL");