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Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +09001/*
2 * Renesas R-Car Gen3 for USB2.0 PHY driver
3 *
Yoshihiro Shimoda7e0540f2017-10-12 15:34:45 +09004 * Copyright (C) 2015-2017 Renesas Electronics Corporation
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +09005 *
6 * This is based on the phy-rcar-gen2 driver:
7 * Copyright (C) 2014 Renesas Solutions Corp.
8 * Copyright (C) 2014 Cogent Embedded, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Chanwoo Choi176aa362017-09-21 12:11:24 +090015#include <linux/extcon-provider.h>
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090016#include <linux/interrupt.h>
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090017#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +090021#include <linux/of_device.h>
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090022#include <linux/phy/phy.h>
23#include <linux/platform_device.h>
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +090024#include <linux/pm_runtime.h>
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +090025#include <linux/regulator/consumer.h>
Yoshihiro Shimoda7e0540f2017-10-12 15:34:45 +090026#include <linux/usb/of.h>
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090027#include <linux/workqueue.h>
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090028
29/******* USB2.0 Host registers (original offset is +0x200) *******/
30#define USB2_INT_ENABLE 0x000
31#define USB2_USBCTR 0x00c
32#define USB2_SPD_RSM_TIMSET 0x10c
33#define USB2_OC_TIMSET 0x110
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090034#define USB2_COMMCTRL 0x600
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090035#define USB2_OBINTSTA 0x604
36#define USB2_OBINTEN 0x608
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090037#define USB2_VBCTRL 0x60c
38#define USB2_LINECTRL1 0x610
39#define USB2_ADPCTRL 0x630
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090040
41/* INT_ENABLE */
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090042#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090043#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
44#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090045#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
46 USB2_INT_ENABLE_USBH_INTB_EN | \
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090047 USB2_INT_ENABLE_USBH_INTA_EN)
48
49/* USBCTR */
50#define USB2_USBCTR_DIRPD BIT(2)
51#define USB2_USBCTR_PLL_RST BIT(1)
52
53/* SPD_RSM_TIMSET */
54#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
55
56/* OC_TIMSET */
57#define USB2_OC_TIMSET_INIT 0x000209ab
58
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090059/* COMMCTRL */
60#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
61
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090062/* OBINTSTA and OBINTEN */
63#define USB2_OBINT_SESSVLDCHG BIT(12)
64#define USB2_OBINT_IDDIGCHG BIT(11)
65#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
66 USB2_OBINT_IDDIGCHG)
67
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090068/* VBCTRL */
69#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
70
71/* LINECTRL1 */
72#define USB2_LINECTRL1_DPRPD_EN BIT(19)
73#define USB2_LINECTRL1_DP_RPD BIT(18)
74#define USB2_LINECTRL1_DMRPD_EN BIT(17)
75#define USB2_LINECTRL1_DM_RPD BIT(16)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +090076#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090077
78/* ADPCTRL */
79#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
80#define USB2_ADPCTRL_IDDIG BIT(19)
81#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
82#define USB2_ADPCTRL_DRVVBUS BIT(4)
83
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +090084#define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1
85
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090086struct rcar_gen3_chan {
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +090087 void __iomem *base;
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +053088 struct extcon_dev *extcon;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090089 struct phy *phy;
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +090090 struct regulator *vbus;
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090091 struct work_struct work;
92 bool extcon_host;
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +090093 bool has_otg_pins;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090094};
95
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090096static void rcar_gen3_phy_usb2_work(struct work_struct *work)
97{
98 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
99 work);
100
101 if (ch->extcon_host) {
Chanwoo Choic6f30a52016-12-30 13:11:28 +0900102 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
103 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900104 } else {
Chanwoo Choic6f30a52016-12-30 13:11:28 +0900105 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
106 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900107 }
108}
109
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900110static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
111{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900112 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900113 u32 val = readl(usb2_base + USB2_COMMCTRL);
114
115 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
116 if (host)
117 val &= ~USB2_COMMCTRL_OTG_PERI;
118 else
119 val |= USB2_COMMCTRL_OTG_PERI;
120 writel(val, usb2_base + USB2_COMMCTRL);
121}
122
123static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
124{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900125 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900126 u32 val = readl(usb2_base + USB2_LINECTRL1);
127
128 dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
129 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
130 if (dp)
131 val |= USB2_LINECTRL1_DP_RPD;
132 if (dm)
133 val |= USB2_LINECTRL1_DM_RPD;
134 writel(val, usb2_base + USB2_LINECTRL1);
135}
136
137static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
138{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900139 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900140 u32 val = readl(usb2_base + USB2_ADPCTRL);
141
142 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
143 if (vbus)
144 val |= USB2_ADPCTRL_DRVVBUS;
145 else
146 val &= ~USB2_ADPCTRL_DRVVBUS;
147 writel(val, usb2_base + USB2_ADPCTRL);
148}
149
150static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
151{
152 rcar_gen3_set_linectrl(ch, 1, 1);
153 rcar_gen3_set_host_mode(ch, 1);
154 rcar_gen3_enable_vbus_ctrl(ch, 1);
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530155
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900156 ch->extcon_host = true;
157 schedule_work(&ch->work);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900158}
159
160static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
161{
162 rcar_gen3_set_linectrl(ch, 0, 1);
163 rcar_gen3_set_host_mode(ch, 0);
164 rcar_gen3_enable_vbus_ctrl(ch, 0);
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530165
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900166 ch->extcon_host = false;
167 schedule_work(&ch->work);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900168}
169
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900170static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
171{
172 void __iomem *usb2_base = ch->base;
173 u32 val;
174
175 val = readl(usb2_base + USB2_LINECTRL1);
176 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
177
178 rcar_gen3_set_linectrl(ch, 1, 1);
179 rcar_gen3_set_host_mode(ch, 1);
180 rcar_gen3_enable_vbus_ctrl(ch, 0);
181
182 val = readl(usb2_base + USB2_LINECTRL1);
183 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
184}
185
186static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
187{
188 rcar_gen3_set_linectrl(ch, 0, 1);
189 rcar_gen3_set_host_mode(ch, 0);
190 rcar_gen3_enable_vbus_ctrl(ch, 1);
191}
192
193static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
194{
195 void __iomem *usb2_base = ch->base;
196 u32 val;
197
198 val = readl(usb2_base + USB2_OBINTEN);
199 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
200
201 rcar_gen3_enable_vbus_ctrl(ch, 0);
202 rcar_gen3_init_for_host(ch);
203
204 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
205}
206
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900207static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
208{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900209 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900210}
211
212static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
213{
Yoshihiro Shimoda67629252016-05-31 21:47:17 +0900214 if (!rcar_gen3_check_id(ch))
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900215 rcar_gen3_init_for_host(ch);
216 else
217 rcar_gen3_init_for_peri(ch);
218}
219
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900220static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
221{
222 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
223}
224
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900225static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
226{
227 if (rcar_gen3_is_host(ch))
228 return PHY_MODE_USB_HOST;
229
230 return PHY_MODE_USB_DEVICE;
231}
232
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900233static ssize_t role_store(struct device *dev, struct device_attribute *attr,
234 const char *buf, size_t count)
235{
236 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900237 bool is_b_device;
238 enum phy_mode cur_mode, new_mode;
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900239
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900240 if (!ch->has_otg_pins || !ch->phy->init_count)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900241 return -EIO;
242
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900243 if (!strncmp(buf, "host", strlen("host")))
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900244 new_mode = PHY_MODE_USB_HOST;
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900245 else if (!strncmp(buf, "peripheral", strlen("peripheral")))
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900246 new_mode = PHY_MODE_USB_DEVICE;
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900247 else
248 return -EINVAL;
249
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900250 /* is_b_device: true is B-Device. false is A-Device. */
251 is_b_device = rcar_gen3_check_id(ch);
252 cur_mode = rcar_gen3_get_phy_mode(ch);
253
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900254 /* If current and new mode is the same, this returns the error */
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900255 if (cur_mode == new_mode)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900256 return -EINVAL;
257
Yoshihiro Shimodab56acc82017-10-12 15:34:46 +0900258 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900259 if (!is_b_device) /* A-Peripheral */
260 rcar_gen3_init_from_a_peri_to_a_host(ch);
261 else /* B-Peripheral */
262 rcar_gen3_init_for_b_host(ch);
263 } else { /* And is_host must be true */
264 if (!is_b_device) /* A-Host */
265 rcar_gen3_init_for_a_peri(ch);
266 else /* B-Host */
267 rcar_gen3_init_for_peri(ch);
268 }
269
270 return count;
271}
272
273static ssize_t role_show(struct device *dev, struct device_attribute *attr,
274 char *buf)
275{
276 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
277
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900278 if (!ch->has_otg_pins || !ch->phy->init_count)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900279 return -EIO;
280
281 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
282 "peripheral");
283}
284static DEVICE_ATTR_RW(role);
285
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900286static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
287{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900288 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900289 u32 val;
290
291 val = readl(usb2_base + USB2_VBCTRL);
292 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900293 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
294 val = readl(usb2_base + USB2_OBINTEN);
295 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900296 val = readl(usb2_base + USB2_ADPCTRL);
297 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
298 val = readl(usb2_base + USB2_LINECTRL1);
299 rcar_gen3_set_linectrl(ch, 0, 0);
300 writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
301 usb2_base + USB2_LINECTRL1);
302
303 rcar_gen3_device_recognition(ch);
304}
305
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900306static int rcar_gen3_phy_usb2_init(struct phy *p)
307{
308 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900309 void __iomem *usb2_base = channel->base;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900310
311 /* Initialize USB2 part */
312 writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
313 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
314 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
315
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900316 /* Initialize otg part */
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900317 if (channel->has_otg_pins)
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900318 rcar_gen3_init_otg(channel);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900319
320 return 0;
321}
322
323static int rcar_gen3_phy_usb2_exit(struct phy *p)
324{
325 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
326
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900327 writel(0, channel->base + USB2_INT_ENABLE);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900328
329 return 0;
330}
331
332static int rcar_gen3_phy_usb2_power_on(struct phy *p)
333{
334 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900335 void __iomem *usb2_base = channel->base;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900336 u32 val;
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900337 int ret;
338
339 if (channel->vbus) {
340 ret = regulator_enable(channel->vbus);
341 if (ret)
342 return ret;
343 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900344
345 val = readl(usb2_base + USB2_USBCTR);
346 val |= USB2_USBCTR_PLL_RST;
347 writel(val, usb2_base + USB2_USBCTR);
348 val &= ~USB2_USBCTR_PLL_RST;
349 writel(val, usb2_base + USB2_USBCTR);
350
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900351 return 0;
352}
353
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900354static int rcar_gen3_phy_usb2_power_off(struct phy *p)
355{
356 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
357 int ret = 0;
358
359 if (channel->vbus)
360 ret = regulator_disable(channel->vbus);
361
362 return ret;
363}
364
Bhumika Goyala8df2762017-01-08 16:05:56 +0530365static const struct phy_ops rcar_gen3_phy_usb2_ops = {
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900366 .init = rcar_gen3_phy_usb2_init,
367 .exit = rcar_gen3_phy_usb2_exit,
368 .power_on = rcar_gen3_phy_usb2_power_on,
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900369 .power_off = rcar_gen3_phy_usb2_power_off,
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900370 .owner = THIS_MODULE,
371};
372
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900373static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
374{
375 struct rcar_gen3_chan *ch = _ch;
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900376 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900377 u32 status = readl(usb2_base + USB2_OBINTSTA);
378 irqreturn_t ret = IRQ_NONE;
379
380 if (status & USB2_OBINT_BITS) {
381 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
382 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
383 rcar_gen3_device_recognition(ch);
384 ret = IRQ_HANDLED;
385 }
386
387 return ret;
388}
389
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900390static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900391 {
392 .compatible = "renesas,usb2-phy-r8a7795",
393 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
394 },
395 {
396 .compatible = "renesas,usb2-phy-r8a7796",
397 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
398 },
399 {
Yoshihiro Shimoda44e42df2018-03-05 14:32:44 +0900400 .compatible = "renesas,usb2-phy-r8a77965",
401 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
402 },
403 {
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900404 .compatible = "renesas,rcar-gen3-usb2-phy",
405 },
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900406 { }
407};
408MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
409
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530410static const unsigned int rcar_gen3_phy_cable[] = {
411 EXTCON_USB,
412 EXTCON_USB_HOST,
413 EXTCON_NONE,
414};
415
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900416static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
417{
418 struct device *dev = &pdev->dev;
419 struct rcar_gen3_chan *channel;
420 struct phy_provider *provider;
421 struct resource *res;
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900422 int irq, ret = 0;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900423
424 if (!dev->of_node) {
425 dev_err(dev, "This driver needs device tree\n");
426 return -EINVAL;
427 }
428
429 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
430 if (!channel)
431 return -ENOMEM;
432
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900433 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900434 channel->base = devm_ioremap_resource(dev, res);
435 if (IS_ERR(channel->base))
436 return PTR_ERR(channel->base);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900437
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900438 /* call request_irq for OTG */
439 irq = platform_get_irq(pdev, 0);
440 if (irq >= 0) {
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900441 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900442 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
443 IRQF_SHARED, dev_name(dev), channel);
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900444 if (irq < 0)
445 dev_err(dev, "No irq handler (%d)\n", irq);
Yoshihiro Shimoda7e0540f2017-10-12 15:34:45 +0900446 }
447
448 if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
449 int ret;
450
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900451 channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev);
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530452 channel->extcon = devm_extcon_dev_allocate(dev,
453 rcar_gen3_phy_cable);
454 if (IS_ERR(channel->extcon))
455 return PTR_ERR(channel->extcon);
456
457 ret = devm_extcon_dev_register(dev, channel->extcon);
458 if (ret < 0) {
459 dev_err(dev, "Failed to register extcon\n");
460 return ret;
461 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900462 }
463
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900464 /*
465 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
466 * And then, phy-core will manage runtime pm for this device.
467 */
468 pm_runtime_enable(dev);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900469 channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
470 if (IS_ERR(channel->phy)) {
471 dev_err(dev, "Failed to create USB2 PHY\n");
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900472 ret = PTR_ERR(channel->phy);
473 goto error;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900474 }
475
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900476 channel->vbus = devm_regulator_get_optional(dev, "vbus");
477 if (IS_ERR(channel->vbus)) {
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900478 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
479 ret = PTR_ERR(channel->vbus);
480 goto error;
481 }
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900482 channel->vbus = NULL;
483 }
484
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900485 platform_set_drvdata(pdev, channel);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900486 phy_set_drvdata(channel->phy, channel);
487
488 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900489 if (IS_ERR(provider)) {
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900490 dev_err(dev, "Failed to register PHY provider\n");
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900491 ret = PTR_ERR(provider);
492 goto error;
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900493 } else if (channel->has_otg_pins) {
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900494 int ret;
495
496 ret = device_create_file(dev, &dev_attr_role);
497 if (ret < 0)
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900498 goto error;
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900499 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900500
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900501 return 0;
502
503error:
504 pm_runtime_disable(dev);
505
506 return ret;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900507}
508
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900509static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
510{
511 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
512
Yoshihiro Shimoda9adaaa92017-10-12 15:34:47 +0900513 if (channel->has_otg_pins)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900514 device_remove_file(&pdev->dev, &dev_attr_role);
515
Yoshihiro Shimoda441a6812017-03-14 08:37:40 +0900516 pm_runtime_disable(&pdev->dev);
517
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900518 return 0;
519};
520
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900521static struct platform_driver rcar_gen3_phy_usb2_driver = {
522 .driver = {
523 .name = "phy_rcar_gen3_usb2",
524 .of_match_table = rcar_gen3_phy_usb2_match_table,
525 },
526 .probe = rcar_gen3_phy_usb2_probe,
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900527 .remove = rcar_gen3_phy_usb2_remove,
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900528};
529module_platform_driver(rcar_gen3_phy_usb2_driver);
530
531MODULE_LICENSE("GPL v2");
532MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
533MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");