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Heikki Krogerusd9eda9b2015-10-13 13:29:02 +03001/*
2 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
3 *
4 * Copyright (C) 2015 Intel Corporation
5 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
Andy Shevchenkodea5ac32016-04-04 17:35:11 +030012#include <linux/bitops.h>
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030013#include <linux/module.h>
14#include <linux/pci.h>
Andy Shevchenkodea5ac32016-04-04 17:35:11 +030015#include <linux/rational.h>
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030016
17#include <linux/dma/hsu.h>
Andy Shevchenko107e15f2016-04-04 17:35:09 +030018#include <linux/8250_pci.h>
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030019
20#include "8250.h"
21
22#define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
23#define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
24#define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
25#define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +030026#define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030027
28/* Intel MID Specific registers */
Andy Shevchenkoc42850f2016-04-04 17:35:10 +030029#define INTEL_MID_UART_DNV_FISR 0x08
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030030#define INTEL_MID_UART_PS 0x30
31#define INTEL_MID_UART_MUL 0x34
32#define INTEL_MID_UART_DIV 0x38
33
34struct mid8250;
35
36struct mid8250_board {
Andy Shevchenko107e15f2016-04-04 17:35:09 +030037 unsigned int flags;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030038 unsigned long freq;
39 unsigned int base_baud;
40 int (*setup)(struct mid8250 *, struct uart_port *p);
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +030041 void (*exit)(struct mid8250 *);
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030042};
43
44struct mid8250 {
45 int line;
46 int dma_index;
47 struct pci_dev *dma_dev;
48 struct uart_8250_dma dma;
49 struct mid8250_board *board;
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +030050 struct hsu_dma_chip dma_chip;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030051};
52
53/*****************************************************************************/
54
55static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
56{
57 struct pci_dev *pdev = to_pci_dev(p->dev);
58
59 switch (pdev->device) {
60 case PCI_DEVICE_ID_INTEL_PNW_UART1:
61 mid->dma_index = 0;
62 break;
63 case PCI_DEVICE_ID_INTEL_PNW_UART2:
64 mid->dma_index = 1;
65 break;
66 case PCI_DEVICE_ID_INTEL_PNW_UART3:
67 mid->dma_index = 2;
68 break;
69 default:
70 return -EINVAL;
71 }
72
73 mid->dma_dev = pci_get_slot(pdev->bus,
74 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
75 return 0;
76}
77
78static int tng_setup(struct mid8250 *mid, struct uart_port *p)
79{
80 struct pci_dev *pdev = to_pci_dev(p->dev);
81 int index = PCI_FUNC(pdev->devfn);
82
Andy Shevchenkoceeafb82016-04-04 17:35:13 +030083 /*
84 * Device 0000:00:04.0 is not a real HSU port. It provides a global
85 * register set for all HSU ports, although it has the same PCI ID.
86 * Skip it here.
87 */
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +030088 if (index-- == 0)
89 return -ENODEV;
90
91 mid->dma_index = index;
92 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
93 return 0;
94}
95
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +030096static int dnv_handle_irq(struct uart_port *p)
97{
98 struct mid8250 *mid = p->private_data;
Andy Shevchenkoc42850f2016-04-04 17:35:10 +030099 unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
Chuah, Kim Tattc6f82782016-06-15 13:44:11 +0800100 u32 status;
Andy Shevchenkoc42850f2016-04-04 17:35:10 +0300101 int ret = IRQ_NONE;
Chuah, Kim Tattc6f82782016-06-15 13:44:11 +0800102 int err;
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300103
Chuah, Kim Tattc6f82782016-06-15 13:44:11 +0800104 if (fisr & BIT(2)) {
105 err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
106 if (err > 0)
107 ret |= IRQ_HANDLED;
108 else if (err == 0)
109 ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
110 }
111 if (fisr & BIT(1)) {
112 err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
113 if (err > 0)
114 ret |= IRQ_HANDLED;
115 else if (err == 0)
116 ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
117 }
Andy Shevchenkoc42850f2016-04-04 17:35:10 +0300118 if (fisr & BIT(0))
119 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
120 return ret;
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300121}
122
123#define DNV_DMA_CHAN_OFFSET 0x80
124
125static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
126{
127 struct hsu_dma_chip *chip = &mid->dma_chip;
128 struct pci_dev *pdev = to_pci_dev(p->dev);
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300129 unsigned int bar = FL_GET_BASE(mid->board->flags);
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300130 int ret;
131
132 chip->dev = &pdev->dev;
133 chip->irq = pdev->irq;
134 chip->regs = p->membase;
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300135 chip->length = pci_resource_len(pdev, bar);
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300136 chip->offset = DNV_DMA_CHAN_OFFSET;
137
138 /* Falling back to PIO mode if DMA probing fails */
139 ret = hsu_dma_probe(chip);
140 if (ret)
141 return 0;
142
143 mid->dma_dev = pdev;
144
145 p->handle_irq = dnv_handle_irq;
146 return 0;
147}
148
149static void dnv_exit(struct mid8250 *mid)
150{
151 if (!mid->dma_dev)
152 return;
153 hsu_dma_remove(&mid->dma_chip);
154}
155
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300156/*****************************************************************************/
157
158static void mid8250_set_termios(struct uart_port *p,
159 struct ktermios *termios,
160 struct ktermios *old)
161{
162 unsigned int baud = tty_termios_baud_rate(termios);
163 struct mid8250 *mid = p->private_data;
164 unsigned short ps = 16;
165 unsigned long fuart = baud * ps;
166 unsigned long w = BIT(24) - 1;
167 unsigned long mul, div;
168
169 if (mid->board->freq < fuart) {
170 /* Find prescaler value that satisfies Fuart < Fref */
171 if (mid->board->freq > baud)
172 ps = mid->board->freq / baud; /* baud rate too high */
173 else
174 ps = 1; /* PLL case */
175 fuart = baud * ps;
176 } else {
177 /* Get Fuart closer to Fref */
178 fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
179 }
180
181 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
182 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
183
184 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
185 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
186 writel(div, p->membase + INTEL_MID_UART_DIV);
187
188 serial8250_do_set_termios(p, termios, old);
189}
190
191static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
192{
193 struct hsu_dma_slave *s = param;
194
195 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
196 return false;
197
198 chan->private = s;
199 return true;
200}
201
202static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
203{
204 struct uart_8250_dma *dma = &mid->dma;
205 struct device *dev = port->port.dev;
206 struct hsu_dma_slave *rx_param;
207 struct hsu_dma_slave *tx_param;
208
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300209 if (!mid->dma_dev)
210 return 0;
211
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300212 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
213 if (!rx_param)
214 return -ENOMEM;
215
216 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
217 if (!tx_param)
218 return -ENOMEM;
219
220 rx_param->chan_id = mid->dma_index * 2 + 1;
221 tx_param->chan_id = mid->dma_index * 2;
222
223 dma->rxconf.src_maxburst = 64;
224 dma->txconf.dst_maxburst = 64;
225
226 rx_param->dma_dev = &mid->dma_dev->dev;
227 tx_param->dma_dev = &mid->dma_dev->dev;
228
229 dma->fn = mid8250_dma_filter;
230 dma->rx_param = rx_param;
231 dma->tx_param = tx_param;
232
233 port->dma = dma;
234 return 0;
235}
236
237static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
238{
239 struct uart_8250_port uart;
240 struct mid8250 *mid;
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300241 unsigned int bar;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300242 int ret;
243
244 ret = pcim_enable_device(pdev);
245 if (ret)
246 return ret;
247
248 pci_set_master(pdev);
249
250 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
251 if (!mid)
252 return -ENOMEM;
253
254 mid->board = (struct mid8250_board *)id->driver_data;
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300255 bar = FL_GET_BASE(mid->board->flags);
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300256
257 memset(&uart, 0, sizeof(struct uart_8250_port));
258
259 uart.port.dev = &pdev->dev;
260 uart.port.irq = pdev->irq;
261 uart.port.private_data = mid;
262 uart.port.type = PORT_16750;
263 uart.port.iotype = UPIO_MEM;
264 uart.port.uartclk = mid->board->base_baud * 16;
265 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
266 uart.port.set_termios = mid8250_set_termios;
267
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300268 uart.port.mapbase = pci_resource_start(pdev, bar);
269 uart.port.membase = pcim_iomap(pdev, bar, 0);
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300270 if (!uart.port.membase)
271 return -ENOMEM;
272
273 if (mid->board->setup) {
274 ret = mid->board->setup(mid, &uart.port);
275 if (ret)
276 return ret;
277 }
278
279 ret = mid8250_dma_setup(mid, &uart);
280 if (ret)
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300281 goto err;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300282
283 ret = serial8250_register_8250_port(&uart);
284 if (ret < 0)
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300285 goto err;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300286
287 mid->line = ret;
288
289 pci_set_drvdata(pdev, mid);
290 return 0;
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300291err:
292 if (mid->board->exit)
293 mid->board->exit(mid);
294 return ret;
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300295}
296
297static void mid8250_remove(struct pci_dev *pdev)
298{
299 struct mid8250 *mid = pci_get_drvdata(pdev);
300
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300301 if (mid->board->exit)
302 mid->board->exit(mid);
303
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300304 serial8250_unregister_port(mid->line);
305}
306
307static const struct mid8250_board pnw_board = {
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300308 .flags = FL_BASE0,
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300309 .freq = 50000000,
310 .base_baud = 115200,
311 .setup = pnw_setup,
312};
313
314static const struct mid8250_board tng_board = {
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300315 .flags = FL_BASE0,
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300316 .freq = 38400000,
317 .base_baud = 1843200,
318 .setup = tng_setup,
319};
320
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300321static const struct mid8250_board dnv_board = {
Andy Shevchenko107e15f2016-04-04 17:35:09 +0300322 .flags = FL_BASE1,
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300323 .freq = 133333333,
324 .base_baud = 115200,
325 .setup = dnv_setup,
326 .exit = dnv_exit,
327};
328
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300329#define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
330
331static const struct pci_device_id pci_ids[] = {
332 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
333 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
334 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
335 MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
Heikki Krogerus6ede6dc2015-10-13 13:29:06 +0300336 MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
Heikki Krogerusd9eda9b2015-10-13 13:29:02 +0300337 { },
338};
339MODULE_DEVICE_TABLE(pci, pci_ids);
340
341static struct pci_driver mid8250_pci_driver = {
342 .name = "8250_mid",
343 .id_table = pci_ids,
344 .probe = mid8250_probe,
345 .remove = mid8250_remove,
346};
347
348module_pci_driver(mid8250_pci_driver);
349
350MODULE_AUTHOR("Intel Corporation");
351MODULE_LICENSE("GPL v2");
352MODULE_DESCRIPTION("Intel MID UART driver");