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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
35enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030036 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
37 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
38 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
39 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
40 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
41 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
42 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
43 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
44 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
45 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
46 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
47 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
48 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
49 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
50 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
51 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
52 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
53 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
54 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
55 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
56 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
57 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
58 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
59 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb
60};
61
62enum {
63 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
64 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
65 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
66 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
67};
68
69enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020070 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
71 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
72};
73
74enum {
Eli Cohend29b7962014-10-02 12:19:43 +030075 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
76 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
77 MLX5_CMD_OP_INIT_HCA = 0x102,
78 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
79 MLX5_CMD_OP_ENABLE_HCA = 0x104,
80 MLX5_CMD_OP_DISABLE_HCA = 0x105,
81 MLX5_CMD_OP_QUERY_PAGES = 0x107,
82 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
83 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030084 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
85 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020086 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030087 MLX5_CMD_OP_CREATE_MKEY = 0x200,
88 MLX5_CMD_OP_QUERY_MKEY = 0x201,
89 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
90 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
91 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
92 MLX5_CMD_OP_CREATE_EQ = 0x301,
93 MLX5_CMD_OP_DESTROY_EQ = 0x302,
94 MLX5_CMD_OP_QUERY_EQ = 0x303,
95 MLX5_CMD_OP_GEN_EQE = 0x304,
96 MLX5_CMD_OP_CREATE_CQ = 0x400,
97 MLX5_CMD_OP_DESTROY_CQ = 0x401,
98 MLX5_CMD_OP_QUERY_CQ = 0x402,
99 MLX5_CMD_OP_MODIFY_CQ = 0x403,
100 MLX5_CMD_OP_CREATE_QP = 0x500,
101 MLX5_CMD_OP_DESTROY_QP = 0x501,
102 MLX5_CMD_OP_RST2INIT_QP = 0x502,
103 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
104 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
105 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
106 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
107 MLX5_CMD_OP_2ERR_QP = 0x507,
108 MLX5_CMD_OP_2RST_QP = 0x50a,
109 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300110 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300111 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
112 MLX5_CMD_OP_CREATE_PSV = 0x600,
113 MLX5_CMD_OP_DESTROY_PSV = 0x601,
114 MLX5_CMD_OP_CREATE_SRQ = 0x700,
115 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
116 MLX5_CMD_OP_QUERY_SRQ = 0x702,
117 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300118 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
119 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
120 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
121 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300122 MLX5_CMD_OP_CREATE_DCT = 0x710,
123 MLX5_CMD_OP_DESTROY_DCT = 0x711,
124 MLX5_CMD_OP_DRAIN_DCT = 0x712,
125 MLX5_CMD_OP_QUERY_DCT = 0x713,
126 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300127 MLX5_CMD_OP_CREATE_XRQ = 0x717,
128 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
129 MLX5_CMD_OP_QUERY_XRQ = 0x719,
130 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300131 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
132 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
133 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
134 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
135 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
136 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300137 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300138 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300139 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
140 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
141 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
142 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
144 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
145 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
146 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300147 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
148 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300149 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
150 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
151 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
152 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
153 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
154 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300155 MLX5_CMD_OP_ALLOC_PD = 0x800,
156 MLX5_CMD_OP_DEALLOC_PD = 0x801,
157 MLX5_CMD_OP_ALLOC_UAR = 0x802,
158 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
159 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
160 MLX5_CMD_OP_ACCESS_REG = 0x805,
161 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300162 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300163 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
164 MLX5_CMD_OP_MAD_IFC = 0x50d,
165 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
166 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
167 MLX5_CMD_OP_NOP = 0x80d,
168 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
169 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300170 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
171 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
172 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
173 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
174 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
175 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
176 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
177 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
178 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
179 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
180 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
181 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200182 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
183 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300184 MLX5_CMD_OP_CREATE_LAG = 0x840,
185 MLX5_CMD_OP_MODIFY_LAG = 0x841,
186 MLX5_CMD_OP_QUERY_LAG = 0x842,
187 MLX5_CMD_OP_DESTROY_LAG = 0x843,
188 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
189 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300190 MLX5_CMD_OP_CREATE_TIR = 0x900,
191 MLX5_CMD_OP_MODIFY_TIR = 0x901,
192 MLX5_CMD_OP_DESTROY_TIR = 0x902,
193 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_SQ = 0x904,
195 MLX5_CMD_OP_MODIFY_SQ = 0x905,
196 MLX5_CMD_OP_DESTROY_SQ = 0x906,
197 MLX5_CMD_OP_QUERY_SQ = 0x907,
198 MLX5_CMD_OP_CREATE_RQ = 0x908,
199 MLX5_CMD_OP_MODIFY_RQ = 0x909,
200 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
201 MLX5_CMD_OP_QUERY_RQ = 0x90b,
202 MLX5_CMD_OP_CREATE_RMP = 0x90c,
203 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
204 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
205 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300206 MLX5_CMD_OP_CREATE_TIS = 0x912,
207 MLX5_CMD_OP_MODIFY_TIS = 0x913,
208 MLX5_CMD_OP_DESTROY_TIS = 0x914,
209 MLX5_CMD_OP_QUERY_TIS = 0x915,
210 MLX5_CMD_OP_CREATE_RQT = 0x916,
211 MLX5_CMD_OP_MODIFY_RQT = 0x917,
212 MLX5_CMD_OP_DESTROY_RQT = 0x918,
213 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200214 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300215 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
216 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
217 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
218 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
219 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
220 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
221 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200223 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000224 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
225 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
226 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300227 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300228 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
229 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200230 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
231 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Shahar Klein86d56a12016-06-10 00:07:30 +0300232 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300233};
234
235struct mlx5_ifc_flow_table_fields_supported_bits {
236 u8 outer_dmac[0x1];
237 u8 outer_smac[0x1];
238 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300239 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300240 u8 outer_first_prio[0x1];
241 u8 outer_first_cfi[0x1];
242 u8 outer_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200243 u8 reserved_at_7[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300244 u8 outer_second_prio[0x1];
245 u8 outer_second_cfi[0x1];
246 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200247 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_sip[0x1];
249 u8 outer_dip[0x1];
250 u8 outer_frag[0x1];
251 u8 outer_ip_protocol[0x1];
252 u8 outer_ip_ecn[0x1];
253 u8 outer_ip_dscp[0x1];
254 u8 outer_udp_sport[0x1];
255 u8 outer_udp_dport[0x1];
256 u8 outer_tcp_sport[0x1];
257 u8 outer_tcp_dport[0x1];
258 u8 outer_tcp_flags[0x1];
259 u8 outer_gre_protocol[0x1];
260 u8 outer_gre_key[0x1];
261 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200262 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300263 u8 source_eswitch_port[0x1];
264
265 u8 inner_dmac[0x1];
266 u8 inner_smac[0x1];
267 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300268 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300269 u8 inner_first_prio[0x1];
270 u8 inner_first_cfi[0x1];
271 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200272 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300273 u8 inner_second_prio[0x1];
274 u8 inner_second_cfi[0x1];
275 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200276 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_sip[0x1];
278 u8 inner_dip[0x1];
279 u8 inner_frag[0x1];
280 u8 inner_ip_protocol[0x1];
281 u8 inner_ip_ecn[0x1];
282 u8 inner_ip_dscp[0x1];
283 u8 inner_udp_sport[0x1];
284 u8 inner_udp_dport[0x1];
285 u8 inner_tcp_sport[0x1];
286 u8 inner_tcp_dport[0x1];
287 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289
Matan Barakb4ff3a32016-02-09 14:57:42 +0200290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300291};
292
293struct mlx5_ifc_flow_table_prop_layout_bits {
294 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000295 u8 reserved_at_1[0x1];
296 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200297 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200298 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200299 u8 identified_miss_table_mode[0x1];
300 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300301 u8 encap[0x1];
302 u8 decap[0x1];
303 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304
Matan Barakb4ff3a32016-02-09 14:57:42 +0200305 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300306 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200307 u8 log_max_modify_header_context[0x8];
308 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300309 u8 max_ft_level[0x8];
310
Matan Barakb4ff3a32016-02-09 14:57:42 +0200311 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200314 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200317 u8 log_max_destination[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 log_max_flow[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
324 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
325
326 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
327};
328
329struct mlx5_ifc_odp_per_transport_service_cap_bits {
330 u8 send[0x1];
331 u8 receive[0x1];
332 u8 write[0x1];
333 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200334 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337};
338
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200339struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200340 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200341
342 u8 ipv4[0x20];
343};
344
345struct mlx5_ifc_ipv6_layout_bits {
346 u8 ipv6[16][0x8];
347};
348
349union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
350 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
351 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353};
354
Saeed Mahameede2816822015-05-28 22:28:40 +0300355struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
356 u8 smac_47_16[0x20];
357
358 u8 smac_15_0[0x10];
359 u8 ethertype[0x10];
360
361 u8 dmac_47_16[0x20];
362
363 u8 dmac_15_0[0x10];
364 u8 first_prio[0x3];
365 u8 first_cfi[0x1];
366 u8 first_vid[0xc];
367
368 u8 ip_protocol[0x8];
369 u8 ip_dscp[0x6];
370 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300371 u8 cvlan_tag[0x1];
372 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300373 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300374 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300375 u8 tcp_flags[0x9];
376
377 u8 tcp_sport[0x10];
378 u8 tcp_dport[0x10];
379
Matan Barakb4ff3a32016-02-09 14:57:42 +0200380 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381
382 u8 udp_sport[0x10];
383 u8 udp_dport[0x10];
384
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200385 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300386
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200387 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300388};
389
390struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300391 u8 reserved_at_0[0x8];
392 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393
Matan Barakb4ff3a32016-02-09 14:57:42 +0200394 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300395 u8 source_port[0x10];
396
397 u8 outer_second_prio[0x3];
398 u8 outer_second_cfi[0x1];
399 u8 outer_second_vid[0xc];
400 u8 inner_second_prio[0x3];
401 u8 inner_second_cfi[0x1];
402 u8 inner_second_vid[0xc];
403
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300404 u8 outer_second_cvlan_tag[0x1];
405 u8 inner_second_cvlan_tag[0x1];
406 u8 outer_second_svlan_tag[0x1];
407 u8 inner_second_svlan_tag[0x1];
408 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300409 u8 gre_protocol[0x10];
410
411 u8 gre_key_h[0x18];
412 u8 gre_key_l[0x8];
413
414 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200415 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300416
Matan Barakb4ff3a32016-02-09 14:57:42 +0200417 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418
Matan Barakb4ff3a32016-02-09 14:57:42 +0200419 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300420 u8 outer_ipv6_flow_label[0x14];
421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423 u8 inner_ipv6_flow_label[0x14];
424
Matan Barakb4ff3a32016-02-09 14:57:42 +0200425 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426};
427
428struct mlx5_ifc_cmd_pas_bits {
429 u8 pa_h[0x20];
430
431 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433};
434
435struct mlx5_ifc_uint64_bits {
436 u8 hi[0x20];
437
438 u8 lo[0x20];
439};
440
441enum {
442 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
443 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
444 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
445 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
446 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
447 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
448 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
449 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
450 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
451 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
452};
453
454struct mlx5_ifc_ads_bits {
455 u8 fl[0x1];
456 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200457 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300458 u8 pkey_index[0x10];
459
Matan Barakb4ff3a32016-02-09 14:57:42 +0200460 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300461 u8 grh[0x1];
462 u8 mlid[0x7];
463 u8 rlid[0x10];
464
465 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200468 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300469 u8 stat_rate[0x4];
470 u8 hop_limit[0x8];
471
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 tclass[0x8];
474 u8 flow_label[0x14];
475
476 u8 rgid_rip[16][0x8];
477
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 f_dscp[0x1];
480 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 f_eth_prio[0x1];
483 u8 ecn[0x2];
484 u8 dscp[0x6];
485 u8 udp_sport[0x10];
486
487 u8 dei_cfi[0x1];
488 u8 eth_prio[0x3];
489 u8 sl[0x4];
490 u8 port[0x8];
491 u8 rmac_47_32[0x10];
492
493 u8 rmac_31_0[0x20];
494};
495
496struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200497 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300498 u8 nic_rx_multi_path_tirs_fts[0x1];
499 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
500 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501
502 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
503
Matan Barakb4ff3a32016-02-09 14:57:42 +0200504 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300505
506 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
507
508 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
509
Matan Barakb4ff3a32016-02-09 14:57:42 +0200510 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300511
512 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
513
Matan Barakb4ff3a32016-02-09 14:57:42 +0200514 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515};
516
Saeed Mahameed495716b2015-12-01 18:03:19 +0200517struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200518 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200519
520 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
523
524 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
525
Matan Barakb4ff3a32016-02-09 14:57:42 +0200526 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200527};
528
Saeed Mahameedd6666752015-12-01 18:03:22 +0200529struct mlx5_ifc_e_switch_cap_bits {
530 u8 vport_svlan_strip[0x1];
531 u8 vport_cvlan_strip[0x1];
532 u8 vport_svlan_insert[0x1];
533 u8 vport_cvlan_insert_if_not_exist[0x1];
534 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300535 u8 reserved_at_5[0x19];
536 u8 nic_vport_node_guid_modify[0x1];
537 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300539 u8 vxlan_encap_decap[0x1];
540 u8 nvgre_encap_decap[0x1];
541 u8 reserved_at_22[0x9];
542 u8 log_max_encap_headers[0x5];
543 u8 reserved_2b[0x6];
544 u8 max_encap_header_size[0xa];
545
546 u8 reserved_40[0x7c0];
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548};
549
Saeed Mahameed74862162016-06-09 15:11:34 +0300550struct mlx5_ifc_qos_cap_bits {
551 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300552 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200553 u8 esw_bw_share[0x1];
554 u8 esw_rate_limit[0x1];
555 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300556
557 u8 reserved_at_20[0x20];
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300560
Saeed Mahameed74862162016-06-09 15:11:34 +0300561 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562
563 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300564 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 esw_element_type[0x10];
567 u8 esw_tsar_type[0x10];
568
569 u8 reserved_at_c0[0x10];
570 u8 max_qos_para_vport[0x10];
571
572 u8 max_tsar_bw_share[0x20];
573
574 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300575};
576
Saeed Mahameede2816822015-05-28 22:28:40 +0300577struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
578 u8 csum_cap[0x1];
579 u8 vlan_cap[0x1];
580 u8 lro_cap[0x1];
581 u8 lro_psh_flag[0x1];
582 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200583 u8 reserved_at_5[0x2];
584 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200585 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200586 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300587 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200588 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300589 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300590 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300591 u8 reg_umr_sq[0x1];
592 u8 scatter_fcs[0x1];
593 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300594 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 tunnel_statless_gre[0x1];
597 u8 tunnel_stateless_vxlan[0x1];
598
Matan Barakb4ff3a32016-02-09 14:57:42 +0200599 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300600
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 lro_min_mss_size[0x10];
603
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605
606 u8 lro_timer_supported_periods[4][0x20];
607
Matan Barakb4ff3a32016-02-09 14:57:42 +0200608 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609};
610
611struct mlx5_ifc_roce_cap_bits {
612 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614
Matan Barakb4ff3a32016-02-09 14:57:42 +0200615 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 roce_version[0x8];
621
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 r_roce_dest_udp_port[0x10];
624
625 u8 r_roce_max_src_udp_port[0x10];
626 u8 r_roce_min_src_udp_port[0x10];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 roce_address_table_size[0x10];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632};
633
634enum {
635 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
636 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
637 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
638 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
639 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
640 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
641 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
642 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
643 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
656};
657
658struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200659 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200661 u8 atomic_req_8B_endianess_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200662 u8 reserved_at_42[0x4];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200663 u8 supported_atomic_req_8B_endianess_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300664
Matan Barakb4ff3a32016-02-09 14:57:42 +0200665 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300666
Matan Barakb4ff3a32016-02-09 14:57:42 +0200667 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300668
Matan Barakb4ff3a32016-02-09 14:57:42 +0200669 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200670 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300671
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200673 u8 atomic_size_qp[0x10];
674
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676 u8 atomic_size_dc[0x10];
677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679};
680
681struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
684 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
689 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
690
691 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
692
693 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696};
697
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200698struct mlx5_ifc_calc_op {
699 u8 reserved_at_0[0x10];
700 u8 reserved_at_10[0x9];
701 u8 op_swap_endianness[0x1];
702 u8 op_min[0x1];
703 u8 op_xor[0x1];
704 u8 op_or[0x1];
705 u8 op_and[0x1];
706 u8 op_max[0x1];
707 u8 op_add[0x1];
708};
709
710struct mlx5_ifc_vector_calc_cap_bits {
711 u8 calc_matrix[0x1];
712 u8 reserved_at_1[0x1f];
713 u8 reserved_at_20[0x8];
714 u8 max_vec_count[0x8];
715 u8 reserved_at_30[0xd];
716 u8 max_chunk_size[0x3];
717 struct mlx5_ifc_calc_op calc0;
718 struct mlx5_ifc_calc_op calc1;
719 struct mlx5_ifc_calc_op calc2;
720 struct mlx5_ifc_calc_op calc3;
721
722 u8 reserved_at_e0[0x720];
723};
724
Saeed Mahameede2816822015-05-28 22:28:40 +0300725enum {
726 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
727 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300728 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300729};
730
731enum {
732 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
733 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
734};
735
736enum {
737 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
738 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
739 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
740 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
741 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
742};
743
744enum {
745 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
746 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
747 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
748 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
749 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
750 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
751};
752
753enum {
754 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
755 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
756};
757
758enum {
759 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
760 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
761 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
762};
763
764enum {
765 MLX5_CAP_PORT_TYPE_IB = 0x0,
766 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300767};
768
Max Gurtovoy1410a902017-05-28 10:53:10 +0300769enum {
770 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
771 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
772 MLX5_CAP_UMR_FENCE_NONE = 0x2,
773};
774
Eli Cohenb7755162014-10-02 12:19:44 +0300775struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200776 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300777
778 u8 log_max_srq_sz[0x8];
779 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200780 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300781 u8 log_max_qp[0x5];
782
Matan Barakb4ff3a32016-02-09 14:57:42 +0200783 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300784 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200785 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300786
Matan Barakb4ff3a32016-02-09 14:57:42 +0200787 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300788 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200789 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300790 u8 log_max_cq[0x5];
791
792 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300794 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300796 u8 log_max_eq[0x4];
797
798 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200799 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_mrw_sz[0x7];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_110[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200803 u8 umr_extended_translation_offset[0x1];
804 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_klm_list_size[0x6];
806
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200809 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300810 u8 log_max_ra_res_dc[0x6];
811
Matan Barakb4ff3a32016-02-09 14:57:42 +0200812 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200814 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_ra_res_qp[0x6];
816
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200817 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 cc_query_allowed[0x1];
819 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200820 u8 start_pad[0x1];
821 u8 cache_line_128byte[0x1];
822 u8 reserved_at_163[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300823 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300824
Saeed Mahameede2816822015-05-28 22:28:40 +0300825 u8 out_of_seq_cnt[0x1];
826 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300827 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300828 u8 reserved_at_183[0x1];
829 u8 modify_rq_counter_set_id[0x1];
830 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 max_qp_cnt[0xa];
832 u8 pkey_table_size[0x10];
833
Saeed Mahameede2816822015-05-28 22:28:40 +0300834 u8 vport_group_manager[0x1];
835 u8 vhca_group_manager[0x1];
836 u8 ib_virt[0x1];
837 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200838 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300839 u8 ets[0x1];
840 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200841 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300842 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200843 u8 mcam_reg[0x1];
844 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200846 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200847 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300848 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200849 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300850 u8 disable_link_up[0x1];
851 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 num_ports[0x8];
854
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300855 u8 reserved_at_1c0[0x1];
856 u8 pps[0x1];
857 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300859 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200860 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300861 u8 reserved_at_1d0[0x1];
862 u8 dcbx[0x1];
863 u8 reserved_at_1d2[0x4];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200864 u8 rol_s[0x1];
865 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300866 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200867 u8 wol_s[0x1];
868 u8 wol_g[0x1];
869 u8 wol_a[0x1];
870 u8 wol_b[0x1];
871 u8 wol_m[0x1];
872 u8 wol_u[0x1];
873 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300874
875 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300876 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300877 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300878
Saeed Mahameede2816822015-05-28 22:28:40 +0300879 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300880 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300881 u8 reserved_at_202[0x1];
882 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200883 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300884 u8 reserved_at_205[0x5];
885 u8 umr_fence[0x2];
886 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300887 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888 u8 cmdif_checksum[0x2];
889 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300891 u8 wq_signature[0x1];
892 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300893 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300894 u8 sho[0x1];
895 u8 tph[0x1];
896 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300897 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300898 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300899 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300900 u8 roce[0x1];
901 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300902 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300903
904 u8 cq_oi[0x1];
905 u8 cq_resize[0x1];
906 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300907 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300908 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300909 u8 pg[0x1];
910 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300913 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300915 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200917 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300918 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200919 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300920 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300921 u8 qkv[0x1];
922 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200923 u8 set_deth_sqpn[0x1];
924 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 xrc[0x1];
926 u8 ud[0x1];
927 u8 uc[0x1];
928 u8 rc[0x1];
929
Eli Cohena6d51b62017-01-03 23:55:23 +0200930 u8 uar_4k[0x1];
931 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300932 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300933 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 log_pg_sz[0x8];
935
936 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200937 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300938 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300940 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300941
942 u8 reserved_at_270[0xb];
943 u8 lag_master[0x1];
944 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300945
Tariq Toukane1c9c622016-04-11 23:10:21 +0300946 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300947 u8 max_wqe_sz_sq[0x10];
948
Tariq Toukane1c9c622016-04-11 23:10:21 +0300949 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 max_wqe_sz_rq[0x10];
951
Tariq Toukane1c9c622016-04-11 23:10:21 +0300952 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 max_wqe_sz_sq_dc[0x10];
954
Tariq Toukane1c9c622016-04-11 23:10:21 +0300955 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300956 u8 max_qp_mcg[0x19];
957
Tariq Toukane1c9c622016-04-11 23:10:21 +0300958 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 log_max_mcg[0x8];
960
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300962 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300966 u8 log_max_xrcd[0x5];
967
Amir Vadaia351a1b02016-07-14 10:32:38 +0300968 u8 reserved_at_340[0x8];
969 u8 log_max_flow_counter_bulk[0x8];
970 u8 max_flow_counter[0x10];
971
Eli Cohenb7755162014-10-02 12:19:44 +0300972
Tariq Toukane1c9c622016-04-11 23:10:21 +0300973 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300976 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_tis[0x5];
981
Saeed Mahameede2816822015-05-28 22:28:40 +0300982 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300986 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300988 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_tis_per_sq[0x5];
991
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300993 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300995 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300997 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300999 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001000
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_wq_sz[0x5];
1003
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001004 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001006 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001008 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001010 u8 log_max_current_uc_list[0x5];
1011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001013
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001015 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001017 u8 log_uar_page_sz[0x10];
1018
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001020 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001021 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022
Eli Cohena6d51b62017-01-03 23:55:23 +02001023 u8 reserved_at_500[0x20];
1024 u8 num_of_uars_per_page[0x20];
1025 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026
1027 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001028 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001029
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001030 u8 cqe_compression_timeout[0x10];
1031 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001032
Saeed Mahameed74862162016-06-09 15:11:34 +03001033 u8 reserved_at_5e0[0x10];
1034 u8 tag_matching[0x1];
1035 u8 rndv_offload_rc[0x1];
1036 u8 rndv_offload_dc[0x1];
1037 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001038 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001039 u8 log_max_xrq[0x5];
1040
Max Gurtovoy7b135582017-01-02 11:37:38 +02001041 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001042};
1043
Saeed Mahameed81848732015-12-01 18:03:20 +02001044enum mlx5_flow_destination_type {
1045 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1046 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1047 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001048
1049 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001050};
1051
1052struct mlx5_ifc_dest_format_struct_bits {
1053 u8 destination_type[0x8];
1054 u8 destination_id[0x18];
1055
Matan Barakb4ff3a32016-02-09 14:57:42 +02001056 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001057};
1058
Amir Vadai9dc0b282016-05-13 12:55:39 +00001059struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001060 u8 clear[0x1];
1061 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001062 u8 flow_counter_id[0x10];
1063
1064 u8 reserved_at_20[0x20];
1065};
1066
1067union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1068 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1069 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1070 u8 reserved_at_0[0x40];
1071};
1072
Saeed Mahameede2816822015-05-28 22:28:40 +03001073struct mlx5_ifc_fte_match_param_bits {
1074 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1075
1076 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1077
1078 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1079
Matan Barakb4ff3a32016-02-09 14:57:42 +02001080 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001081};
1082
1083enum {
1084 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1085 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1086 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1087 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1088 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1089};
1090
1091struct mlx5_ifc_rx_hash_field_select_bits {
1092 u8 l3_prot_type[0x1];
1093 u8 l4_prot_type[0x1];
1094 u8 selected_fields[0x1e];
1095};
1096
1097enum {
1098 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1099 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1100};
1101
1102enum {
1103 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1104 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1105};
1106
1107struct mlx5_ifc_wq_bits {
1108 u8 wq_type[0x4];
1109 u8 wq_signature[0x1];
1110 u8 end_padding_mode[0x2];
1111 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001113
1114 u8 hds_skip_first_sge[0x1];
1115 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001116 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001117 u8 page_offset[0x5];
1118 u8 lwm[0x10];
1119
Matan Barakb4ff3a32016-02-09 14:57:42 +02001120 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001121 u8 pd[0x18];
1122
Matan Barakb4ff3a32016-02-09 14:57:42 +02001123 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001124 u8 uar_page[0x18];
1125
1126 u8 dbr_addr[0x40];
1127
1128 u8 hw_counter[0x20];
1129
1130 u8 sw_counter[0x20];
1131
Matan Barakb4ff3a32016-02-09 14:57:42 +02001132 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001133 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001134 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001135 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 log_wq_sz[0x5];
1138
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001139 u8 reserved_at_120[0x15];
1140 u8 log_wqe_num_of_strides[0x3];
1141 u8 two_byte_shift_en[0x1];
1142 u8 reserved_at_139[0x4];
1143 u8 log_wqe_stride_size[0x3];
1144
1145 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146
1147 struct mlx5_ifc_cmd_pas_bits pas[0];
1148};
1149
1150struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001151 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001152 u8 rq_num[0x18];
1153};
1154
1155struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001156 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001157 u8 mac_addr_47_32[0x10];
1158
1159 u8 mac_addr_31_0[0x20];
1160};
1161
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001162struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001163 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001164 u8 vlan[0x0c];
1165
Matan Barakb4ff3a32016-02-09 14:57:42 +02001166 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001167};
1168
Saeed Mahameede2816822015-05-28 22:28:40 +03001169struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171
1172 u8 min_time_between_cnps[0x20];
1173
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001177 u8 cnp_802p_prio[0x3];
1178
Matan Barakb4ff3a32016-02-09 14:57:42 +02001179 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001180};
1181
1182struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001184
Matan Barakb4ff3a32016-02-09 14:57:42 +02001185 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001186 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192
1193 u8 rpg_time_reset[0x20];
1194
1195 u8 rpg_byte_reset[0x20];
1196
1197 u8 rpg_threshold[0x20];
1198
1199 u8 rpg_max_rate[0x20];
1200
1201 u8 rpg_ai_rate[0x20];
1202
1203 u8 rpg_hai_rate[0x20];
1204
1205 u8 rpg_gd[0x20];
1206
1207 u8 rpg_min_dec_fac[0x20];
1208
1209 u8 rpg_min_rate[0x20];
1210
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212
1213 u8 rate_to_set_on_first_cnp[0x20];
1214
1215 u8 dce_tcp_g[0x20];
1216
1217 u8 dce_tcp_rtt[0x20];
1218
1219 u8 rate_reduce_monitor_period[0x20];
1220
Matan Barakb4ff3a32016-02-09 14:57:42 +02001221 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001222
1223 u8 initial_alpha_value[0x20];
1224
Matan Barakb4ff3a32016-02-09 14:57:42 +02001225 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001226};
1227
1228struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230
1231 u8 rppp_max_rps[0x20];
1232
1233 u8 rpg_time_reset[0x20];
1234
1235 u8 rpg_byte_reset[0x20];
1236
1237 u8 rpg_threshold[0x20];
1238
1239 u8 rpg_max_rate[0x20];
1240
1241 u8 rpg_ai_rate[0x20];
1242
1243 u8 rpg_hai_rate[0x20];
1244
1245 u8 rpg_gd[0x20];
1246
1247 u8 rpg_min_dec_fac[0x20];
1248
1249 u8 rpg_min_rate[0x20];
1250
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252};
1253
1254enum {
1255 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1256 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1257 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1258};
1259
1260struct mlx5_ifc_resize_field_select_bits {
1261 u8 resize_field_select[0x20];
1262};
1263
1264enum {
1265 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1266 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1267 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1268 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1269};
1270
1271struct mlx5_ifc_modify_field_select_bits {
1272 u8 modify_field_select[0x20];
1273};
1274
1275struct mlx5_ifc_field_select_r_roce_np_bits {
1276 u8 field_select_r_roce_np[0x20];
1277};
1278
1279struct mlx5_ifc_field_select_r_roce_rp_bits {
1280 u8 field_select_r_roce_rp[0x20];
1281};
1282
1283enum {
1284 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1285 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1286 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1287 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1288 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1289 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1290 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1291 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1292 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1293 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1294};
1295
1296struct mlx5_ifc_field_select_802_1qau_rp_bits {
1297 u8 field_select_8021qaurp[0x20];
1298};
1299
1300struct mlx5_ifc_phys_layer_cntrs_bits {
1301 u8 time_since_last_clear_high[0x20];
1302
1303 u8 time_since_last_clear_low[0x20];
1304
1305 u8 symbol_errors_high[0x20];
1306
1307 u8 symbol_errors_low[0x20];
1308
1309 u8 sync_headers_errors_high[0x20];
1310
1311 u8 sync_headers_errors_low[0x20];
1312
1313 u8 edpl_bip_errors_lane0_high[0x20];
1314
1315 u8 edpl_bip_errors_lane0_low[0x20];
1316
1317 u8 edpl_bip_errors_lane1_high[0x20];
1318
1319 u8 edpl_bip_errors_lane1_low[0x20];
1320
1321 u8 edpl_bip_errors_lane2_high[0x20];
1322
1323 u8 edpl_bip_errors_lane2_low[0x20];
1324
1325 u8 edpl_bip_errors_lane3_high[0x20];
1326
1327 u8 edpl_bip_errors_lane3_low[0x20];
1328
1329 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1330
1331 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1332
1333 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1334
1335 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1336
1337 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1338
1339 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1340
1341 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1342
1343 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1344
1345 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1346
1347 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1348
1349 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1350
1351 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1352
1353 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1354
1355 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1356
1357 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1358
1359 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1360
1361 u8 rs_fec_corrected_blocks_high[0x20];
1362
1363 u8 rs_fec_corrected_blocks_low[0x20];
1364
1365 u8 rs_fec_uncorrectable_blocks_high[0x20];
1366
1367 u8 rs_fec_uncorrectable_blocks_low[0x20];
1368
1369 u8 rs_fec_no_errors_blocks_high[0x20];
1370
1371 u8 rs_fec_no_errors_blocks_low[0x20];
1372
1373 u8 rs_fec_single_error_blocks_high[0x20];
1374
1375 u8 rs_fec_single_error_blocks_low[0x20];
1376
1377 u8 rs_fec_corrected_symbols_total_high[0x20];
1378
1379 u8 rs_fec_corrected_symbols_total_low[0x20];
1380
1381 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1382
1383 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1384
1385 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1386
1387 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1388
1389 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1390
1391 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1392
1393 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1394
1395 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1396
1397 u8 link_down_events[0x20];
1398
1399 u8 successful_recovery_events[0x20];
1400
Matan Barakb4ff3a32016-02-09 14:57:42 +02001401 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001402};
1403
Gal Pressmand8dc0502016-09-27 17:04:51 +03001404struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1405 u8 time_since_last_clear_high[0x20];
1406
1407 u8 time_since_last_clear_low[0x20];
1408
1409 u8 phy_received_bits_high[0x20];
1410
1411 u8 phy_received_bits_low[0x20];
1412
1413 u8 phy_symbol_errors_high[0x20];
1414
1415 u8 phy_symbol_errors_low[0x20];
1416
1417 u8 phy_corrected_bits_high[0x20];
1418
1419 u8 phy_corrected_bits_low[0x20];
1420
1421 u8 phy_corrected_bits_lane0_high[0x20];
1422
1423 u8 phy_corrected_bits_lane0_low[0x20];
1424
1425 u8 phy_corrected_bits_lane1_high[0x20];
1426
1427 u8 phy_corrected_bits_lane1_low[0x20];
1428
1429 u8 phy_corrected_bits_lane2_high[0x20];
1430
1431 u8 phy_corrected_bits_lane2_low[0x20];
1432
1433 u8 phy_corrected_bits_lane3_high[0x20];
1434
1435 u8 phy_corrected_bits_lane3_low[0x20];
1436
1437 u8 reserved_at_200[0x5c0];
1438};
1439
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001440struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1441 u8 symbol_error_counter[0x10];
1442
1443 u8 link_error_recovery_counter[0x8];
1444
1445 u8 link_downed_counter[0x8];
1446
1447 u8 port_rcv_errors[0x10];
1448
1449 u8 port_rcv_remote_physical_errors[0x10];
1450
1451 u8 port_rcv_switch_relay_errors[0x10];
1452
1453 u8 port_xmit_discards[0x10];
1454
1455 u8 port_xmit_constraint_errors[0x8];
1456
1457 u8 port_rcv_constraint_errors[0x8];
1458
1459 u8 reserved_at_70[0x8];
1460
1461 u8 link_overrun_errors[0x8];
1462
1463 u8 reserved_at_80[0x10];
1464
1465 u8 vl_15_dropped[0x10];
1466
Tim Wright133bea02017-05-01 17:30:08 +01001467 u8 reserved_at_a0[0x80];
1468
1469 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001470};
1471
Saeed Mahameede2816822015-05-28 22:28:40 +03001472struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1473 u8 transmit_queue_high[0x20];
1474
1475 u8 transmit_queue_low[0x20];
1476
Matan Barakb4ff3a32016-02-09 14:57:42 +02001477 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001478};
1479
1480struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1481 u8 rx_octets_high[0x20];
1482
1483 u8 rx_octets_low[0x20];
1484
Matan Barakb4ff3a32016-02-09 14:57:42 +02001485 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001486
1487 u8 rx_frames_high[0x20];
1488
1489 u8 rx_frames_low[0x20];
1490
1491 u8 tx_octets_high[0x20];
1492
1493 u8 tx_octets_low[0x20];
1494
Matan Barakb4ff3a32016-02-09 14:57:42 +02001495 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001496
1497 u8 tx_frames_high[0x20];
1498
1499 u8 tx_frames_low[0x20];
1500
1501 u8 rx_pause_high[0x20];
1502
1503 u8 rx_pause_low[0x20];
1504
1505 u8 rx_pause_duration_high[0x20];
1506
1507 u8 rx_pause_duration_low[0x20];
1508
1509 u8 tx_pause_high[0x20];
1510
1511 u8 tx_pause_low[0x20];
1512
1513 u8 tx_pause_duration_high[0x20];
1514
1515 u8 tx_pause_duration_low[0x20];
1516
1517 u8 rx_pause_transition_high[0x20];
1518
1519 u8 rx_pause_transition_low[0x20];
1520
Matan Barakb4ff3a32016-02-09 14:57:42 +02001521 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001522};
1523
1524struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1525 u8 port_transmit_wait_high[0x20];
1526
1527 u8 port_transmit_wait_low[0x20];
1528
Matan Barakb4ff3a32016-02-09 14:57:42 +02001529 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001530};
1531
1532struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1533 u8 dot3stats_alignment_errors_high[0x20];
1534
1535 u8 dot3stats_alignment_errors_low[0x20];
1536
1537 u8 dot3stats_fcs_errors_high[0x20];
1538
1539 u8 dot3stats_fcs_errors_low[0x20];
1540
1541 u8 dot3stats_single_collision_frames_high[0x20];
1542
1543 u8 dot3stats_single_collision_frames_low[0x20];
1544
1545 u8 dot3stats_multiple_collision_frames_high[0x20];
1546
1547 u8 dot3stats_multiple_collision_frames_low[0x20];
1548
1549 u8 dot3stats_sqe_test_errors_high[0x20];
1550
1551 u8 dot3stats_sqe_test_errors_low[0x20];
1552
1553 u8 dot3stats_deferred_transmissions_high[0x20];
1554
1555 u8 dot3stats_deferred_transmissions_low[0x20];
1556
1557 u8 dot3stats_late_collisions_high[0x20];
1558
1559 u8 dot3stats_late_collisions_low[0x20];
1560
1561 u8 dot3stats_excessive_collisions_high[0x20];
1562
1563 u8 dot3stats_excessive_collisions_low[0x20];
1564
1565 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1566
1567 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1568
1569 u8 dot3stats_carrier_sense_errors_high[0x20];
1570
1571 u8 dot3stats_carrier_sense_errors_low[0x20];
1572
1573 u8 dot3stats_frame_too_longs_high[0x20];
1574
1575 u8 dot3stats_frame_too_longs_low[0x20];
1576
1577 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1578
1579 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1580
1581 u8 dot3stats_symbol_errors_high[0x20];
1582
1583 u8 dot3stats_symbol_errors_low[0x20];
1584
1585 u8 dot3control_in_unknown_opcodes_high[0x20];
1586
1587 u8 dot3control_in_unknown_opcodes_low[0x20];
1588
1589 u8 dot3in_pause_frames_high[0x20];
1590
1591 u8 dot3in_pause_frames_low[0x20];
1592
1593 u8 dot3out_pause_frames_high[0x20];
1594
1595 u8 dot3out_pause_frames_low[0x20];
1596
Matan Barakb4ff3a32016-02-09 14:57:42 +02001597 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001598};
1599
1600struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1601 u8 ether_stats_drop_events_high[0x20];
1602
1603 u8 ether_stats_drop_events_low[0x20];
1604
1605 u8 ether_stats_octets_high[0x20];
1606
1607 u8 ether_stats_octets_low[0x20];
1608
1609 u8 ether_stats_pkts_high[0x20];
1610
1611 u8 ether_stats_pkts_low[0x20];
1612
1613 u8 ether_stats_broadcast_pkts_high[0x20];
1614
1615 u8 ether_stats_broadcast_pkts_low[0x20];
1616
1617 u8 ether_stats_multicast_pkts_high[0x20];
1618
1619 u8 ether_stats_multicast_pkts_low[0x20];
1620
1621 u8 ether_stats_crc_align_errors_high[0x20];
1622
1623 u8 ether_stats_crc_align_errors_low[0x20];
1624
1625 u8 ether_stats_undersize_pkts_high[0x20];
1626
1627 u8 ether_stats_undersize_pkts_low[0x20];
1628
1629 u8 ether_stats_oversize_pkts_high[0x20];
1630
1631 u8 ether_stats_oversize_pkts_low[0x20];
1632
1633 u8 ether_stats_fragments_high[0x20];
1634
1635 u8 ether_stats_fragments_low[0x20];
1636
1637 u8 ether_stats_jabbers_high[0x20];
1638
1639 u8 ether_stats_jabbers_low[0x20];
1640
1641 u8 ether_stats_collisions_high[0x20];
1642
1643 u8 ether_stats_collisions_low[0x20];
1644
1645 u8 ether_stats_pkts64octets_high[0x20];
1646
1647 u8 ether_stats_pkts64octets_low[0x20];
1648
1649 u8 ether_stats_pkts65to127octets_high[0x20];
1650
1651 u8 ether_stats_pkts65to127octets_low[0x20];
1652
1653 u8 ether_stats_pkts128to255octets_high[0x20];
1654
1655 u8 ether_stats_pkts128to255octets_low[0x20];
1656
1657 u8 ether_stats_pkts256to511octets_high[0x20];
1658
1659 u8 ether_stats_pkts256to511octets_low[0x20];
1660
1661 u8 ether_stats_pkts512to1023octets_high[0x20];
1662
1663 u8 ether_stats_pkts512to1023octets_low[0x20];
1664
1665 u8 ether_stats_pkts1024to1518octets_high[0x20];
1666
1667 u8 ether_stats_pkts1024to1518octets_low[0x20];
1668
1669 u8 ether_stats_pkts1519to2047octets_high[0x20];
1670
1671 u8 ether_stats_pkts1519to2047octets_low[0x20];
1672
1673 u8 ether_stats_pkts2048to4095octets_high[0x20];
1674
1675 u8 ether_stats_pkts2048to4095octets_low[0x20];
1676
1677 u8 ether_stats_pkts4096to8191octets_high[0x20];
1678
1679 u8 ether_stats_pkts4096to8191octets_low[0x20];
1680
1681 u8 ether_stats_pkts8192to10239octets_high[0x20];
1682
1683 u8 ether_stats_pkts8192to10239octets_low[0x20];
1684
Matan Barakb4ff3a32016-02-09 14:57:42 +02001685 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001686};
1687
1688struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1689 u8 if_in_octets_high[0x20];
1690
1691 u8 if_in_octets_low[0x20];
1692
1693 u8 if_in_ucast_pkts_high[0x20];
1694
1695 u8 if_in_ucast_pkts_low[0x20];
1696
1697 u8 if_in_discards_high[0x20];
1698
1699 u8 if_in_discards_low[0x20];
1700
1701 u8 if_in_errors_high[0x20];
1702
1703 u8 if_in_errors_low[0x20];
1704
1705 u8 if_in_unknown_protos_high[0x20];
1706
1707 u8 if_in_unknown_protos_low[0x20];
1708
1709 u8 if_out_octets_high[0x20];
1710
1711 u8 if_out_octets_low[0x20];
1712
1713 u8 if_out_ucast_pkts_high[0x20];
1714
1715 u8 if_out_ucast_pkts_low[0x20];
1716
1717 u8 if_out_discards_high[0x20];
1718
1719 u8 if_out_discards_low[0x20];
1720
1721 u8 if_out_errors_high[0x20];
1722
1723 u8 if_out_errors_low[0x20];
1724
1725 u8 if_in_multicast_pkts_high[0x20];
1726
1727 u8 if_in_multicast_pkts_low[0x20];
1728
1729 u8 if_in_broadcast_pkts_high[0x20];
1730
1731 u8 if_in_broadcast_pkts_low[0x20];
1732
1733 u8 if_out_multicast_pkts_high[0x20];
1734
1735 u8 if_out_multicast_pkts_low[0x20];
1736
1737 u8 if_out_broadcast_pkts_high[0x20];
1738
1739 u8 if_out_broadcast_pkts_low[0x20];
1740
Matan Barakb4ff3a32016-02-09 14:57:42 +02001741 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001742};
1743
1744struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1745 u8 a_frames_transmitted_ok_high[0x20];
1746
1747 u8 a_frames_transmitted_ok_low[0x20];
1748
1749 u8 a_frames_received_ok_high[0x20];
1750
1751 u8 a_frames_received_ok_low[0x20];
1752
1753 u8 a_frame_check_sequence_errors_high[0x20];
1754
1755 u8 a_frame_check_sequence_errors_low[0x20];
1756
1757 u8 a_alignment_errors_high[0x20];
1758
1759 u8 a_alignment_errors_low[0x20];
1760
1761 u8 a_octets_transmitted_ok_high[0x20];
1762
1763 u8 a_octets_transmitted_ok_low[0x20];
1764
1765 u8 a_octets_received_ok_high[0x20];
1766
1767 u8 a_octets_received_ok_low[0x20];
1768
1769 u8 a_multicast_frames_xmitted_ok_high[0x20];
1770
1771 u8 a_multicast_frames_xmitted_ok_low[0x20];
1772
1773 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1774
1775 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1776
1777 u8 a_multicast_frames_received_ok_high[0x20];
1778
1779 u8 a_multicast_frames_received_ok_low[0x20];
1780
1781 u8 a_broadcast_frames_received_ok_high[0x20];
1782
1783 u8 a_broadcast_frames_received_ok_low[0x20];
1784
1785 u8 a_in_range_length_errors_high[0x20];
1786
1787 u8 a_in_range_length_errors_low[0x20];
1788
1789 u8 a_out_of_range_length_field_high[0x20];
1790
1791 u8 a_out_of_range_length_field_low[0x20];
1792
1793 u8 a_frame_too_long_errors_high[0x20];
1794
1795 u8 a_frame_too_long_errors_low[0x20];
1796
1797 u8 a_symbol_error_during_carrier_high[0x20];
1798
1799 u8 a_symbol_error_during_carrier_low[0x20];
1800
1801 u8 a_mac_control_frames_transmitted_high[0x20];
1802
1803 u8 a_mac_control_frames_transmitted_low[0x20];
1804
1805 u8 a_mac_control_frames_received_high[0x20];
1806
1807 u8 a_mac_control_frames_received_low[0x20];
1808
1809 u8 a_unsupported_opcodes_received_high[0x20];
1810
1811 u8 a_unsupported_opcodes_received_low[0x20];
1812
1813 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1814
1815 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1816
1817 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1818
1819 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1820
Matan Barakb4ff3a32016-02-09 14:57:42 +02001821 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001822};
1823
Gal Pressman8ed1a632016-11-17 13:46:01 +02001824struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1825 u8 life_time_counter_high[0x20];
1826
1827 u8 life_time_counter_low[0x20];
1828
1829 u8 rx_errors[0x20];
1830
1831 u8 tx_errors[0x20];
1832
1833 u8 l0_to_recovery_eieos[0x20];
1834
1835 u8 l0_to_recovery_ts[0x20];
1836
1837 u8 l0_to_recovery_framing[0x20];
1838
1839 u8 l0_to_recovery_retrain[0x20];
1840
1841 u8 crc_error_dllp[0x20];
1842
1843 u8 crc_error_tlp[0x20];
1844
1845 u8 reserved_at_140[0x680];
1846};
1847
Saeed Mahameede2816822015-05-28 22:28:40 +03001848struct mlx5_ifc_cmd_inter_comp_event_bits {
1849 u8 command_completion_vector[0x20];
1850
Matan Barakb4ff3a32016-02-09 14:57:42 +02001851 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001852};
1853
1854struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001855 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001856 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001857 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001858 u8 vl[0x4];
1859
Matan Barakb4ff3a32016-02-09 14:57:42 +02001860 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001861};
1862
1863struct mlx5_ifc_db_bf_congestion_event_bits {
1864 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001865 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001866 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001867 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001868
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870};
1871
1872struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874
1875 u8 gpio_event_hi[0x20];
1876
1877 u8 gpio_event_lo[0x20];
1878
Matan Barakb4ff3a32016-02-09 14:57:42 +02001879 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001880};
1881
1882struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001883 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001884
1885 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001886 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001887
Matan Barakb4ff3a32016-02-09 14:57:42 +02001888 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001889};
1890
1891struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001892 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001893};
1894
1895enum {
1896 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1897 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1898};
1899
1900struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902 u8 cqn[0x18];
1903
Matan Barakb4ff3a32016-02-09 14:57:42 +02001904 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001905
Matan Barakb4ff3a32016-02-09 14:57:42 +02001906 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001907 u8 syndrome[0x8];
1908
Matan Barakb4ff3a32016-02-09 14:57:42 +02001909 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001910};
1911
1912struct mlx5_ifc_rdma_page_fault_event_bits {
1913 u8 bytes_committed[0x20];
1914
1915 u8 r_key[0x20];
1916
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918 u8 packet_len[0x10];
1919
1920 u8 rdma_op_len[0x20];
1921
1922 u8 rdma_va[0x40];
1923
Matan Barakb4ff3a32016-02-09 14:57:42 +02001924 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001925 u8 rdma[0x1];
1926 u8 write[0x1];
1927 u8 requestor[0x1];
1928 u8 qp_number[0x18];
1929};
1930
1931struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1932 u8 bytes_committed[0x20];
1933
Matan Barakb4ff3a32016-02-09 14:57:42 +02001934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001935 u8 wqe_index[0x10];
1936
Matan Barakb4ff3a32016-02-09 14:57:42 +02001937 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001938 u8 len[0x10];
1939
Matan Barakb4ff3a32016-02-09 14:57:42 +02001940 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001941
Matan Barakb4ff3a32016-02-09 14:57:42 +02001942 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001943 u8 rdma[0x1];
1944 u8 write_read[0x1];
1945 u8 requestor[0x1];
1946 u8 qpn[0x18];
1947};
1948
1949struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951
1952 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956 u8 qpn_rqn_sqn[0x18];
1957};
1958
1959struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963 u8 dct_number[0x18];
1964};
1965
1966struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970 u8 cq_number[0x18];
1971};
1972
1973enum {
1974 MLX5_QPC_STATE_RST = 0x0,
1975 MLX5_QPC_STATE_INIT = 0x1,
1976 MLX5_QPC_STATE_RTR = 0x2,
1977 MLX5_QPC_STATE_RTS = 0x3,
1978 MLX5_QPC_STATE_SQER = 0x4,
1979 MLX5_QPC_STATE_ERR = 0x6,
1980 MLX5_QPC_STATE_SQD = 0x7,
1981 MLX5_QPC_STATE_SUSPENDED = 0x9,
1982};
1983
1984enum {
1985 MLX5_QPC_ST_RC = 0x0,
1986 MLX5_QPC_ST_UC = 0x1,
1987 MLX5_QPC_ST_UD = 0x2,
1988 MLX5_QPC_ST_XRC = 0x3,
1989 MLX5_QPC_ST_DCI = 0x5,
1990 MLX5_QPC_ST_QP0 = 0x7,
1991 MLX5_QPC_ST_QP1 = 0x8,
1992 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
1993 MLX5_QPC_ST_REG_UMR = 0xc,
1994};
1995
1996enum {
1997 MLX5_QPC_PM_STATE_ARMED = 0x0,
1998 MLX5_QPC_PM_STATE_REARM = 0x1,
1999 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2000 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2001};
2002
2003enum {
2004 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2005 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2006};
2007
2008enum {
2009 MLX5_QPC_MTU_256_BYTES = 0x1,
2010 MLX5_QPC_MTU_512_BYTES = 0x2,
2011 MLX5_QPC_MTU_1K_BYTES = 0x3,
2012 MLX5_QPC_MTU_2K_BYTES = 0x4,
2013 MLX5_QPC_MTU_4K_BYTES = 0x5,
2014 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2015};
2016
2017enum {
2018 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2019 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2020 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2021 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2022 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2023 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2024 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2025 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2026};
2027
2028enum {
2029 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2030 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2031 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2032};
2033
2034enum {
2035 MLX5_QPC_CS_RES_DISABLE = 0x0,
2036 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2037 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2038};
2039
2040struct mlx5_ifc_qpc_bits {
2041 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002042 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002043 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002044 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002045 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002046 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002048 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002049
2050 u8 wq_signature[0x1];
2051 u8 block_lb_mc[0x1];
2052 u8 atomic_like_write_en[0x1];
2053 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002054 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002055 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 pd[0x18];
2058
2059 u8 mtu[0x3];
2060 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002061 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002062 u8 log_rq_size[0x4];
2063 u8 log_rq_stride[0x3];
2064 u8 no_sq[0x1];
2065 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002066 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002067 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002068 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069
2070 u8 counter_set_id[0x8];
2071 u8 uar_page[0x18];
2072
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 user_index[0x18];
2075
Matan Barakb4ff3a32016-02-09 14:57:42 +02002076 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002077 u8 log_page_size[0x5];
2078 u8 remote_qpn[0x18];
2079
2080 struct mlx5_ifc_ads_bits primary_address_path;
2081
2082 struct mlx5_ifc_ads_bits secondary_address_path;
2083
2084 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002085 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002086 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002087 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002088 u8 retry_count[0x3];
2089 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 fre[0x1];
2092 u8 cur_rnr_retry[0x3];
2093 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002094 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095
Matan Barakb4ff3a32016-02-09 14:57:42 +02002096 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 next_send_psn[0x18];
2100
Matan Barakb4ff3a32016-02-09 14:57:42 +02002101 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102 u8 cqn_snd[0x18];
2103
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002104 u8 reserved_at_400[0x8];
2105 u8 deth_sqpn[0x18];
2106
2107 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 last_acked_psn[0x18];
2111
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 ssn[0x18];
2114
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002117 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002118 u8 atomic_mode[0x4];
2119 u8 rre[0x1];
2120 u8 rwe[0x1];
2121 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002122 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002124 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 u8 cd_slave_receive[0x1];
2126 u8 cd_slave_send[0x1];
2127 u8 cd_master[0x1];
2128
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 min_rnr_nak[0x5];
2131 u8 next_rcv_psn[0x18];
2132
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 xrcd[0x18];
2135
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 cqn_rcv[0x18];
2138
2139 u8 dbr_addr[0x40];
2140
2141 u8 q_key[0x20];
2142
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002145 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 rmsn[0x18];
2149
2150 u8 hw_sq_wqebb_counter[0x10];
2151 u8 sw_sq_wqebb_counter[0x10];
2152
2153 u8 hw_rq_counter[0x20];
2154
2155 u8 sw_rq_counter[0x20];
2156
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158
Matan Barakb4ff3a32016-02-09 14:57:42 +02002159 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002160 u8 cgs[0x1];
2161 u8 cs_req[0x8];
2162 u8 cs_res[0x8];
2163
2164 u8 dc_access_key[0x40];
2165
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167};
2168
2169struct mlx5_ifc_roce_addr_layout_bits {
2170 u8 source_l3_address[16][0x8];
2171
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173 u8 vlan_valid[0x1];
2174 u8 vlan_id[0xc];
2175 u8 source_mac_47_32[0x10];
2176
2177 u8 source_mac_31_0[0x20];
2178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 roce_l3_type[0x4];
2181 u8 roce_version[0x8];
2182
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184};
2185
2186union mlx5_ifc_hca_cap_union_bits {
2187 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2188 struct mlx5_ifc_odp_cap_bits odp_cap;
2189 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2190 struct mlx5_ifc_roce_cap_bits roce_cap;
2191 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2192 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002193 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002194 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002195 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002196 struct mlx5_ifc_qos_cap_bits qos_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198};
2199
2200enum {
2201 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2202 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2203 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002204 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002205 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2206 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002207 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002208};
2209
2210struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002211 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212
2213 u8 group_id[0x20];
2214
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216 u8 flow_tag[0x18];
2217
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219 u8 action[0x10];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222 u8 destination_list_size[0x18];
2223
Amir Vadai9dc0b282016-05-13 12:55:39 +00002224 u8 reserved_at_a0[0x8];
2225 u8 flow_counter_list_size[0x18];
2226
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002227 u8 encap_id[0x20];
2228
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002229 u8 modify_header_id[0x20];
2230
2231 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232
2233 struct mlx5_ifc_fte_match_param_bits match_value;
2234
Matan Barakb4ff3a32016-02-09 14:57:42 +02002235 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002236
Amir Vadai9dc0b282016-05-13 12:55:39 +00002237 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238};
2239
2240enum {
2241 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2242 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2243};
2244
2245struct mlx5_ifc_xrc_srqc_bits {
2246 u8 state[0x4];
2247 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249
2250 u8 wq_signature[0x1];
2251 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002252 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253 u8 rlky[0x1];
2254 u8 basic_cyclic_rcv_wqe[0x1];
2255 u8 log_rq_stride[0x3];
2256 u8 xrcd[0x18];
2257
2258 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002259 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002260 u8 cqn[0x18];
2261
Matan Barakb4ff3a32016-02-09 14:57:42 +02002262 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002263
2264 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266 u8 log_page_size[0x6];
2267 u8 user_index[0x18];
2268
Matan Barakb4ff3a32016-02-09 14:57:42 +02002269 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 pd[0x18];
2273
2274 u8 lwm[0x10];
2275 u8 wqe_cnt[0x10];
2276
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278
2279 u8 db_record_addr_h[0x20];
2280
2281 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002282 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285};
2286
2287struct mlx5_ifc_traffic_counter_bits {
2288 u8 packets[0x40];
2289
2290 u8 octets[0x40];
2291};
2292
2293struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002294 u8 strict_lag_tx_port_affinity[0x1];
2295 u8 reserved_at_1[0x3];
2296 u8 lag_tx_port_affinity[0x04];
2297
2298 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002299 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301
Matan Barakb4ff3a32016-02-09 14:57:42 +02002302 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002303
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305 u8 transport_domain[0x18];
2306
Erez Shitrit500a3d02017-04-13 06:36:51 +03002307 u8 reserved_at_140[0x8];
2308 u8 underlay_qpn[0x18];
2309 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002310};
2311
2312enum {
2313 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2314 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2315};
2316
2317enum {
2318 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2319 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2320};
2321
2322enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002323 MLX5_RX_HASH_FN_NONE = 0x0,
2324 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2325 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002326};
2327
2328enum {
2329 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2330 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2331};
2332
2333struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002334 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002335
2336 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340
Matan Barakb4ff3a32016-02-09 14:57:42 +02002341 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342 u8 lro_timeout_period_usecs[0x10];
2343 u8 lro_enable_mask[0x4];
2344 u8 lro_max_ip_payload_size[0x8];
2345
Matan Barakb4ff3a32016-02-09 14:57:42 +02002346 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002347
Matan Barakb4ff3a32016-02-09 14:57:42 +02002348 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002349 u8 inline_rqn[0x18];
2350
2351 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 indirect_table[0x18];
2356
2357 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359 u8 self_lb_block[0x2];
2360 u8 transport_domain[0x18];
2361
2362 u8 rx_hash_toeplitz_key[10][0x20];
2363
2364 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2365
2366 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2367
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369};
2370
2371enum {
2372 MLX5_SRQC_STATE_GOOD = 0x0,
2373 MLX5_SRQC_STATE_ERROR = 0x1,
2374};
2375
2376struct mlx5_ifc_srqc_bits {
2377 u8 state[0x4];
2378 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002380
2381 u8 wq_signature[0x1];
2382 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002385 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002386 u8 log_rq_stride[0x3];
2387 u8 xrcd[0x18];
2388
2389 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391 u8 cqn[0x18];
2392
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398
Matan Barakb4ff3a32016-02-09 14:57:42 +02002399 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002400
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402 u8 pd[0x18];
2403
2404 u8 lwm[0x10];
2405 u8 wqe_cnt[0x10];
2406
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002409 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412};
2413
2414enum {
2415 MLX5_SQC_STATE_RST = 0x0,
2416 MLX5_SQC_STATE_RDY = 0x1,
2417 MLX5_SQC_STATE_ERR = 0x3,
2418};
2419
2420struct mlx5_ifc_sqc_bits {
2421 u8 rlky[0x1];
2422 u8 cd_master[0x1];
2423 u8 fre[0x1];
2424 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002425 u8 reserved_at_4[0x1];
2426 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002428 u8 reg_umr[0x1];
2429 u8 reserved_at_d[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03002430
Matan Barakb4ff3a32016-02-09 14:57:42 +02002431 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002432 u8 user_index[0x18];
2433
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435 u8 cqn[0x18];
2436
Saeed Mahameed74862162016-06-09 15:11:34 +03002437 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002438
Saeed Mahameed74862162016-06-09 15:11:34 +03002439 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444
Matan Barakb4ff3a32016-02-09 14:57:42 +02002445 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446 u8 tis_num_0[0x18];
2447
2448 struct mlx5_ifc_wq_bits wq;
2449};
2450
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002451enum {
2452 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2453 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2454 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2455 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2456};
2457
2458struct mlx5_ifc_scheduling_context_bits {
2459 u8 element_type[0x8];
2460 u8 reserved_at_8[0x18];
2461
2462 u8 element_attributes[0x20];
2463
2464 u8 parent_element_id[0x20];
2465
2466 u8 reserved_at_60[0x40];
2467
2468 u8 bw_share[0x20];
2469
2470 u8 max_average_bw[0x20];
2471
2472 u8 reserved_at_e0[0x120];
2473};
2474
Saeed Mahameede2816822015-05-28 22:28:40 +03002475struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002476 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002477
Matan Barakb4ff3a32016-02-09 14:57:42 +02002478 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002479 u8 rqt_max_size[0x10];
2480
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482 u8 rqt_actual_size[0x10];
2483
Matan Barakb4ff3a32016-02-09 14:57:42 +02002484 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485
2486 struct mlx5_ifc_rq_num_bits rq_num[0];
2487};
2488
2489enum {
2490 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2491 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2492};
2493
2494enum {
2495 MLX5_RQC_STATE_RST = 0x0,
2496 MLX5_RQC_STATE_RDY = 0x1,
2497 MLX5_RQC_STATE_ERR = 0x3,
2498};
2499
2500struct mlx5_ifc_rqc_bits {
2501 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002502 u8 reserved_at_1[0x1];
2503 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002504 u8 vsd[0x1];
2505 u8 mem_rq_type[0x4];
2506 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002507 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002508 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002509 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002510
Matan Barakb4ff3a32016-02-09 14:57:42 +02002511 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002512 u8 user_index[0x18];
2513
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515 u8 cqn[0x18];
2516
2517 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002518 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521 u8 rmpn[0x18];
2522
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
2525 struct mlx5_ifc_wq_bits wq;
2526};
2527
2528enum {
2529 MLX5_RMPC_STATE_RDY = 0x1,
2530 MLX5_RMPC_STATE_ERR = 0x3,
2531};
2532
2533struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002536 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537
2538 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540
Matan Barakb4ff3a32016-02-09 14:57:42 +02002541 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002542
2543 struct mlx5_ifc_wq_bits wq;
2544};
2545
Saeed Mahameede2816822015-05-28 22:28:40 +03002546struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002547 u8 reserved_at_0[0x5];
2548 u8 min_wqe_inline_mode[0x3];
2549 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550 u8 roce_en[0x1];
2551
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002552 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002554 u8 event_on_mtu[0x1];
2555 u8 event_on_promisc_change[0x1];
2556 u8 event_on_vlan_change[0x1];
2557 u8 event_on_mc_address_change[0x1];
2558 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002561
2562 u8 mtu[0x10];
2563
Achiad Shochat9efa7522015-12-23 18:47:20 +02002564 u8 system_image_guid[0x40];
2565 u8 port_guid[0x40];
2566 u8 node_guid[0x40];
2567
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002569 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002571
2572 u8 promisc_uc[0x1];
2573 u8 promisc_mc[0x1];
2574 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578 u8 allowed_list_size[0xc];
2579
2580 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2581
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002583
2584 u8 current_uc_mac_address[0][0x40];
2585};
2586
2587enum {
2588 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2589 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2590 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002591 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002592};
2593
2594struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002595 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002596 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598 u8 small_fence_on_rdma_read_response[0x1];
2599 u8 umr_en[0x1];
2600 u8 a[0x1];
2601 u8 rw[0x1];
2602 u8 rr[0x1];
2603 u8 lw[0x1];
2604 u8 lr[0x1];
2605 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607
2608 u8 qpn[0x18];
2609 u8 mkey_7_0[0x8];
2610
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612
2613 u8 length64[0x1];
2614 u8 bsf_en[0x1];
2615 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619 u8 en_rinval[0x1];
2620 u8 pd[0x18];
2621
2622 u8 start_addr[0x40];
2623
2624 u8 len[0x40];
2625
2626 u8 bsf_octword_size[0x20];
2627
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629
2630 u8 translations_octword_size[0x20];
2631
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633 u8 log_page_size[0x5];
2634
Matan Barakb4ff3a32016-02-09 14:57:42 +02002635 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002636};
2637
2638struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002639 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002640 u8 pkey[0x10];
2641};
2642
2643struct mlx5_ifc_array128_auto_bits {
2644 u8 array128_auto[16][0x8];
2645};
2646
2647struct mlx5_ifc_hca_vport_context_bits {
2648 u8 field_select[0x20];
2649
Matan Barakb4ff3a32016-02-09 14:57:42 +02002650 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002651
2652 u8 sm_virt_aware[0x1];
2653 u8 has_smi[0x1];
2654 u8 has_raw[0x1];
2655 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002657 u8 port_physical_state[0x4];
2658 u8 vport_state_policy[0x4];
2659 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660 u8 vport_state[0x4];
2661
Matan Barakb4ff3a32016-02-09 14:57:42 +02002662 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002663
2664 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
2666 u8 port_guid[0x40];
2667
2668 u8 node_guid[0x40];
2669
2670 u8 cap_mask1[0x20];
2671
2672 u8 cap_mask1_field_select[0x20];
2673
2674 u8 cap_mask2[0x20];
2675
2676 u8 cap_mask2_field_select[0x20];
2677
Matan Barakb4ff3a32016-02-09 14:57:42 +02002678 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002679
2680 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682 u8 init_type_reply[0x4];
2683 u8 lmc[0x3];
2684 u8 subnet_timeout[0x5];
2685
2686 u8 sm_lid[0x10];
2687 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002688 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002689
2690 u8 qkey_violation_counter[0x10];
2691 u8 pkey_violation_counter[0x10];
2692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694};
2695
Saeed Mahameedd6666752015-12-01 18:03:22 +02002696struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002697 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002698 u8 vport_svlan_strip[0x1];
2699 u8 vport_cvlan_strip[0x1];
2700 u8 vport_svlan_insert[0x1];
2701 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002703
Matan Barakb4ff3a32016-02-09 14:57:42 +02002704 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002705
2706 u8 svlan_cfi[0x1];
2707 u8 svlan_pcp[0x3];
2708 u8 svlan_id[0xc];
2709 u8 cvlan_cfi[0x1];
2710 u8 cvlan_pcp[0x3];
2711 u8 cvlan_id[0xc];
2712
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002714};
2715
Saeed Mahameede2816822015-05-28 22:28:40 +03002716enum {
2717 MLX5_EQC_STATUS_OK = 0x0,
2718 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2719};
2720
2721enum {
2722 MLX5_EQC_ST_ARMED = 0x9,
2723 MLX5_EQC_ST_FIRED = 0xa,
2724};
2725
2726struct mlx5_ifc_eqc_bits {
2727 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002729 u8 ec[0x1];
2730 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002731 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002732 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736
Matan Barakb4ff3a32016-02-09 14:57:42 +02002737 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002738 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002740
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742 u8 log_eq_size[0x5];
2743 u8 uar_page[0x18];
2744
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748 u8 intr[0x8];
2749
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757 u8 consumer_counter[0x18];
2758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760 u8 producer_counter[0x18];
2761
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763};
2764
2765enum {
2766 MLX5_DCTC_STATE_ACTIVE = 0x0,
2767 MLX5_DCTC_STATE_DRAINING = 0x1,
2768 MLX5_DCTC_STATE_DRAINED = 0x2,
2769};
2770
2771enum {
2772 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2773 MLX5_DCTC_CS_RES_NA = 0x1,
2774 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2775};
2776
2777enum {
2778 MLX5_DCTC_MTU_256_BYTES = 0x1,
2779 MLX5_DCTC_MTU_512_BYTES = 0x2,
2780 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2781 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2782 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2783};
2784
2785struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 user_index[0x18];
2792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794 u8 cqn[0x18];
2795
2796 u8 counter_set_id[0x8];
2797 u8 atomic_mode[0x4];
2798 u8 rre[0x1];
2799 u8 rwe[0x1];
2800 u8 rae[0x1];
2801 u8 atomic_like_write_en[0x1];
2802 u8 latency_sensitive[0x1];
2803 u8 rlky[0x1];
2804 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002814 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817 u8 pd[0x18];
2818
2819 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821 u8 flow_label[0x14];
2822
2823 u8 dc_access_key[0x40];
2824
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826 u8 mtu[0x3];
2827 u8 port[0x8];
2828 u8 pkey_index[0x10];
2829
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 hop_limit[0x8];
2834
2835 u8 dc_access_key_violation_count[0x20];
2836
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838 u8 dei_cfi[0x1];
2839 u8 eth_prio[0x3];
2840 u8 ecn[0x2];
2841 u8 dscp[0x6];
2842
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844};
2845
2846enum {
2847 MLX5_CQC_STATUS_OK = 0x0,
2848 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2849 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2850};
2851
2852enum {
2853 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2854 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2855};
2856
2857enum {
2858 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2859 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2860 MLX5_CQC_ST_FIRED = 0xa,
2861};
2862
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002863enum {
2864 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2865 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002866 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002867};
2868
Saeed Mahameede2816822015-05-28 22:28:40 +03002869struct mlx5_ifc_cqc_bits {
2870 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872 u8 cqe_sz[0x3];
2873 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875 u8 scqe_break_moderation_en[0x1];
2876 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002877 u8 cq_period_mode[0x2];
2878 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 mini_cqe_res_format[0x2];
2880 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 log_cq_size[0x5];
2891 u8 uar_page[0x18];
2892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 cq_period[0xc];
2895 u8 cq_max_count[0x10];
2896
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898 u8 c_eqn[0x8];
2899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903
Matan Barakb4ff3a32016-02-09 14:57:42 +02002904 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905
Matan Barakb4ff3a32016-02-09 14:57:42 +02002906 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002907 u8 last_notified_index[0x18];
2908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 last_solicit_index[0x18];
2911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913 u8 consumer_counter[0x18];
2914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 producer_counter[0x18];
2917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
2920 u8 dbr_addr[0x40];
2921};
2922
2923union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2924 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2925 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2926 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928};
2929
2930struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002934 u8 ieee_vendor_id[0x18];
2935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 vsd_vendor_id[0x10];
2938
2939 u8 vsd[208][0x8];
2940
2941 u8 vsd_contd_psid[16][0x8];
2942};
2943
Saeed Mahameed74862162016-06-09 15:11:34 +03002944enum {
2945 MLX5_XRQC_STATE_GOOD = 0x0,
2946 MLX5_XRQC_STATE_ERROR = 0x1,
2947};
2948
2949enum {
2950 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2951 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2952};
2953
2954enum {
2955 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2956};
2957
2958struct mlx5_ifc_tag_matching_topology_context_bits {
2959 u8 log_matching_list_sz[0x4];
2960 u8 reserved_at_4[0xc];
2961 u8 append_next_index[0x10];
2962
2963 u8 sw_phase_cnt[0x10];
2964 u8 hw_phase_cnt[0x10];
2965
2966 u8 reserved_at_40[0x40];
2967};
2968
2969struct mlx5_ifc_xrqc_bits {
2970 u8 state[0x4];
2971 u8 rlkey[0x1];
2972 u8 reserved_at_5[0xf];
2973 u8 topology[0x4];
2974 u8 reserved_at_18[0x4];
2975 u8 offload[0x4];
2976
2977 u8 reserved_at_20[0x8];
2978 u8 user_index[0x18];
2979
2980 u8 reserved_at_40[0x8];
2981 u8 cqn[0x18];
2982
2983 u8 reserved_at_60[0xa0];
2984
2985 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
2986
Artemy Kovalyov5579e152016-08-31 05:17:54 +00002987 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03002988
2989 struct mlx5_ifc_wq_bits wq;
2990};
2991
Saeed Mahameede2816822015-05-28 22:28:40 +03002992union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
2993 struct mlx5_ifc_modify_field_select_bits modify_field_select;
2994 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996};
2997
2998union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
2999 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3000 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3001 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003};
3004
3005union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3006 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3007 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3008 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3009 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3010 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3011 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3012 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003013 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003014 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003015 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017};
3018
Gal Pressman8ed1a632016-11-17 13:46:01 +02003019union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3020 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3021 u8 reserved_at_0[0x7c0];
3022};
3023
Saeed Mahameede2816822015-05-28 22:28:40 +03003024union mlx5_ifc_event_auto_bits {
3025 struct mlx5_ifc_comp_event_bits comp_event;
3026 struct mlx5_ifc_dct_events_bits dct_events;
3027 struct mlx5_ifc_qp_events_bits qp_events;
3028 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3029 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3030 struct mlx5_ifc_cq_error_bits cq_error;
3031 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3032 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3033 struct mlx5_ifc_gpio_event_bits gpio_event;
3034 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3035 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3036 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003037 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003038};
3039
3040struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003041 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003042
3043 u8 assert_existptr[0x20];
3044
3045 u8 assert_callra[0x20];
3046
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048
3049 u8 fw_version[0x20];
3050
3051 u8 hw_id[0x20];
3052
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054
3055 u8 irisc_index[0x8];
3056 u8 synd[0x8];
3057 u8 ext_synd[0x10];
3058};
3059
3060struct mlx5_ifc_register_loopback_control_bits {
3061 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065
Matan Barakb4ff3a32016-02-09 14:57:42 +02003066 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003067};
3068
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003069struct mlx5_ifc_vport_tc_element_bits {
3070 u8 traffic_class[0x4];
3071 u8 reserved_at_4[0xc];
3072 u8 vport_number[0x10];
3073};
3074
3075struct mlx5_ifc_vport_element_bits {
3076 u8 reserved_at_0[0x10];
3077 u8 vport_number[0x10];
3078};
3079
3080enum {
3081 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3082 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3083 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3084};
3085
3086struct mlx5_ifc_tsar_element_bits {
3087 u8 reserved_at_0[0x8];
3088 u8 tsar_type[0x8];
3089 u8 reserved_at_10[0x10];
3090};
3091
Saeed Mahameede2816822015-05-28 22:28:40 +03003092struct mlx5_ifc_teardown_hca_out_bits {
3093 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095
3096 u8 syndrome[0x20];
3097
Matan Barakb4ff3a32016-02-09 14:57:42 +02003098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003099};
3100
3101enum {
3102 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
3103 MLX5_TEARDOWN_HCA_IN_PROFILE_PANIC_CLOSE = 0x1,
3104};
3105
3106struct mlx5_ifc_teardown_hca_in_bits {
3107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003109
Matan Barakb4ff3a32016-02-09 14:57:42 +02003110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003111 u8 op_mod[0x10];
3112
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114 u8 profile[0x10];
3115
Matan Barakb4ff3a32016-02-09 14:57:42 +02003116 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003117};
3118
3119struct mlx5_ifc_sqerr2rts_qp_out_bits {
3120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122
3123 u8 syndrome[0x20];
3124
Matan Barakb4ff3a32016-02-09 14:57:42 +02003125 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003126};
3127
3128struct mlx5_ifc_sqerr2rts_qp_in_bits {
3129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003131
Matan Barakb4ff3a32016-02-09 14:57:42 +02003132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003133 u8 op_mod[0x10];
3134
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136 u8 qpn[0x18];
3137
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139
3140 u8 opt_param_mask[0x20];
3141
Matan Barakb4ff3a32016-02-09 14:57:42 +02003142 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003143
3144 struct mlx5_ifc_qpc_bits qpc;
3145
Matan Barakb4ff3a32016-02-09 14:57:42 +02003146 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003147};
3148
3149struct mlx5_ifc_sqd2rts_qp_out_bits {
3150 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152
3153 u8 syndrome[0x20];
3154
Matan Barakb4ff3a32016-02-09 14:57:42 +02003155 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003156};
3157
3158struct mlx5_ifc_sqd2rts_qp_in_bits {
3159 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003160 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003161
Matan Barakb4ff3a32016-02-09 14:57:42 +02003162 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003163 u8 op_mod[0x10];
3164
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166 u8 qpn[0x18];
3167
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
3170 u8 opt_param_mask[0x20];
3171
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173
3174 struct mlx5_ifc_qpc_bits qpc;
3175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177};
3178
3179struct mlx5_ifc_set_roce_address_out_bits {
3180 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182
3183 u8 syndrome[0x20];
3184
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186};
3187
3188struct mlx5_ifc_set_roce_address_in_bits {
3189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191
Matan Barakb4ff3a32016-02-09 14:57:42 +02003192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003193 u8 op_mod[0x10];
3194
3195 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199
3200 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3201};
3202
3203struct mlx5_ifc_set_mad_demux_out_bits {
3204 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206
3207 u8 syndrome[0x20];
3208
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210};
3211
3212enum {
3213 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3214 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3215};
3216
3217struct mlx5_ifc_set_mad_demux_in_bits {
3218 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222 u8 op_mod[0x10];
3223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229};
3230
3231struct mlx5_ifc_set_l2_table_entry_out_bits {
3232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003234
3235 u8 syndrome[0x20];
3236
Matan Barakb4ff3a32016-02-09 14:57:42 +02003237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003238};
3239
3240struct mlx5_ifc_set_l2_table_entry_in_bits {
3241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243
Matan Barakb4ff3a32016-02-09 14:57:42 +02003244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003245 u8 op_mod[0x10];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250 u8 table_index[0x18];
3251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 vlan_valid[0x1];
3256 u8 vlan[0xc];
3257
3258 struct mlx5_ifc_mac_address_layout_bits mac_address;
3259
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261};
3262
3263struct mlx5_ifc_set_issi_out_bits {
3264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266
3267 u8 syndrome[0x20];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270};
3271
3272struct mlx5_ifc_set_issi_in_bits {
3273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277 u8 op_mod[0x10];
3278
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280 u8 current_issi[0x10];
3281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283};
3284
3285struct mlx5_ifc_set_hca_cap_out_bits {
3286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288
3289 u8 syndrome[0x20];
3290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003292};
3293
3294struct mlx5_ifc_set_hca_cap_in_bits {
3295 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003299 u8 op_mod[0x10];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003302
Saeed Mahameede2816822015-05-28 22:28:40 +03003303 union mlx5_ifc_hca_cap_union_bits capability;
3304};
3305
Maor Gottlieb26a81452015-12-10 17:12:39 +02003306enum {
3307 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3308 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3309 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3310 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3311};
3312
Saeed Mahameede2816822015-05-28 22:28:40 +03003313struct mlx5_ifc_set_fte_out_bits {
3314 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316
3317 u8 syndrome[0x20];
3318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320};
3321
3322struct mlx5_ifc_set_fte_in_bits {
3323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327 u8 op_mod[0x10];
3328
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003329 u8 other_vport[0x1];
3330 u8 reserved_at_41[0xf];
3331 u8 vport_number[0x10];
3332
3333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334
3335 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339 u8 table_id[0x18];
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003342 u8 modify_enable_mask[0x8];
3343
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345
3346 u8 flow_index[0x20];
3347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349
3350 struct mlx5_ifc_flow_context_bits flow_context;
3351};
3352
3353struct mlx5_ifc_rts2rts_qp_out_bits {
3354 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356
3357 u8 syndrome[0x20];
3358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360};
3361
3362struct mlx5_ifc_rts2rts_qp_in_bits {
3363 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367 u8 op_mod[0x10];
3368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370 u8 qpn[0x18];
3371
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 opt_param_mask[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377
3378 struct mlx5_ifc_qpc_bits qpc;
3379
Matan Barakb4ff3a32016-02-09 14:57:42 +02003380 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003381};
3382
3383struct mlx5_ifc_rtr2rts_qp_out_bits {
3384 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386
3387 u8 syndrome[0x20];
3388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390};
3391
3392struct mlx5_ifc_rtr2rts_qp_in_bits {
3393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395
Matan Barakb4ff3a32016-02-09 14:57:42 +02003396 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003397 u8 op_mod[0x10];
3398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400 u8 qpn[0x18];
3401
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
3404 u8 opt_param_mask[0x20];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
3408 struct mlx5_ifc_qpc_bits qpc;
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411};
3412
3413struct mlx5_ifc_rst2init_qp_out_bits {
3414 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416
3417 u8 syndrome[0x20];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420};
3421
3422struct mlx5_ifc_rst2init_qp_in_bits {
3423 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425
Matan Barakb4ff3a32016-02-09 14:57:42 +02003426 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003427 u8 op_mod[0x10];
3428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430 u8 qpn[0x18];
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433
3434 u8 opt_param_mask[0x20];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
3438 struct mlx5_ifc_qpc_bits qpc;
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441};
3442
Saeed Mahameed74862162016-06-09 15:11:34 +03003443struct mlx5_ifc_query_xrq_out_bits {
3444 u8 status[0x8];
3445 u8 reserved_at_8[0x18];
3446
3447 u8 syndrome[0x20];
3448
3449 u8 reserved_at_40[0x40];
3450
3451 struct mlx5_ifc_xrqc_bits xrq_context;
3452};
3453
3454struct mlx5_ifc_query_xrq_in_bits {
3455 u8 opcode[0x10];
3456 u8 reserved_at_10[0x10];
3457
3458 u8 reserved_at_20[0x10];
3459 u8 op_mod[0x10];
3460
3461 u8 reserved_at_40[0x8];
3462 u8 xrqn[0x18];
3463
3464 u8 reserved_at_60[0x20];
3465};
3466
Saeed Mahameede2816822015-05-28 22:28:40 +03003467struct mlx5_ifc_query_xrc_srq_out_bits {
3468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470
3471 u8 syndrome[0x20];
3472
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003474
3475 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3476
Matan Barakb4ff3a32016-02-09 14:57:42 +02003477 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003478
3479 u8 pas[0][0x40];
3480};
3481
3482struct mlx5_ifc_query_xrc_srq_in_bits {
3483 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487 u8 op_mod[0x10];
3488
Matan Barakb4ff3a32016-02-09 14:57:42 +02003489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003490 u8 xrc_srqn[0x18];
3491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493};
3494
3495enum {
3496 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3497 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3498};
3499
3500struct mlx5_ifc_query_vport_state_out_bits {
3501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 u8 syndrome[0x20];
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509 u8 admin_state[0x4];
3510 u8 state[0x4];
3511};
3512
3513enum {
3514 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003515 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003516};
3517
3518struct mlx5_ifc_query_vport_state_in_bits {
3519 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523 u8 op_mod[0x10];
3524
3525 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003527 u8 vport_number[0x10];
3528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530};
3531
3532struct mlx5_ifc_query_vport_counter_out_bits {
3533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
3536 u8 syndrome[0x20];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539
3540 struct mlx5_ifc_traffic_counter_bits received_errors;
3541
3542 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3543
3544 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3545
3546 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3547
3548 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3549
3550 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3551
3552 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3553
3554 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3555
3556 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3557
3558 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3559
3560 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3561
3562 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3563
Matan Barakb4ff3a32016-02-09 14:57:42 +02003564 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003565};
3566
3567enum {
3568 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3569};
3570
3571struct mlx5_ifc_query_vport_counter_in_bits {
3572 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
Matan Barakb4ff3a32016-02-09 14:57:42 +02003575 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003576 u8 op_mod[0x10];
3577
3578 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003579 u8 reserved_at_41[0xb];
3580 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003581 u8 vport_number[0x10];
3582
Matan Barakb4ff3a32016-02-09 14:57:42 +02003583 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003584
3585 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589};
3590
3591struct mlx5_ifc_query_tis_out_bits {
3592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594
3595 u8 syndrome[0x20];
3596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598
3599 struct mlx5_ifc_tisc_bits tis_context;
3600};
3601
3602struct mlx5_ifc_query_tis_in_bits {
3603 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607 u8 op_mod[0x10];
3608
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610 u8 tisn[0x18];
3611
Matan Barakb4ff3a32016-02-09 14:57:42 +02003612 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003613};
3614
3615struct mlx5_ifc_query_tir_out_bits {
3616 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618
3619 u8 syndrome[0x20];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
3623 struct mlx5_ifc_tirc_bits tir_context;
3624};
3625
3626struct mlx5_ifc_query_tir_in_bits {
3627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631 u8 op_mod[0x10];
3632
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634 u8 tirn[0x18];
3635
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637};
3638
3639struct mlx5_ifc_query_srq_out_bits {
3640 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642
3643 u8 syndrome[0x20];
3644
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646
3647 struct mlx5_ifc_srqc_bits srq_context_entry;
3648
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650
3651 u8 pas[0][0x40];
3652};
3653
3654struct mlx5_ifc_query_srq_in_bits {
3655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659 u8 op_mod[0x10];
3660
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662 u8 srqn[0x18];
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665};
3666
3667struct mlx5_ifc_query_sq_out_bits {
3668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670
3671 u8 syndrome[0x20];
3672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674
3675 struct mlx5_ifc_sqc_bits sq_context;
3676};
3677
3678struct mlx5_ifc_query_sq_in_bits {
3679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681
Matan Barakb4ff3a32016-02-09 14:57:42 +02003682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003683 u8 op_mod[0x10];
3684
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686 u8 sqn[0x18];
3687
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689};
3690
3691struct mlx5_ifc_query_special_contexts_out_bits {
3692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694
3695 u8 syndrome[0x20];
3696
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003697 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003698
3699 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003700
3701 u8 null_mkey[0x20];
3702
3703 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003704};
3705
3706struct mlx5_ifc_query_special_contexts_in_bits {
3707 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709
Matan Barakb4ff3a32016-02-09 14:57:42 +02003710 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003711 u8 op_mod[0x10];
3712
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714};
3715
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003716struct mlx5_ifc_query_scheduling_element_out_bits {
3717 u8 opcode[0x10];
3718 u8 reserved_at_10[0x10];
3719
3720 u8 reserved_at_20[0x10];
3721 u8 op_mod[0x10];
3722
3723 u8 reserved_at_40[0xc0];
3724
3725 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3726
3727 u8 reserved_at_300[0x100];
3728};
3729
3730enum {
3731 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3732};
3733
3734struct mlx5_ifc_query_scheduling_element_in_bits {
3735 u8 opcode[0x10];
3736 u8 reserved_at_10[0x10];
3737
3738 u8 reserved_at_20[0x10];
3739 u8 op_mod[0x10];
3740
3741 u8 scheduling_hierarchy[0x8];
3742 u8 reserved_at_48[0x18];
3743
3744 u8 scheduling_element_id[0x20];
3745
3746 u8 reserved_at_80[0x180];
3747};
3748
Saeed Mahameede2816822015-05-28 22:28:40 +03003749struct mlx5_ifc_query_rqt_out_bits {
3750 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752
3753 u8 syndrome[0x20];
3754
Matan Barakb4ff3a32016-02-09 14:57:42 +02003755 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003756
3757 struct mlx5_ifc_rqtc_bits rqt_context;
3758};
3759
3760struct mlx5_ifc_query_rqt_in_bits {
3761 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003762 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003763
Matan Barakb4ff3a32016-02-09 14:57:42 +02003764 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003765 u8 op_mod[0x10];
3766
Matan Barakb4ff3a32016-02-09 14:57:42 +02003767 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768 u8 rqtn[0x18];
3769
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771};
3772
3773struct mlx5_ifc_query_rq_out_bits {
3774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776
3777 u8 syndrome[0x20];
3778
Matan Barakb4ff3a32016-02-09 14:57:42 +02003779 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003780
3781 struct mlx5_ifc_rqc_bits rq_context;
3782};
3783
3784struct mlx5_ifc_query_rq_in_bits {
3785 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003786 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003787
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789 u8 op_mod[0x10];
3790
Matan Barakb4ff3a32016-02-09 14:57:42 +02003791 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003792 u8 rqn[0x18];
3793
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795};
3796
3797struct mlx5_ifc_query_roce_address_out_bits {
3798 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800
3801 u8 syndrome[0x20];
3802
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804
3805 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3806};
3807
3808struct mlx5_ifc_query_roce_address_in_bits {
3809 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813 u8 op_mod[0x10];
3814
3815 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817
Matan Barakb4ff3a32016-02-09 14:57:42 +02003818 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003819};
3820
3821struct mlx5_ifc_query_rmp_out_bits {
3822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824
3825 u8 syndrome[0x20];
3826
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828
3829 struct mlx5_ifc_rmpc_bits rmp_context;
3830};
3831
3832struct mlx5_ifc_query_rmp_in_bits {
3833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
Matan Barakb4ff3a32016-02-09 14:57:42 +02003836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837 u8 op_mod[0x10];
3838
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840 u8 rmpn[0x18];
3841
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843};
3844
3845struct mlx5_ifc_query_qp_out_bits {
3846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848
3849 u8 syndrome[0x20];
3850
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852
3853 u8 opt_param_mask[0x20];
3854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856
3857 struct mlx5_ifc_qpc_bits qpc;
3858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860
3861 u8 pas[0][0x40];
3862};
3863
3864struct mlx5_ifc_query_qp_in_bits {
3865 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003866 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003867
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869 u8 op_mod[0x10];
3870
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872 u8 qpn[0x18];
3873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875};
3876
3877struct mlx5_ifc_query_q_counter_out_bits {
3878 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880
3881 u8 syndrome[0x20];
3882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884
3885 u8 rx_write_requests[0x20];
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 u8 rx_read_requests[0x20];
3890
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
3893 u8 rx_atomic_requests[0x20];
3894
Matan Barakb4ff3a32016-02-09 14:57:42 +02003895 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003896
3897 u8 rx_dct_connect[0x20];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900
3901 u8 out_of_buffer[0x20];
3902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904
3905 u8 out_of_sequence[0x20];
3906
Saeed Mahameed74862162016-06-09 15:11:34 +03003907 u8 reserved_at_1e0[0x20];
3908
3909 u8 duplicate_request[0x20];
3910
3911 u8 reserved_at_220[0x20];
3912
3913 u8 rnr_nak_retry_err[0x20];
3914
3915 u8 reserved_at_260[0x20];
3916
3917 u8 packet_seq_err[0x20];
3918
3919 u8 reserved_at_2a0[0x20];
3920
3921 u8 implied_nak_seq_err[0x20];
3922
3923 u8 reserved_at_2e0[0x20];
3924
3925 u8 local_ack_timeout_err[0x20];
3926
3927 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928};
3929
3930struct mlx5_ifc_query_q_counter_in_bits {
3931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935 u8 op_mod[0x10];
3936
Matan Barakb4ff3a32016-02-09 14:57:42 +02003937 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003938
3939 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003940 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003941
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943 u8 counter_set_id[0x8];
3944};
3945
3946struct mlx5_ifc_query_pages_out_bits {
3947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003949
3950 u8 syndrome[0x20];
3951
Matan Barakb4ff3a32016-02-09 14:57:42 +02003952 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003953 u8 function_id[0x10];
3954
3955 u8 num_pages[0x20];
3956};
3957
3958enum {
3959 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3960 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3961 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3962};
3963
3964struct mlx5_ifc_query_pages_in_bits {
3965 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003966 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003967
Matan Barakb4ff3a32016-02-09 14:57:42 +02003968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003969 u8 op_mod[0x10];
3970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972 u8 function_id[0x10];
3973
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975};
3976
3977struct mlx5_ifc_query_nic_vport_context_out_bits {
3978 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980
3981 u8 syndrome[0x20];
3982
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984
3985 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
3986};
3987
3988struct mlx5_ifc_query_nic_vport_context_in_bits {
3989 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003990 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003991
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993 u8 op_mod[0x10];
3994
3995 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003996 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003997 u8 vport_number[0x10];
3998
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002};
4003
4004struct mlx5_ifc_query_mkey_out_bits {
4005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007
4008 u8 syndrome[0x20];
4009
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011
4012 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4013
Matan Barakb4ff3a32016-02-09 14:57:42 +02004014 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004015
4016 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4017
4018 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4019};
4020
4021struct mlx5_ifc_query_mkey_in_bits {
4022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024
Matan Barakb4ff3a32016-02-09 14:57:42 +02004025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004026 u8 op_mod[0x10];
4027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029 u8 mkey_index[0x18];
4030
4031 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004032 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033};
4034
4035struct mlx5_ifc_query_mad_demux_out_bits {
4036 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
4039 u8 syndrome[0x20];
4040
Matan Barakb4ff3a32016-02-09 14:57:42 +02004041 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004042
4043 u8 mad_dumux_parameters_block[0x20];
4044};
4045
4046struct mlx5_ifc_query_mad_demux_in_bits {
4047 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049
Matan Barakb4ff3a32016-02-09 14:57:42 +02004050 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004051 u8 op_mod[0x10];
4052
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054};
4055
4056struct mlx5_ifc_query_l2_table_entry_out_bits {
4057 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059
4060 u8 syndrome[0x20];
4061
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065 u8 vlan_valid[0x1];
4066 u8 vlan[0xc];
4067
4068 struct mlx5_ifc_mac_address_layout_bits mac_address;
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071};
4072
4073struct mlx5_ifc_query_l2_table_entry_in_bits {
4074 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078 u8 op_mod[0x10];
4079
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
Matan Barakb4ff3a32016-02-09 14:57:42 +02004082 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004083 u8 table_index[0x18];
4084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086};
4087
4088struct mlx5_ifc_query_issi_out_bits {
4089 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
4092 u8 syndrome[0x20];
4093
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095 u8 current_issi[0x10];
4096
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 supported_issi_dw0[0x20];
4101};
4102
4103struct mlx5_ifc_query_issi_in_bits {
4104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108 u8 op_mod[0x10];
4109
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111};
4112
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004113struct mlx5_ifc_set_driver_version_out_bits {
4114 u8 status[0x8];
4115 u8 reserved_0[0x18];
4116
4117 u8 syndrome[0x20];
4118 u8 reserved_1[0x40];
4119};
4120
4121struct mlx5_ifc_set_driver_version_in_bits {
4122 u8 opcode[0x10];
4123 u8 reserved_0[0x10];
4124
4125 u8 reserved_1[0x10];
4126 u8 op_mod[0x10];
4127
4128 u8 reserved_2[0x40];
4129 u8 driver_version[64][0x8];
4130};
4131
Saeed Mahameede2816822015-05-28 22:28:40 +03004132struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135
4136 u8 syndrome[0x20];
4137
Matan Barakb4ff3a32016-02-09 14:57:42 +02004138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004139
4140 struct mlx5_ifc_pkey_bits pkey[0];
4141};
4142
4143struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4144 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004145 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004146
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148 u8 op_mod[0x10];
4149
4150 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004151 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004152 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153 u8 vport_number[0x10];
4154
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156 u8 pkey_index[0x10];
4157};
4158
Eli Coheneff901d2016-03-11 22:58:42 +02004159enum {
4160 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4161 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4162 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4163};
4164
Saeed Mahameede2816822015-05-28 22:28:40 +03004165struct mlx5_ifc_query_hca_vport_gid_out_bits {
4166 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
4169 u8 syndrome[0x20];
4170
Matan Barakb4ff3a32016-02-09 14:57:42 +02004171 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004172
4173 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175
4176 struct mlx5_ifc_array128_auto_bits gid[0];
4177};
4178
4179struct mlx5_ifc_query_hca_vport_gid_in_bits {
4180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184 u8 op_mod[0x10];
4185
4186 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004187 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004188 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 vport_number[0x10];
4190
Matan Barakb4ff3a32016-02-09 14:57:42 +02004191 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004192 u8 gid_index[0x10];
4193};
4194
4195struct mlx5_ifc_query_hca_vport_context_out_bits {
4196 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198
4199 u8 syndrome[0x20];
4200
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
4203 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4204};
4205
4206struct mlx5_ifc_query_hca_vport_context_in_bits {
4207 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004209
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211 u8 op_mod[0x10];
4212
4213 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004215 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216 u8 vport_number[0x10];
4217
Matan Barakb4ff3a32016-02-09 14:57:42 +02004218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004219};
4220
4221struct mlx5_ifc_query_hca_cap_out_bits {
4222 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224
4225 u8 syndrome[0x20];
4226
Matan Barakb4ff3a32016-02-09 14:57:42 +02004227 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004228
4229 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004230};
4231
4232struct mlx5_ifc_query_hca_cap_in_bits {
4233 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004235
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004237 u8 op_mod[0x10];
4238
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004240};
4241
Saeed Mahameede2816822015-05-28 22:28:40 +03004242struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004243 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004245
4246 u8 syndrome[0x20];
4247
Matan Barakb4ff3a32016-02-09 14:57:42 +02004248 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253 u8 log_size[0x8];
4254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004256};
4257
Saeed Mahameede2816822015-05-28 22:28:40 +03004258struct mlx5_ifc_query_flow_table_in_bits {
4259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004263 u8 op_mod[0x10];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
4267 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004268 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271 u8 table_id[0x18];
4272
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274};
4275
4276struct mlx5_ifc_query_fte_out_bits {
4277 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279
4280 u8 syndrome[0x20];
4281
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283
4284 struct mlx5_ifc_flow_context_bits flow_context;
4285};
4286
4287struct mlx5_ifc_query_fte_in_bits {
4288 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292 u8 op_mod[0x10];
4293
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
4296 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004297 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300 u8 table_id[0x18];
4301
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303
4304 u8 flow_index[0x20];
4305
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307};
4308
4309enum {
4310 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4311 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4312 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4313};
4314
4315struct mlx5_ifc_query_flow_group_out_bits {
4316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318
4319 u8 syndrome[0x20];
4320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322
4323 u8 start_flow_index[0x20];
4324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326
4327 u8 end_flow_index[0x20];
4328
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332 u8 match_criteria_enable[0x8];
4333
4334 struct mlx5_ifc_fte_match_param_bits match_criteria;
4335
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337};
4338
4339struct mlx5_ifc_query_flow_group_in_bits {
4340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344 u8 op_mod[0x10];
4345
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
4348 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352 u8 table_id[0x18];
4353
4354 u8 group_id[0x20];
4355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357};
4358
Amir Vadai9dc0b282016-05-13 12:55:39 +00004359struct mlx5_ifc_query_flow_counter_out_bits {
4360 u8 status[0x8];
4361 u8 reserved_at_8[0x18];
4362
4363 u8 syndrome[0x20];
4364
4365 u8 reserved_at_40[0x40];
4366
4367 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4368};
4369
4370struct mlx5_ifc_query_flow_counter_in_bits {
4371 u8 opcode[0x10];
4372 u8 reserved_at_10[0x10];
4373
4374 u8 reserved_at_20[0x10];
4375 u8 op_mod[0x10];
4376
4377 u8 reserved_at_40[0x80];
4378
4379 u8 clear[0x1];
4380 u8 reserved_at_c1[0xf];
4381 u8 num_of_counters[0x10];
4382
4383 u8 reserved_at_e0[0x10];
4384 u8 flow_counter_id[0x10];
4385};
4386
Saeed Mahameedd6666752015-12-01 18:03:22 +02004387struct mlx5_ifc_query_esw_vport_context_out_bits {
4388 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004390
4391 u8 syndrome[0x20];
4392
Matan Barakb4ff3a32016-02-09 14:57:42 +02004393 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004394
4395 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4396};
4397
4398struct mlx5_ifc_query_esw_vport_context_in_bits {
4399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004403 u8 op_mod[0x10];
4404
4405 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004406 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004407 u8 vport_number[0x10];
4408
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004410};
4411
4412struct mlx5_ifc_modify_esw_vport_context_out_bits {
4413 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004415
4416 u8 syndrome[0x20];
4417
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004419};
4420
4421struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004423 u8 vport_cvlan_insert[0x1];
4424 u8 vport_svlan_insert[0x1];
4425 u8 vport_cvlan_strip[0x1];
4426 u8 vport_svlan_strip[0x1];
4427};
4428
4429struct mlx5_ifc_modify_esw_vport_context_in_bits {
4430 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004432
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004434 u8 op_mod[0x10];
4435
4436 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004438 u8 vport_number[0x10];
4439
4440 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4441
4442 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4443};
4444
Saeed Mahameede2816822015-05-28 22:28:40 +03004445struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004448
4449 u8 syndrome[0x20];
4450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452
4453 struct mlx5_ifc_eqc_bits eq_context_entry;
4454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456
4457 u8 event_bitmask[0x40];
4458
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460
4461 u8 pas[0][0x40];
4462};
4463
4464struct mlx5_ifc_query_eq_in_bits {
4465 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004467
Matan Barakb4ff3a32016-02-09 14:57:42 +02004468 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004469 u8 op_mod[0x10];
4470
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004472 u8 eq_number[0x8];
4473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475};
4476
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004477struct mlx5_ifc_encap_header_in_bits {
4478 u8 reserved_at_0[0x5];
4479 u8 header_type[0x3];
4480 u8 reserved_at_8[0xe];
4481 u8 encap_header_size[0xa];
4482
4483 u8 reserved_at_20[0x10];
4484 u8 encap_header[2][0x8];
4485
4486 u8 more_encap_header[0][0x8];
4487};
4488
4489struct mlx5_ifc_query_encap_header_out_bits {
4490 u8 status[0x8];
4491 u8 reserved_at_8[0x18];
4492
4493 u8 syndrome[0x20];
4494
4495 u8 reserved_at_40[0xa0];
4496
4497 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4498};
4499
4500struct mlx5_ifc_query_encap_header_in_bits {
4501 u8 opcode[0x10];
4502 u8 reserved_at_10[0x10];
4503
4504 u8 reserved_at_20[0x10];
4505 u8 op_mod[0x10];
4506
4507 u8 encap_id[0x20];
4508
4509 u8 reserved_at_60[0xa0];
4510};
4511
4512struct mlx5_ifc_alloc_encap_header_out_bits {
4513 u8 status[0x8];
4514 u8 reserved_at_8[0x18];
4515
4516 u8 syndrome[0x20];
4517
4518 u8 encap_id[0x20];
4519
4520 u8 reserved_at_60[0x20];
4521};
4522
4523struct mlx5_ifc_alloc_encap_header_in_bits {
4524 u8 opcode[0x10];
4525 u8 reserved_at_10[0x10];
4526
4527 u8 reserved_at_20[0x10];
4528 u8 op_mod[0x10];
4529
4530 u8 reserved_at_40[0xa0];
4531
4532 struct mlx5_ifc_encap_header_in_bits encap_header;
4533};
4534
4535struct mlx5_ifc_dealloc_encap_header_out_bits {
4536 u8 status[0x8];
4537 u8 reserved_at_8[0x18];
4538
4539 u8 syndrome[0x20];
4540
4541 u8 reserved_at_40[0x40];
4542};
4543
4544struct mlx5_ifc_dealloc_encap_header_in_bits {
4545 u8 opcode[0x10];
4546 u8 reserved_at_10[0x10];
4547
4548 u8 reserved_20[0x10];
4549 u8 op_mod[0x10];
4550
4551 u8 encap_id[0x20];
4552
4553 u8 reserved_60[0x20];
4554};
4555
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004556struct mlx5_ifc_set_action_in_bits {
4557 u8 action_type[0x4];
4558 u8 field[0xc];
4559 u8 reserved_at_10[0x3];
4560 u8 offset[0x5];
4561 u8 reserved_at_18[0x3];
4562 u8 length[0x5];
4563
4564 u8 data[0x20];
4565};
4566
4567struct mlx5_ifc_add_action_in_bits {
4568 u8 action_type[0x4];
4569 u8 field[0xc];
4570 u8 reserved_at_10[0x10];
4571
4572 u8 data[0x20];
4573};
4574
4575union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4576 struct mlx5_ifc_set_action_in_bits set_action_in;
4577 struct mlx5_ifc_add_action_in_bits add_action_in;
4578 u8 reserved_at_0[0x40];
4579};
4580
4581enum {
4582 MLX5_ACTION_TYPE_SET = 0x1,
4583 MLX5_ACTION_TYPE_ADD = 0x2,
4584};
4585
4586enum {
4587 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4588 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4589 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4590 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4591 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4592 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4593 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4594 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4595 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4596 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4597 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4598 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4599 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4600 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4601 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4602 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4603 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4604 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4605 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4606 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4607 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4608 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
4609};
4610
4611struct mlx5_ifc_alloc_modify_header_context_out_bits {
4612 u8 status[0x8];
4613 u8 reserved_at_8[0x18];
4614
4615 u8 syndrome[0x20];
4616
4617 u8 modify_header_id[0x20];
4618
4619 u8 reserved_at_60[0x20];
4620};
4621
4622struct mlx5_ifc_alloc_modify_header_context_in_bits {
4623 u8 opcode[0x10];
4624 u8 reserved_at_10[0x10];
4625
4626 u8 reserved_at_20[0x10];
4627 u8 op_mod[0x10];
4628
4629 u8 reserved_at_40[0x20];
4630
4631 u8 table_type[0x8];
4632 u8 reserved_at_68[0x10];
4633 u8 num_of_actions[0x8];
4634
4635 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4636};
4637
4638struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4639 u8 status[0x8];
4640 u8 reserved_at_8[0x18];
4641
4642 u8 syndrome[0x20];
4643
4644 u8 reserved_at_40[0x40];
4645};
4646
4647struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4648 u8 opcode[0x10];
4649 u8 reserved_at_10[0x10];
4650
4651 u8 reserved_at_20[0x10];
4652 u8 op_mod[0x10];
4653
4654 u8 modify_header_id[0x20];
4655
4656 u8 reserved_at_60[0x20];
4657};
4658
Saeed Mahameede2816822015-05-28 22:28:40 +03004659struct mlx5_ifc_query_dct_out_bits {
4660 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004661 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004662
4663 u8 syndrome[0x20];
4664
Matan Barakb4ff3a32016-02-09 14:57:42 +02004665 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004666
4667 struct mlx5_ifc_dctc_bits dct_context_entry;
4668
Matan Barakb4ff3a32016-02-09 14:57:42 +02004669 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004670};
4671
4672struct mlx5_ifc_query_dct_in_bits {
4673 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004674 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004675
Matan Barakb4ff3a32016-02-09 14:57:42 +02004676 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004677 u8 op_mod[0x10];
4678
Matan Barakb4ff3a32016-02-09 14:57:42 +02004679 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004680 u8 dctn[0x18];
4681
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004683};
4684
4685struct mlx5_ifc_query_cq_out_bits {
4686 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004687 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004688
4689 u8 syndrome[0x20];
4690
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004692
4693 struct mlx5_ifc_cqc_bits cq_context;
4694
Matan Barakb4ff3a32016-02-09 14:57:42 +02004695 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004696
4697 u8 pas[0][0x40];
4698};
4699
4700struct mlx5_ifc_query_cq_in_bits {
4701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004703
Matan Barakb4ff3a32016-02-09 14:57:42 +02004704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004705 u8 op_mod[0x10];
4706
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004708 u8 cqn[0x18];
4709
Matan Barakb4ff3a32016-02-09 14:57:42 +02004710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004711};
4712
4713struct mlx5_ifc_query_cong_status_out_bits {
4714 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716
4717 u8 syndrome[0x20];
4718
Matan Barakb4ff3a32016-02-09 14:57:42 +02004719 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004720
4721 u8 enable[0x1];
4722 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004723 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004724};
4725
4726struct mlx5_ifc_query_cong_status_in_bits {
4727 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004731 u8 op_mod[0x10];
4732
Matan Barakb4ff3a32016-02-09 14:57:42 +02004733 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004734 u8 priority[0x4];
4735 u8 cong_protocol[0x4];
4736
Matan Barakb4ff3a32016-02-09 14:57:42 +02004737 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004738};
4739
4740struct mlx5_ifc_query_cong_statistics_out_bits {
4741 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004742 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004743
4744 u8 syndrome[0x20];
4745
Matan Barakb4ff3a32016-02-09 14:57:42 +02004746 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004747
Parav Pandite1f24a72017-04-16 07:29:29 +03004748 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004749
4750 u8 sum_flows[0x20];
4751
Parav Pandite1f24a72017-04-16 07:29:29 +03004752 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004753
Parav Pandite1f24a72017-04-16 07:29:29 +03004754 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004755
Parav Pandite1f24a72017-04-16 07:29:29 +03004756 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004757
Parav Pandite1f24a72017-04-16 07:29:29 +03004758 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759
Matan Barakb4ff3a32016-02-09 14:57:42 +02004760 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004761
4762 u8 time_stamp_high[0x20];
4763
4764 u8 time_stamp_low[0x20];
4765
4766 u8 accumulators_period[0x20];
4767
Parav Pandite1f24a72017-04-16 07:29:29 +03004768 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004769
Parav Pandite1f24a72017-04-16 07:29:29 +03004770 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004771
Parav Pandite1f24a72017-04-16 07:29:29 +03004772 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004773
Parav Pandite1f24a72017-04-16 07:29:29 +03004774 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777};
4778
4779struct mlx5_ifc_query_cong_statistics_in_bits {
4780 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784 u8 op_mod[0x10];
4785
4786 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004787 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788
Matan Barakb4ff3a32016-02-09 14:57:42 +02004789 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790};
4791
4792struct mlx5_ifc_query_cong_params_out_bits {
4793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
4796 u8 syndrome[0x20];
4797
Matan Barakb4ff3a32016-02-09 14:57:42 +02004798 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004799
4800 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4801};
4802
4803struct mlx5_ifc_query_cong_params_in_bits {
4804 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004806
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808 u8 op_mod[0x10];
4809
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811 u8 cong_protocol[0x4];
4812
Matan Barakb4ff3a32016-02-09 14:57:42 +02004813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814};
4815
4816struct mlx5_ifc_query_adapter_out_bits {
4817 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819
4820 u8 syndrome[0x20];
4821
Matan Barakb4ff3a32016-02-09 14:57:42 +02004822 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823
4824 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4825};
4826
4827struct mlx5_ifc_query_adapter_in_bits {
4828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830
Matan Barakb4ff3a32016-02-09 14:57:42 +02004831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004832 u8 op_mod[0x10];
4833
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835};
4836
4837struct mlx5_ifc_qp_2rst_out_bits {
4838 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840
4841 u8 syndrome[0x20];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844};
4845
4846struct mlx5_ifc_qp_2rst_in_bits {
4847 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851 u8 op_mod[0x10];
4852
Matan Barakb4ff3a32016-02-09 14:57:42 +02004853 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854 u8 qpn[0x18];
4855
Matan Barakb4ff3a32016-02-09 14:57:42 +02004856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004857};
4858
4859struct mlx5_ifc_qp_2err_out_bits {
4860 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004861 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862
4863 u8 syndrome[0x20];
4864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866};
4867
4868struct mlx5_ifc_qp_2err_in_bits {
4869 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004870 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873 u8 op_mod[0x10];
4874
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876 u8 qpn[0x18];
4877
Matan Barakb4ff3a32016-02-09 14:57:42 +02004878 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004879};
4880
4881struct mlx5_ifc_page_fault_resume_out_bits {
4882 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884
4885 u8 syndrome[0x20];
4886
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888};
4889
4890struct mlx5_ifc_page_fault_resume_in_bits {
4891 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
Matan Barakb4ff3a32016-02-09 14:57:42 +02004894 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004895 u8 op_mod[0x10];
4896
4897 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004899 u8 page_fault_type[0x3];
4900 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004901
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004902 u8 reserved_at_60[0x8];
4903 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904};
4905
4906struct mlx5_ifc_nop_out_bits {
4907 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909
4910 u8 syndrome[0x20];
4911
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913};
4914
4915struct mlx5_ifc_nop_in_bits {
4916 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920 u8 op_mod[0x10];
4921
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923};
4924
4925struct mlx5_ifc_modify_vport_state_out_bits {
4926 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
4929 u8 syndrome[0x20];
4930
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932};
4933
4934struct mlx5_ifc_modify_vport_state_in_bits {
4935 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939 u8 op_mod[0x10];
4940
4941 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943 u8 vport_number[0x10];
4944
Matan Barakb4ff3a32016-02-09 14:57:42 +02004945 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948};
4949
4950struct mlx5_ifc_modify_tis_out_bits {
4951 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
4954 u8 syndrome[0x20];
4955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957};
4958
majd@mellanox.com75850d02016-01-14 19:13:06 +02004959struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004961
Aviv Heller84df61e2016-05-10 13:47:50 +03004962 u8 reserved_at_20[0x1d];
4963 u8 lag_tx_port_affinity[0x1];
4964 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004965 u8 prio[0x1];
4966};
4967
Saeed Mahameede2816822015-05-28 22:28:40 +03004968struct mlx5_ifc_modify_tis_in_bits {
4969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973 u8 op_mod[0x10];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976 u8 tisn[0x18];
4977
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
majd@mellanox.com75850d02016-01-14 19:13:06 +02004980 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004981
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
4984 struct mlx5_ifc_tisc_bits ctx;
4985};
4986
Achiad Shochatd9eea402015-08-04 14:05:42 +03004987struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004989
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02004991 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02004992 u8 reserved_at_3c[0x1];
4993 u8 hash[0x1];
4994 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004995 u8 lro[0x1];
4996};
4997
Saeed Mahameede2816822015-05-28 22:28:40 +03004998struct mlx5_ifc_modify_tir_out_bits {
4999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001
5002 u8 syndrome[0x20];
5003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005};
5006
5007struct mlx5_ifc_modify_tir_in_bits {
5008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012 u8 op_mod[0x10];
5013
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005015 u8 tirn[0x18];
5016
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
Achiad Shochatd9eea402015-08-04 14:05:42 +03005019 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005020
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
5023 struct mlx5_ifc_tirc_bits ctx;
5024};
5025
5026struct mlx5_ifc_modify_sq_out_bits {
5027 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029
5030 u8 syndrome[0x20];
5031
Matan Barakb4ff3a32016-02-09 14:57:42 +02005032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033};
5034
5035struct mlx5_ifc_modify_sq_in_bits {
5036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038
Matan Barakb4ff3a32016-02-09 14:57:42 +02005039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005040 u8 op_mod[0x10];
5041
5042 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044 u8 sqn[0x18];
5045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047
5048 u8 modify_bitmask[0x40];
5049
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051
5052 struct mlx5_ifc_sqc_bits ctx;
5053};
5054
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005055struct mlx5_ifc_modify_scheduling_element_out_bits {
5056 u8 status[0x8];
5057 u8 reserved_at_8[0x18];
5058
5059 u8 syndrome[0x20];
5060
5061 u8 reserved_at_40[0x1c0];
5062};
5063
5064enum {
5065 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5066 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5067};
5068
5069struct mlx5_ifc_modify_scheduling_element_in_bits {
5070 u8 opcode[0x10];
5071 u8 reserved_at_10[0x10];
5072
5073 u8 reserved_at_20[0x10];
5074 u8 op_mod[0x10];
5075
5076 u8 scheduling_hierarchy[0x8];
5077 u8 reserved_at_48[0x18];
5078
5079 u8 scheduling_element_id[0x20];
5080
5081 u8 reserved_at_80[0x20];
5082
5083 u8 modify_bitmask[0x20];
5084
5085 u8 reserved_at_c0[0x40];
5086
5087 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5088
5089 u8 reserved_at_300[0x100];
5090};
5091
Saeed Mahameede2816822015-05-28 22:28:40 +03005092struct mlx5_ifc_modify_rqt_out_bits {
5093 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005095
5096 u8 syndrome[0x20];
5097
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099};
5100
Achiad Shochat5c503682015-08-04 14:05:43 +03005101struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005103
Matan Barakb4ff3a32016-02-09 14:57:42 +02005104 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005105 u8 rqn_list[0x1];
5106};
5107
Saeed Mahameede2816822015-05-28 22:28:40 +03005108struct mlx5_ifc_modify_rqt_in_bits {
5109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111
Matan Barakb4ff3a32016-02-09 14:57:42 +02005112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005113 u8 op_mod[0x10];
5114
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116 u8 rqtn[0x18];
5117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119
Achiad Shochat5c503682015-08-04 14:05:43 +03005120 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005121
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123
5124 struct mlx5_ifc_rqtc_bits ctx;
5125};
5126
5127struct mlx5_ifc_modify_rq_out_bits {
5128 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005129 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005130
5131 u8 syndrome[0x20];
5132
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005134};
5135
Alex Vesker83b502a2016-08-04 17:32:02 +03005136enum {
5137 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005138 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005139 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005140};
5141
Saeed Mahameede2816822015-05-28 22:28:40 +03005142struct mlx5_ifc_modify_rq_in_bits {
5143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147 u8 op_mod[0x10];
5148
5149 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151 u8 rqn[0x18];
5152
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
5155 u8 modify_bitmask[0x40];
5156
Matan Barakb4ff3a32016-02-09 14:57:42 +02005157 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005158
5159 struct mlx5_ifc_rqc_bits ctx;
5160};
5161
5162struct mlx5_ifc_modify_rmp_out_bits {
5163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165
5166 u8 syndrome[0x20];
5167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169};
5170
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005171struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005175 u8 lwm[0x1];
5176};
5177
Saeed Mahameede2816822015-05-28 22:28:40 +03005178struct mlx5_ifc_modify_rmp_in_bits {
5179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183 u8 op_mod[0x10];
5184
5185 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005186 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005187 u8 rmpn[0x18];
5188
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005191 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005192
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194
5195 struct mlx5_ifc_rmpc_bits ctx;
5196};
5197
5198struct mlx5_ifc_modify_nic_vport_context_out_bits {
5199 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005200 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201
5202 u8 syndrome[0x20];
5203
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205};
5206
5207struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005208 u8 reserved_at_0[0x16];
5209 u8 node_guid[0x1];
5210 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005211 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005212 u8 mtu[0x1];
5213 u8 change_event[0x1];
5214 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005215 u8 permanent_address[0x1];
5216 u8 addresses_list[0x1];
5217 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219};
5220
5221struct mlx5_ifc_modify_nic_vport_context_in_bits {
5222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226 u8 op_mod[0x10];
5227
5228 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230 u8 vport_number[0x10];
5231
5232 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5233
Matan Barakb4ff3a32016-02-09 14:57:42 +02005234 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235
5236 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5237};
5238
5239struct mlx5_ifc_modify_hca_vport_context_out_bits {
5240 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005241 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005242
5243 u8 syndrome[0x20];
5244
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246};
5247
5248struct mlx5_ifc_modify_hca_vport_context_in_bits {
5249 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251
Matan Barakb4ff3a32016-02-09 14:57:42 +02005252 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005253 u8 op_mod[0x10];
5254
5255 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005257 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258 u8 vport_number[0x10];
5259
Matan Barakb4ff3a32016-02-09 14:57:42 +02005260 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005261
5262 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5263};
5264
5265struct mlx5_ifc_modify_cq_out_bits {
5266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268
5269 u8 syndrome[0x20];
5270
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272};
5273
5274enum {
5275 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5276 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5277};
5278
5279struct mlx5_ifc_modify_cq_in_bits {
5280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284 u8 op_mod[0x10];
5285
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287 u8 cqn[0x18];
5288
5289 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5290
5291 struct mlx5_ifc_cqc_bits cq_context;
5292
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
5295 u8 pas[0][0x40];
5296};
5297
5298struct mlx5_ifc_modify_cong_status_out_bits {
5299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301
5302 u8 syndrome[0x20];
5303
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305};
5306
5307struct mlx5_ifc_modify_cong_status_in_bits {
5308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310
Matan Barakb4ff3a32016-02-09 14:57:42 +02005311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005312 u8 op_mod[0x10];
5313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315 u8 priority[0x4];
5316 u8 cong_protocol[0x4];
5317
5318 u8 enable[0x1];
5319 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005320 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005321};
5322
5323struct mlx5_ifc_modify_cong_params_out_bits {
5324 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326
5327 u8 syndrome[0x20];
5328
Matan Barakb4ff3a32016-02-09 14:57:42 +02005329 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005330};
5331
5332struct mlx5_ifc_modify_cong_params_in_bits {
5333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337 u8 op_mod[0x10];
5338
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340 u8 cong_protocol[0x4];
5341
5342 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5343
Matan Barakb4ff3a32016-02-09 14:57:42 +02005344 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005345
5346 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5347};
5348
5349struct mlx5_ifc_manage_pages_out_bits {
5350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352
5353 u8 syndrome[0x20];
5354
5355 u8 output_num_entries[0x20];
5356
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
5359 u8 pas[0][0x40];
5360};
5361
5362enum {
5363 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5364 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5365 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5366};
5367
5368struct mlx5_ifc_manage_pages_in_bits {
5369 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005370 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005371
Matan Barakb4ff3a32016-02-09 14:57:42 +02005372 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005373 u8 op_mod[0x10];
5374
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376 u8 function_id[0x10];
5377
5378 u8 input_num_entries[0x20];
5379
5380 u8 pas[0][0x40];
5381};
5382
5383struct mlx5_ifc_mad_ifc_out_bits {
5384 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005385 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005386
5387 u8 syndrome[0x20];
5388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390
5391 u8 response_mad_packet[256][0x8];
5392};
5393
5394struct mlx5_ifc_mad_ifc_in_bits {
5395 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399 u8 op_mod[0x10];
5400
5401 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403 u8 port[0x8];
5404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406
5407 u8 mad[256][0x8];
5408};
5409
5410struct mlx5_ifc_init_hca_out_bits {
5411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413
5414 u8 syndrome[0x20];
5415
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417};
5418
5419struct mlx5_ifc_init_hca_in_bits {
5420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424 u8 op_mod[0x10];
5425
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427};
5428
5429struct mlx5_ifc_init2rtr_qp_out_bits {
5430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432
5433 u8 syndrome[0x20];
5434
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436};
5437
5438struct mlx5_ifc_init2rtr_qp_in_bits {
5439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443 u8 op_mod[0x10];
5444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446 u8 qpn[0x18];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449
5450 u8 opt_param_mask[0x20];
5451
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
5454 struct mlx5_ifc_qpc_bits qpc;
5455
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457};
5458
5459struct mlx5_ifc_init2init_qp_out_bits {
5460 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462
5463 u8 syndrome[0x20];
5464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466};
5467
5468struct mlx5_ifc_init2init_qp_in_bits {
5469 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473 u8 op_mod[0x10];
5474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476 u8 qpn[0x18];
5477
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
5480 u8 opt_param_mask[0x20];
5481
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
5484 struct mlx5_ifc_qpc_bits qpc;
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487};
5488
5489struct mlx5_ifc_get_dropped_packet_log_out_bits {
5490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 u8 syndrome[0x20];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 u8 packet_headers_log[128][0x8];
5498
5499 u8 packet_syndrome[64][0x8];
5500};
5501
5502struct mlx5_ifc_get_dropped_packet_log_in_bits {
5503 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507 u8 op_mod[0x10];
5508
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510};
5511
5512struct mlx5_ifc_gen_eqe_in_bits {
5513 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517 u8 op_mod[0x10];
5518
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520 u8 eq_number[0x8];
5521
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523
5524 u8 eqe[64][0x8];
5525};
5526
5527struct mlx5_ifc_gen_eq_out_bits {
5528 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530
5531 u8 syndrome[0x20];
5532
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534};
5535
5536struct mlx5_ifc_enable_hca_out_bits {
5537 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539
5540 u8 syndrome[0x20];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543};
5544
5545struct mlx5_ifc_enable_hca_in_bits {
5546 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550 u8 op_mod[0x10];
5551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553 u8 function_id[0x10];
5554
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556};
5557
5558struct mlx5_ifc_drain_dct_out_bits {
5559 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561
5562 u8 syndrome[0x20];
5563
Matan Barakb4ff3a32016-02-09 14:57:42 +02005564 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005565};
5566
5567struct mlx5_ifc_drain_dct_in_bits {
5568 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572 u8 op_mod[0x10];
5573
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575 u8 dctn[0x18];
5576
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578};
5579
5580struct mlx5_ifc_disable_hca_out_bits {
5581 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583
5584 u8 syndrome[0x20];
5585
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587};
5588
5589struct mlx5_ifc_disable_hca_in_bits {
5590 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005591 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594 u8 op_mod[0x10];
5595
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597 u8 function_id[0x10];
5598
Matan Barakb4ff3a32016-02-09 14:57:42 +02005599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005600};
5601
5602struct mlx5_ifc_detach_from_mcg_out_bits {
5603 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605
5606 u8 syndrome[0x20];
5607
Matan Barakb4ff3a32016-02-09 14:57:42 +02005608 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005609};
5610
5611struct mlx5_ifc_detach_from_mcg_in_bits {
5612 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614
Matan Barakb4ff3a32016-02-09 14:57:42 +02005615 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005616 u8 op_mod[0x10];
5617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619 u8 qpn[0x18];
5620
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622
5623 u8 multicast_gid[16][0x8];
5624};
5625
Saeed Mahameed74862162016-06-09 15:11:34 +03005626struct mlx5_ifc_destroy_xrq_out_bits {
5627 u8 status[0x8];
5628 u8 reserved_at_8[0x18];
5629
5630 u8 syndrome[0x20];
5631
5632 u8 reserved_at_40[0x40];
5633};
5634
5635struct mlx5_ifc_destroy_xrq_in_bits {
5636 u8 opcode[0x10];
5637 u8 reserved_at_10[0x10];
5638
5639 u8 reserved_at_20[0x10];
5640 u8 op_mod[0x10];
5641
5642 u8 reserved_at_40[0x8];
5643 u8 xrqn[0x18];
5644
5645 u8 reserved_at_60[0x20];
5646};
5647
Saeed Mahameede2816822015-05-28 22:28:40 +03005648struct mlx5_ifc_destroy_xrc_srq_out_bits {
5649 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651
5652 u8 syndrome[0x20];
5653
Matan Barakb4ff3a32016-02-09 14:57:42 +02005654 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005655};
5656
5657struct mlx5_ifc_destroy_xrc_srq_in_bits {
5658 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005659 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005660
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662 u8 op_mod[0x10];
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665 u8 xrc_srqn[0x18];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_destroy_tis_out_bits {
5671 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
5674 u8 syndrome[0x20];
5675
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677};
5678
5679struct mlx5_ifc_destroy_tis_in_bits {
5680 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684 u8 op_mod[0x10];
5685
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687 u8 tisn[0x18];
5688
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690};
5691
5692struct mlx5_ifc_destroy_tir_out_bits {
5693 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695
5696 u8 syndrome[0x20];
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699};
5700
5701struct mlx5_ifc_destroy_tir_in_bits {
5702 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706 u8 op_mod[0x10];
5707
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709 u8 tirn[0x18];
5710
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712};
5713
5714struct mlx5_ifc_destroy_srq_out_bits {
5715 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717
5718 u8 syndrome[0x20];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721};
5722
5723struct mlx5_ifc_destroy_srq_in_bits {
5724 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728 u8 op_mod[0x10];
5729
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731 u8 srqn[0x18];
5732
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734};
5735
5736struct mlx5_ifc_destroy_sq_out_bits {
5737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739
5740 u8 syndrome[0x20];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743};
5744
5745struct mlx5_ifc_destroy_sq_in_bits {
5746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750 u8 op_mod[0x10];
5751
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753 u8 sqn[0x18];
5754
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756};
5757
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005758struct mlx5_ifc_destroy_scheduling_element_out_bits {
5759 u8 status[0x8];
5760 u8 reserved_at_8[0x18];
5761
5762 u8 syndrome[0x20];
5763
5764 u8 reserved_at_40[0x1c0];
5765};
5766
5767struct mlx5_ifc_destroy_scheduling_element_in_bits {
5768 u8 opcode[0x10];
5769 u8 reserved_at_10[0x10];
5770
5771 u8 reserved_at_20[0x10];
5772 u8 op_mod[0x10];
5773
5774 u8 scheduling_hierarchy[0x8];
5775 u8 reserved_at_48[0x18];
5776
5777 u8 scheduling_element_id[0x20];
5778
5779 u8 reserved_at_80[0x180];
5780};
5781
Saeed Mahameede2816822015-05-28 22:28:40 +03005782struct mlx5_ifc_destroy_rqt_out_bits {
5783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785
5786 u8 syndrome[0x20];
5787
Matan Barakb4ff3a32016-02-09 14:57:42 +02005788 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005789};
5790
5791struct mlx5_ifc_destroy_rqt_in_bits {
5792 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796 u8 op_mod[0x10];
5797
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799 u8 rqtn[0x18];
5800
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802};
5803
5804struct mlx5_ifc_destroy_rq_out_bits {
5805 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807
5808 u8 syndrome[0x20];
5809
Matan Barakb4ff3a32016-02-09 14:57:42 +02005810 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005811};
5812
5813struct mlx5_ifc_destroy_rq_in_bits {
5814 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818 u8 op_mod[0x10];
5819
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821 u8 rqn[0x18];
5822
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824};
5825
5826struct mlx5_ifc_destroy_rmp_out_bits {
5827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829
5830 u8 syndrome[0x20];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833};
5834
5835struct mlx5_ifc_destroy_rmp_in_bits {
5836 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840 u8 op_mod[0x10];
5841
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843 u8 rmpn[0x18];
5844
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846};
5847
5848struct mlx5_ifc_destroy_qp_out_bits {
5849 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851
5852 u8 syndrome[0x20];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855};
5856
5857struct mlx5_ifc_destroy_qp_in_bits {
5858 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862 u8 op_mod[0x10];
5863
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865 u8 qpn[0x18];
5866
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868};
5869
5870struct mlx5_ifc_destroy_psv_out_bits {
5871 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873
5874 u8 syndrome[0x20];
5875
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877};
5878
5879struct mlx5_ifc_destroy_psv_in_bits {
5880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884 u8 op_mod[0x10];
5885
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887 u8 psvn[0x18];
5888
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890};
5891
5892struct mlx5_ifc_destroy_mkey_out_bits {
5893 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895
5896 u8 syndrome[0x20];
5897
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899};
5900
5901struct mlx5_ifc_destroy_mkey_in_bits {
5902 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906 u8 op_mod[0x10];
5907
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909 u8 mkey_index[0x18];
5910
Matan Barakb4ff3a32016-02-09 14:57:42 +02005911 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005912};
5913
5914struct mlx5_ifc_destroy_flow_table_out_bits {
5915 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917
5918 u8 syndrome[0x20];
5919
Matan Barakb4ff3a32016-02-09 14:57:42 +02005920 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921};
5922
5923struct mlx5_ifc_destroy_flow_table_in_bits {
5924 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928 u8 op_mod[0x10];
5929
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005930 u8 other_vport[0x1];
5931 u8 reserved_at_41[0xf];
5932 u8 vport_number[0x10];
5933
5934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935
5936 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938
Matan Barakb4ff3a32016-02-09 14:57:42 +02005939 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005940 u8 table_id[0x18];
5941
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943};
5944
5945struct mlx5_ifc_destroy_flow_group_out_bits {
5946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948
5949 u8 syndrome[0x20];
5950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952};
5953
5954struct mlx5_ifc_destroy_flow_group_in_bits {
5955 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959 u8 op_mod[0x10];
5960
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005961 u8 other_vport[0x1];
5962 u8 reserved_at_41[0xf];
5963 u8 vport_number[0x10];
5964
5965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966
5967 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971 u8 table_id[0x18];
5972
5973 u8 group_id[0x20];
5974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976};
5977
5978struct mlx5_ifc_destroy_eq_out_bits {
5979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
5982 u8 syndrome[0x20];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985};
5986
5987struct mlx5_ifc_destroy_eq_in_bits {
5988 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992 u8 op_mod[0x10];
5993
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995 u8 eq_number[0x8];
5996
Matan Barakb4ff3a32016-02-09 14:57:42 +02005997 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005998};
5999
6000struct mlx5_ifc_destroy_dct_out_bits {
6001 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003
6004 u8 syndrome[0x20];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007};
6008
6009struct mlx5_ifc_destroy_dct_in_bits {
6010 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014 u8 op_mod[0x10];
6015
Matan Barakb4ff3a32016-02-09 14:57:42 +02006016 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006017 u8 dctn[0x18];
6018
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020};
6021
6022struct mlx5_ifc_destroy_cq_out_bits {
6023 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025
6026 u8 syndrome[0x20];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029};
6030
6031struct mlx5_ifc_destroy_cq_in_bits {
6032 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036 u8 op_mod[0x10];
6037
Matan Barakb4ff3a32016-02-09 14:57:42 +02006038 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006039 u8 cqn[0x18];
6040
Matan Barakb4ff3a32016-02-09 14:57:42 +02006041 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006042};
6043
6044struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6045 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047
6048 u8 syndrome[0x20];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6054 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058 u8 op_mod[0x10];
6059
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063 u8 vxlan_udp_port[0x10];
6064};
6065
6066struct mlx5_ifc_delete_l2_table_entry_out_bits {
6067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069
6070 u8 syndrome[0x20];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_delete_l2_table_entry_in_bits {
6076 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080 u8 op_mod[0x10];
6081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085 u8 table_index[0x18];
6086
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088};
6089
6090struct mlx5_ifc_delete_fte_out_bits {
6091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093
6094 u8 syndrome[0x20];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097};
6098
6099struct mlx5_ifc_delete_fte_in_bits {
6100 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104 u8 op_mod[0x10];
6105
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006106 u8 other_vport[0x1];
6107 u8 reserved_at_41[0xf];
6108 u8 vport_number[0x10];
6109
6110 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111
6112 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 table_id[0x18];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119
6120 u8 flow_index[0x20];
6121
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123};
6124
6125struct mlx5_ifc_dealloc_xrcd_out_bits {
6126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128
6129 u8 syndrome[0x20];
6130
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132};
6133
6134struct mlx5_ifc_dealloc_xrcd_in_bits {
6135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139 u8 op_mod[0x10];
6140
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142 u8 xrcd[0x18];
6143
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145};
6146
6147struct mlx5_ifc_dealloc_uar_out_bits {
6148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150
6151 u8 syndrome[0x20];
6152
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154};
6155
6156struct mlx5_ifc_dealloc_uar_in_bits {
6157 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161 u8 op_mod[0x10];
6162
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164 u8 uar[0x18];
6165
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167};
6168
6169struct mlx5_ifc_dealloc_transport_domain_out_bits {
6170 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172
6173 u8 syndrome[0x20];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_dealloc_transport_domain_in_bits {
6179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183 u8 op_mod[0x10];
6184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186 u8 transport_domain[0x18];
6187
Matan Barakb4ff3a32016-02-09 14:57:42 +02006188 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006189};
6190
6191struct mlx5_ifc_dealloc_q_counter_out_bits {
6192 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194
6195 u8 syndrome[0x20];
6196
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198};
6199
6200struct mlx5_ifc_dealloc_q_counter_in_bits {
6201 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205 u8 op_mod[0x10];
6206
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208 u8 counter_set_id[0x8];
6209
Matan Barakb4ff3a32016-02-09 14:57:42 +02006210 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006211};
6212
6213struct mlx5_ifc_dealloc_pd_out_bits {
6214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216
6217 u8 syndrome[0x20];
6218
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220};
6221
6222struct mlx5_ifc_dealloc_pd_in_bits {
6223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227 u8 op_mod[0x10];
6228
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230 u8 pd[0x18];
6231
Matan Barakb4ff3a32016-02-09 14:57:42 +02006232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006233};
6234
Amir Vadai9dc0b282016-05-13 12:55:39 +00006235struct mlx5_ifc_dealloc_flow_counter_out_bits {
6236 u8 status[0x8];
6237 u8 reserved_at_8[0x18];
6238
6239 u8 syndrome[0x20];
6240
6241 u8 reserved_at_40[0x40];
6242};
6243
6244struct mlx5_ifc_dealloc_flow_counter_in_bits {
6245 u8 opcode[0x10];
6246 u8 reserved_at_10[0x10];
6247
6248 u8 reserved_at_20[0x10];
6249 u8 op_mod[0x10];
6250
6251 u8 reserved_at_40[0x10];
6252 u8 flow_counter_id[0x10];
6253
6254 u8 reserved_at_60[0x20];
6255};
6256
Saeed Mahameed74862162016-06-09 15:11:34 +03006257struct mlx5_ifc_create_xrq_out_bits {
6258 u8 status[0x8];
6259 u8 reserved_at_8[0x18];
6260
6261 u8 syndrome[0x20];
6262
6263 u8 reserved_at_40[0x8];
6264 u8 xrqn[0x18];
6265
6266 u8 reserved_at_60[0x20];
6267};
6268
6269struct mlx5_ifc_create_xrq_in_bits {
6270 u8 opcode[0x10];
6271 u8 reserved_at_10[0x10];
6272
6273 u8 reserved_at_20[0x10];
6274 u8 op_mod[0x10];
6275
6276 u8 reserved_at_40[0x40];
6277
6278 struct mlx5_ifc_xrqc_bits xrq_context;
6279};
6280
Saeed Mahameede2816822015-05-28 22:28:40 +03006281struct mlx5_ifc_create_xrc_srq_out_bits {
6282 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284
6285 u8 syndrome[0x20];
6286
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288 u8 xrc_srqn[0x18];
6289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291};
6292
6293struct mlx5_ifc_create_xrc_srq_in_bits {
6294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298 u8 op_mod[0x10];
6299
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
6302 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305
6306 u8 pas[0][0x40];
6307};
6308
6309struct mlx5_ifc_create_tis_out_bits {
6310 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312
6313 u8 syndrome[0x20];
6314
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316 u8 tisn[0x18];
6317
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319};
6320
6321struct mlx5_ifc_create_tis_in_bits {
6322 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326 u8 op_mod[0x10];
6327
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329
6330 struct mlx5_ifc_tisc_bits ctx;
6331};
6332
6333struct mlx5_ifc_create_tir_out_bits {
6334 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336
6337 u8 syndrome[0x20];
6338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340 u8 tirn[0x18];
6341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343};
6344
6345struct mlx5_ifc_create_tir_in_bits {
6346 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350 u8 op_mod[0x10];
6351
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
6354 struct mlx5_ifc_tirc_bits ctx;
6355};
6356
6357struct mlx5_ifc_create_srq_out_bits {
6358 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360
6361 u8 syndrome[0x20];
6362
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364 u8 srqn[0x18];
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367};
6368
6369struct mlx5_ifc_create_srq_in_bits {
6370 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374 u8 op_mod[0x10];
6375
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
6378 struct mlx5_ifc_srqc_bits srq_context_entry;
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
6382 u8 pas[0][0x40];
6383};
6384
6385struct mlx5_ifc_create_sq_out_bits {
6386 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388
6389 u8 syndrome[0x20];
6390
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392 u8 sqn[0x18];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395};
6396
6397struct mlx5_ifc_create_sq_in_bits {
6398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402 u8 op_mod[0x10];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405
6406 struct mlx5_ifc_sqc_bits ctx;
6407};
6408
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006409struct mlx5_ifc_create_scheduling_element_out_bits {
6410 u8 status[0x8];
6411 u8 reserved_at_8[0x18];
6412
6413 u8 syndrome[0x20];
6414
6415 u8 reserved_at_40[0x40];
6416
6417 u8 scheduling_element_id[0x20];
6418
6419 u8 reserved_at_a0[0x160];
6420};
6421
6422struct mlx5_ifc_create_scheduling_element_in_bits {
6423 u8 opcode[0x10];
6424 u8 reserved_at_10[0x10];
6425
6426 u8 reserved_at_20[0x10];
6427 u8 op_mod[0x10];
6428
6429 u8 scheduling_hierarchy[0x8];
6430 u8 reserved_at_48[0x18];
6431
6432 u8 reserved_at_60[0xa0];
6433
6434 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6435
6436 u8 reserved_at_300[0x100];
6437};
6438
Saeed Mahameede2816822015-05-28 22:28:40 +03006439struct mlx5_ifc_create_rqt_out_bits {
6440 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006441 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006442
6443 u8 syndrome[0x20];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446 u8 rqtn[0x18];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449};
6450
6451struct mlx5_ifc_create_rqt_in_bits {
6452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456 u8 op_mod[0x10];
6457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459
6460 struct mlx5_ifc_rqtc_bits rqt_context;
6461};
6462
6463struct mlx5_ifc_create_rq_out_bits {
6464 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466
6467 u8 syndrome[0x20];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470 u8 rqn[0x18];
6471
Matan Barakb4ff3a32016-02-09 14:57:42 +02006472 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006473};
6474
6475struct mlx5_ifc_create_rq_in_bits {
6476 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480 u8 op_mod[0x10];
6481
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
6484 struct mlx5_ifc_rqc_bits ctx;
6485};
6486
6487struct mlx5_ifc_create_rmp_out_bits {
6488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490
6491 u8 syndrome[0x20];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494 u8 rmpn[0x18];
6495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497};
6498
6499struct mlx5_ifc_create_rmp_in_bits {
6500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504 u8 op_mod[0x10];
6505
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
6508 struct mlx5_ifc_rmpc_bits ctx;
6509};
6510
6511struct mlx5_ifc_create_qp_out_bits {
6512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514
6515 u8 syndrome[0x20];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518 u8 qpn[0x18];
6519
Matan Barakb4ff3a32016-02-09 14:57:42 +02006520 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006521};
6522
6523struct mlx5_ifc_create_qp_in_bits {
6524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528 u8 op_mod[0x10];
6529
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531
6532 u8 opt_param_mask[0x20];
6533
Matan Barakb4ff3a32016-02-09 14:57:42 +02006534 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006535
6536 struct mlx5_ifc_qpc_bits qpc;
6537
Matan Barakb4ff3a32016-02-09 14:57:42 +02006538 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006539
6540 u8 pas[0][0x40];
6541};
6542
6543struct mlx5_ifc_create_psv_out_bits {
6544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
6547 u8 syndrome[0x20];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552 u8 psv0_index[0x18];
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555 u8 psv1_index[0x18];
6556
Matan Barakb4ff3a32016-02-09 14:57:42 +02006557 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006558 u8 psv2_index[0x18];
6559
Matan Barakb4ff3a32016-02-09 14:57:42 +02006560 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006561 u8 psv3_index[0x18];
6562};
6563
6564struct mlx5_ifc_create_psv_in_bits {
6565 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569 u8 op_mod[0x10];
6570
6571 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573 u8 pd[0x18];
6574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576};
6577
6578struct mlx5_ifc_create_mkey_out_bits {
6579 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 u8 syndrome[0x20];
6583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585 u8 mkey_index[0x18];
6586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588};
6589
6590struct mlx5_ifc_create_mkey_in_bits {
6591 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595 u8 op_mod[0x10];
6596
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598
6599 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601
6602 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
6606 u8 translations_octword_actual_size[0x20];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
6610 u8 klm_pas_mtt[0][0x20];
6611};
6612
6613struct mlx5_ifc_create_flow_table_out_bits {
6614 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616
6617 u8 syndrome[0x20];
6618
Matan Barakb4ff3a32016-02-09 14:57:42 +02006619 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006620 u8 table_id[0x18];
6621
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623};
6624
6625struct mlx5_ifc_create_flow_table_in_bits {
6626 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630 u8 op_mod[0x10];
6631
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006632 u8 other_vport[0x1];
6633 u8 reserved_at_41[0xf];
6634 u8 vport_number[0x10];
6635
6636 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637
6638 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03006643 u8 encap_en[0x1];
6644 u8 decap_en[0x1];
6645 u8 reserved_at_c2[0x2];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006646 u8 table_miss_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649 u8 log_size[0x8];
6650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006652 u8 table_miss_id[0x18];
6653
Aviv Heller84df61e2016-05-10 13:47:50 +03006654 u8 reserved_at_100[0x8];
6655 u8 lag_master_next_table_id[0x18];
6656
6657 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658};
6659
6660struct mlx5_ifc_create_flow_group_out_bits {
6661 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
6664 u8 syndrome[0x20];
6665
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667 u8 group_id[0x18];
6668
Matan Barakb4ff3a32016-02-09 14:57:42 +02006669 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006670};
6671
6672enum {
6673 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6674 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6675 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6676};
6677
6678struct mlx5_ifc_create_flow_group_in_bits {
6679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 op_mod[0x10];
6684
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006685 u8 other_vport[0x1];
6686 u8 reserved_at_41[0xf];
6687 u8 vport_number[0x10];
6688
6689 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690
6691 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693
Matan Barakb4ff3a32016-02-09 14:57:42 +02006694 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006695 u8 table_id[0x18];
6696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698
6699 u8 start_flow_index[0x20];
6700
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702
6703 u8 end_flow_index[0x20];
6704
Matan Barakb4ff3a32016-02-09 14:57:42 +02006705 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708 u8 match_criteria_enable[0x8];
6709
6710 struct mlx5_ifc_fte_match_param_bits match_criteria;
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713};
6714
6715struct mlx5_ifc_create_eq_out_bits {
6716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718
6719 u8 syndrome[0x20];
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722 u8 eq_number[0x8];
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725};
6726
6727struct mlx5_ifc_create_eq_in_bits {
6728 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732 u8 op_mod[0x10];
6733
Matan Barakb4ff3a32016-02-09 14:57:42 +02006734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006735
6736 struct mlx5_ifc_eqc_bits eq_context_entry;
6737
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
6740 u8 event_bitmask[0x40];
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743
6744 u8 pas[0][0x40];
6745};
6746
6747struct mlx5_ifc_create_dct_out_bits {
6748 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750
6751 u8 syndrome[0x20];
6752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754 u8 dctn[0x18];
6755
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757};
6758
6759struct mlx5_ifc_create_dct_in_bits {
6760 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764 u8 op_mod[0x10];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767
6768 struct mlx5_ifc_dctc_bits dct_context_entry;
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771};
6772
6773struct mlx5_ifc_create_cq_out_bits {
6774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
6777 u8 syndrome[0x20];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780 u8 cqn[0x18];
6781
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783};
6784
6785struct mlx5_ifc_create_cq_in_bits {
6786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790 u8 op_mod[0x10];
6791
Matan Barakb4ff3a32016-02-09 14:57:42 +02006792 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006793
6794 struct mlx5_ifc_cqc_bits cq_context;
6795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 u8 pas[0][0x40];
6799};
6800
6801struct mlx5_ifc_config_int_moderation_out_bits {
6802 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 u8 syndrome[0x20];
6806
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808 u8 min_delay[0xc];
6809 u8 int_vector[0x10];
6810
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812};
6813
6814enum {
6815 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6816 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6817};
6818
6819struct mlx5_ifc_config_int_moderation_in_bits {
6820 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824 u8 op_mod[0x10];
6825
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827 u8 min_delay[0xc];
6828 u8 int_vector[0x10];
6829
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831};
6832
6833struct mlx5_ifc_attach_to_mcg_out_bits {
6834 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836
6837 u8 syndrome[0x20];
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842struct mlx5_ifc_attach_to_mcg_in_bits {
6843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847 u8 op_mod[0x10];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850 u8 qpn[0x18];
6851
Matan Barakb4ff3a32016-02-09 14:57:42 +02006852 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006853
6854 u8 multicast_gid[16][0x8];
6855};
6856
Saeed Mahameed74862162016-06-09 15:11:34 +03006857struct mlx5_ifc_arm_xrq_out_bits {
6858 u8 status[0x8];
6859 u8 reserved_at_8[0x18];
6860
6861 u8 syndrome[0x20];
6862
6863 u8 reserved_at_40[0x40];
6864};
6865
6866struct mlx5_ifc_arm_xrq_in_bits {
6867 u8 opcode[0x10];
6868 u8 reserved_at_10[0x10];
6869
6870 u8 reserved_at_20[0x10];
6871 u8 op_mod[0x10];
6872
6873 u8 reserved_at_40[0x8];
6874 u8 xrqn[0x18];
6875
6876 u8 reserved_at_60[0x10];
6877 u8 lwm[0x10];
6878};
6879
Saeed Mahameede2816822015-05-28 22:28:40 +03006880struct mlx5_ifc_arm_xrc_srq_out_bits {
6881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883
6884 u8 syndrome[0x20];
6885
Matan Barakb4ff3a32016-02-09 14:57:42 +02006886 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006887};
6888
6889enum {
6890 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6891};
6892
6893struct mlx5_ifc_arm_xrc_srq_in_bits {
6894 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898 u8 op_mod[0x10];
6899
Matan Barakb4ff3a32016-02-09 14:57:42 +02006900 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006901 u8 xrc_srqn[0x18];
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904 u8 lwm[0x10];
6905};
6906
6907struct mlx5_ifc_arm_rq_out_bits {
6908 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
6911 u8 syndrome[0x20];
6912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914};
6915
6916enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006917 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6918 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006919};
6920
6921struct mlx5_ifc_arm_rq_in_bits {
6922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926 u8 op_mod[0x10];
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929 u8 srq_number[0x18];
6930
Matan Barakb4ff3a32016-02-09 14:57:42 +02006931 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006932 u8 lwm[0x10];
6933};
6934
6935struct mlx5_ifc_arm_dct_out_bits {
6936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
6939 u8 syndrome[0x20];
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942};
6943
6944struct mlx5_ifc_arm_dct_in_bits {
6945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949 u8 op_mod[0x10];
6950
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952 u8 dct_number[0x18];
6953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955};
6956
6957struct mlx5_ifc_alloc_xrcd_out_bits {
6958 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960
6961 u8 syndrome[0x20];
6962
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964 u8 xrcd[0x18];
6965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967};
6968
6969struct mlx5_ifc_alloc_xrcd_in_bits {
6970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974 u8 op_mod[0x10];
6975
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977};
6978
6979struct mlx5_ifc_alloc_uar_out_bits {
6980 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982
6983 u8 syndrome[0x20];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986 u8 uar[0x18];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989};
6990
6991struct mlx5_ifc_alloc_uar_in_bits {
6992 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996 u8 op_mod[0x10];
6997
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999};
7000
7001struct mlx5_ifc_alloc_transport_domain_out_bits {
7002 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004
7005 u8 syndrome[0x20];
7006
Matan Barakb4ff3a32016-02-09 14:57:42 +02007007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007008 u8 transport_domain[0x18];
7009
Matan Barakb4ff3a32016-02-09 14:57:42 +02007010 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007011};
7012
7013struct mlx5_ifc_alloc_transport_domain_in_bits {
7014 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018 u8 op_mod[0x10];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021};
7022
7023struct mlx5_ifc_alloc_q_counter_out_bits {
7024 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026
7027 u8 syndrome[0x20];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 counter_set_id[0x8];
7031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033};
7034
7035struct mlx5_ifc_alloc_q_counter_in_bits {
7036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007038
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040 u8 op_mod[0x10];
7041
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043};
7044
7045struct mlx5_ifc_alloc_pd_out_bits {
7046 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048
7049 u8 syndrome[0x20];
7050
Matan Barakb4ff3a32016-02-09 14:57:42 +02007051 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007052 u8 pd[0x18];
7053
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055};
7056
7057struct mlx5_ifc_alloc_pd_in_bits {
7058 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062 u8 op_mod[0x10];
7063
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065};
7066
Amir Vadai9dc0b282016-05-13 12:55:39 +00007067struct mlx5_ifc_alloc_flow_counter_out_bits {
7068 u8 status[0x8];
7069 u8 reserved_at_8[0x18];
7070
7071 u8 syndrome[0x20];
7072
7073 u8 reserved_at_40[0x10];
7074 u8 flow_counter_id[0x10];
7075
7076 u8 reserved_at_60[0x20];
7077};
7078
7079struct mlx5_ifc_alloc_flow_counter_in_bits {
7080 u8 opcode[0x10];
7081 u8 reserved_at_10[0x10];
7082
7083 u8 reserved_at_20[0x10];
7084 u8 op_mod[0x10];
7085
7086 u8 reserved_at_40[0x40];
7087};
7088
Saeed Mahameede2816822015-05-28 22:28:40 +03007089struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7090 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092
7093 u8 syndrome[0x20];
7094
Matan Barakb4ff3a32016-02-09 14:57:42 +02007095 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007096};
7097
7098struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7099 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101
Matan Barakb4ff3a32016-02-09 14:57:42 +02007102 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007103 u8 op_mod[0x10];
7104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108 u8 vxlan_udp_port[0x10];
7109};
7110
Saeed Mahameed74862162016-06-09 15:11:34 +03007111struct mlx5_ifc_set_rate_limit_out_bits {
7112 u8 status[0x8];
7113 u8 reserved_at_8[0x18];
7114
7115 u8 syndrome[0x20];
7116
7117 u8 reserved_at_40[0x40];
7118};
7119
7120struct mlx5_ifc_set_rate_limit_in_bits {
7121 u8 opcode[0x10];
7122 u8 reserved_at_10[0x10];
7123
7124 u8 reserved_at_20[0x10];
7125 u8 op_mod[0x10];
7126
7127 u8 reserved_at_40[0x10];
7128 u8 rate_limit_index[0x10];
7129
7130 u8 reserved_at_60[0x20];
7131
7132 u8 rate_limit[0x20];
7133};
7134
Saeed Mahameede2816822015-05-28 22:28:40 +03007135struct mlx5_ifc_access_register_out_bits {
7136 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007137 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007138
7139 u8 syndrome[0x20];
7140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142
7143 u8 register_data[0][0x20];
7144};
7145
7146enum {
7147 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7148 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7149};
7150
7151struct mlx5_ifc_access_register_in_bits {
7152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154
Matan Barakb4ff3a32016-02-09 14:57:42 +02007155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007156 u8 op_mod[0x10];
7157
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159 u8 register_id[0x10];
7160
7161 u8 argument[0x20];
7162
7163 u8 register_data[0][0x20];
7164};
7165
7166struct mlx5_ifc_sltp_reg_bits {
7167 u8 status[0x4];
7168 u8 version[0x4];
7169 u8 local_port[0x8];
7170 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007173 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007174
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176
Matan Barakb4ff3a32016-02-09 14:57:42 +02007177 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007178 u8 polarity[0x1];
7179 u8 ob_tap0[0x8];
7180 u8 ob_tap1[0x8];
7181 u8 ob_tap2[0x8];
7182
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184 u8 ob_preemp_mode[0x4];
7185 u8 ob_reg[0x8];
7186 u8 ob_bias[0x8];
7187
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189};
7190
7191struct mlx5_ifc_slrg_reg_bits {
7192 u8 status[0x4];
7193 u8 version[0x4];
7194 u8 local_port[0x8];
7195 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
7200 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202 u8 grade_lane_speed[0x4];
7203
7204 u8 grade_version[0x8];
7205 u8 grade[0x18];
7206
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208 u8 height_grade_type[0x4];
7209 u8 height_grade[0x18];
7210
7211 u8 height_dz[0x10];
7212 u8 height_dv[0x10];
7213
Matan Barakb4ff3a32016-02-09 14:57:42 +02007214 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007215 u8 height_sigma[0x10];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218
Matan Barakb4ff3a32016-02-09 14:57:42 +02007219 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007220 u8 phase_grade_type[0x4];
7221 u8 phase_grade[0x18];
7222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226 u8 phase_eo_neg[0x8];
7227
7228 u8 ffe_set_tested[0x10];
7229 u8 test_errors_per_lane[0x10];
7230};
7231
7232struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238 u8 vl_hw_cap[0x4];
7239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241 u8 vl_admin[0x4];
7242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244 u8 vl_operational[0x4];
7245};
7246
7247struct mlx5_ifc_pude_reg_bits {
7248 u8 swid[0x8];
7249 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 oper_status[0x4];
7254
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256};
7257
7258struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007259 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007260 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007261 u8 an_disable_cap[0x1];
7262 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 proto_mask[0x3];
7266
Saeed Mahameed74862162016-06-09 15:11:34 +03007267 u8 an_status[0x4];
7268 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007269
7270 u8 eth_proto_capability[0x20];
7271
7272 u8 ib_link_width_capability[0x10];
7273 u8 ib_proto_capability[0x10];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276
7277 u8 eth_proto_admin[0x20];
7278
7279 u8 ib_link_width_admin[0x10];
7280 u8 ib_proto_admin[0x10];
7281
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
7284 u8 eth_proto_oper[0x20];
7285
7286 u8 ib_link_width_oper[0x10];
7287 u8 ib_proto_oper[0x10];
7288
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290
7291 u8 eth_proto_lp_advertise[0x20];
7292
Matan Barakb4ff3a32016-02-09 14:57:42 +02007293 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007294};
7295
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007296struct mlx5_ifc_mlcr_reg_bits {
7297 u8 reserved_at_0[0x8];
7298 u8 local_port[0x8];
7299 u8 reserved_at_10[0x20];
7300
7301 u8 beacon_duration[0x10];
7302 u8 reserved_at_40[0x10];
7303
7304 u8 beacon_remain[0x10];
7305};
7306
Saeed Mahameede2816822015-05-28 22:28:40 +03007307struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309
7310 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007311 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007312 u8 repetitions_mode[0x4];
7313 u8 num_of_repetitions[0x8];
7314
7315 u8 grade_version[0x8];
7316 u8 height_grade_type[0x4];
7317 u8 phase_grade_type[0x4];
7318 u8 height_grade_weight[0x8];
7319 u8 phase_grade_weight[0x8];
7320
7321 u8 gisim_measure_bits[0x10];
7322 u8 adaptive_tap_measure_bits[0x10];
7323
7324 u8 ber_bath_high_error_threshold[0x10];
7325 u8 ber_bath_mid_error_threshold[0x10];
7326
7327 u8 ber_bath_low_error_threshold[0x10];
7328 u8 one_ratio_high_threshold[0x10];
7329
7330 u8 one_ratio_high_mid_threshold[0x10];
7331 u8 one_ratio_low_mid_threshold[0x10];
7332
7333 u8 one_ratio_low_threshold[0x10];
7334 u8 ndeo_error_threshold[0x10];
7335
7336 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338 u8 mix90_phase_for_voltage_bath[0x8];
7339
7340 u8 mixer_offset_start[0x10];
7341 u8 mixer_offset_end[0x10];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344 u8 ber_test_time[0xb];
7345};
7346
7347struct mlx5_ifc_pspa_reg_bits {
7348 u8 swid[0x8];
7349 u8 local_port[0x8];
7350 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354};
7355
7356struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362 u8 mode[0x2];
7363
Matan Barakb4ff3a32016-02-09 14:57:42 +02007364 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007365
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367 u8 min_threshold[0x10];
7368
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 max_threshold[0x10];
7371
Matan Barakb4ff3a32016-02-09 14:57:42 +02007372 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007373 u8 mark_probability_denominator[0x10];
7374
Matan Barakb4ff3a32016-02-09 14:57:42 +02007375 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007376};
7377
7378struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 wrps_admin[0x4];
7387
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389 u8 wrps_status[0x4];
7390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394 u8 down_threshold[0x8];
7395
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 srps_admin[0x4];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402 u8 srps_status[0x4];
7403
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405};
7406
7407struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415 u8 lb_en[0x8];
7416};
7417
7418struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424
7425 u8 port_profile_mode[0x8];
7426 u8 static_port_profile[0x8];
7427 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429
7430 u8 retransmission_active[0x8];
7431 u8 fec_mode_active[0x18];
7432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434};
7435
7436struct mlx5_ifc_ppcnt_reg_bits {
7437 u8 swid[0x8];
7438 u8 local_port[0x8];
7439 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441 u8 grp[0x6];
7442
7443 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 prio_tc[0x3];
7446
7447 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7448};
7449
Gal Pressman8ed1a632016-11-17 13:46:01 +02007450struct mlx5_ifc_mpcnt_reg_bits {
7451 u8 reserved_at_0[0x8];
7452 u8 pcie_index[0x8];
7453 u8 reserved_at_10[0xa];
7454 u8 grp[0x6];
7455
7456 u8 clr[0x1];
7457 u8 reserved_at_21[0x1f];
7458
7459 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7460};
7461
Saeed Mahameede2816822015-05-28 22:28:40 +03007462struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007463 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007464 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466 u8 local_port[0x8];
7467 u8 mac_47_32[0x10];
7468
7469 u8 mac_31_0[0x20];
7470
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472};
7473
7474struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007475 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007476 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007478
7479 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481
7482 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007483 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007484
7485 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487};
7488
7489struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493
Matan Barakb4ff3a32016-02-09 14:57:42 +02007494 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495 u8 attenuation_5g[0x8];
7496
Matan Barakb4ff3a32016-02-09 14:57:42 +02007497 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007498 u8 attenuation_7g[0x8];
7499
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 attenuation_12g[0x8];
7502};
7503
7504struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 module_status[0x4];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
7513struct mlx5_ifc_pmpc_reg_bits {
7514 u8 module_state_updated[32][0x8];
7515};
7516
7517struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 mlpn_status[0x4];
7520 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522
7523 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525};
7526
7527struct mlx5_ifc_pmlp_reg_bits {
7528 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532 u8 width[0x8];
7533
7534 u8 lane0_module_mapping[0x20];
7535
7536 u8 lane1_module_mapping[0x20];
7537
7538 u8 lane2_module_mapping[0x20];
7539
7540 u8 lane3_module_mapping[0x20];
7541
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543};
7544
7545struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551 u8 oper_status[0x4];
7552
7553 u8 ase[0x1];
7554 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 e[0x2];
7557
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559};
7560
7561struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569 u8 lane_speed[0x10];
7570
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 lpbf[0x1];
7573 u8 fec_mode_policy[0x8];
7574
7575 u8 retransmission_capability[0x8];
7576 u8 fec_mode_capability[0x18];
7577
7578 u8 retransmission_support_admin[0x8];
7579 u8 fec_mode_support_admin[0x18];
7580
7581 u8 retransmission_request_admin[0x8];
7582 u8 fec_mode_request_admin[0x18];
7583
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585};
7586
7587struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 ib_port[0x8];
7592
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594};
7595
7596struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600 u8 lbf_mode[0x3];
7601
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603};
7604
7605struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609
7610 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614};
7615
7616struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622
7623 u8 port_filter[8][0x20];
7624
7625 u8 port_filter_update_en[8][0x20];
7626};
7627
7628struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632
7633 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 prio_mask_rx[0x8];
7638
7639 u8 pptx[0x1];
7640 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644
7645 u8 pprx[0x1];
7646 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652};
7653
7654struct mlx5_ifc_pelc_reg_bits {
7655 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659
7660 u8 op_admin[0x8];
7661 u8 op_capability[0x8];
7662 u8 op_request[0x8];
7663 u8 op_active[0x8];
7664
7665 u8 admin[0x40];
7666
7667 u8 capability[0x40];
7668
7669 u8 request[0x40];
7670
7671 u8 active[0x40];
7672
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674};
7675
7676struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 error_type[0x8];
7689};
7690
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007691struct mlx5_ifc_pcam_enhanced_features_bits {
7692 u8 reserved_at_0[0x7e];
7693
7694 u8 ppcnt_discard_group[0x1];
7695 u8 ppcnt_statistical_group[0x1];
7696};
7697
7698struct mlx5_ifc_pcam_reg_bits {
7699 u8 reserved_at_0[0x8];
7700 u8 feature_group[0x8];
7701 u8 reserved_at_10[0x8];
7702 u8 access_reg_group[0x8];
7703
7704 u8 reserved_at_20[0x20];
7705
7706 union {
7707 u8 reserved_at_0[0x80];
7708 } port_access_reg_cap_mask;
7709
7710 u8 reserved_at_c0[0x80];
7711
7712 union {
7713 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7714 u8 reserved_at_0[0x80];
7715 } feature_cap_mask;
7716
7717 u8 reserved_at_1c0[0xc0];
7718};
7719
7720struct mlx5_ifc_mcam_enhanced_features_bits {
7721 u8 reserved_at_0[0x7f];
7722
7723 u8 pcie_performance_group[0x1];
7724};
7725
7726struct mlx5_ifc_mcam_reg_bits {
7727 u8 reserved_at_0[0x8];
7728 u8 feature_group[0x8];
7729 u8 reserved_at_10[0x8];
7730 u8 access_reg_group[0x8];
7731
7732 u8 reserved_at_20[0x20];
7733
7734 union {
7735 u8 reserved_at_0[0x80];
7736 } mng_access_reg_cap_mask;
7737
7738 u8 reserved_at_c0[0x80];
7739
7740 union {
7741 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7742 u8 reserved_at_0[0x80];
7743 } mng_feature_cap_mask;
7744
7745 u8 reserved_at_1c0[0x80];
7746};
7747
Saeed Mahameede2816822015-05-28 22:28:40 +03007748struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752
7753 u8 port_capability_mask[4][0x20];
7754};
7755
7756struct mlx5_ifc_paos_reg_bits {
7757 u8 swid[0x8];
7758 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 oper_status[0x4];
7763
7764 u8 ase[0x1];
7765 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767 u8 e[0x2];
7768
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770};
7771
7772struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776 u8 opamp_group_type[0x4];
7777
7778 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780 u8 num_of_indices[0xc];
7781
7782 u8 index_data[18][0x10];
7783};
7784
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007785struct mlx5_ifc_pcmr_reg_bits {
7786 u8 reserved_at_0[0x8];
7787 u8 local_port[0x8];
7788 u8 reserved_at_10[0x2e];
7789 u8 fcs_cap[0x1];
7790 u8 reserved_at_3f[0x1f];
7791 u8 fcs_chk[0x1];
7792 u8 reserved_at_5f[0x1];
7793};
7794
Saeed Mahameede2816822015-05-28 22:28:40 +03007795struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801 u8 module[0x8];
7802};
7803
7804struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806 u8 lossy[0x1];
7807 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 size[0xc];
7810
7811 u8 xoff_threshold[0x10];
7812 u8 xon_threshold[0x10];
7813};
7814
7815struct mlx5_ifc_set_node_in_bits {
7816 u8 node_description[64][0x8];
7817};
7818
7819struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 power_settings_level[0x8];
7822
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824};
7825
7826struct mlx5_ifc_register_host_endianness_bits {
7827 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007828 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007829
Matan Barakb4ff3a32016-02-09 14:57:42 +02007830 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007831};
7832
7833struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835
7836 u8 mkey[0x20];
7837
7838 u8 addressh_63_32[0x20];
7839
7840 u8 addressl_31_0[0x20];
7841};
7842
7843struct mlx5_ifc_ud_adrs_vector_bits {
7844 u8 dc_key[0x40];
7845
7846 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007847 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007848 u8 destination_qp_dct[0x18];
7849
7850 u8 static_rate[0x4];
7851 u8 sl_eth_prio[0x4];
7852 u8 fl[0x1];
7853 u8 mlid[0x7];
7854 u8 rlid_udp_sport[0x10];
7855
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857
7858 u8 rmac_47_16[0x20];
7859
7860 u8 rmac_15_0[0x10];
7861 u8 tclass[0x8];
7862 u8 hop_limit[0x8];
7863
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867 u8 src_addr_index[0x8];
7868 u8 flow_label[0x14];
7869
7870 u8 rgid_rip[16][0x8];
7871};
7872
7873struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875 u8 function_id[0x10];
7876
7877 u8 num_pages[0x20];
7878
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880};
7881
7882struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007883 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007884 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007885 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007886 u8 event_sub_type[0x8];
7887
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889
7890 union mlx5_ifc_event_auto_bits event_data;
7891
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895 u8 owner[0x1];
7896};
7897
7898enum {
7899 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7900};
7901
7902struct mlx5_ifc_cmd_queue_entry_bits {
7903 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905
7906 u8 input_length[0x20];
7907
7908 u8 input_mailbox_pointer_63_32[0x20];
7909
7910 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912
7913 u8 command_input_inline_data[16][0x8];
7914
7915 u8 command_output_inline_data[16][0x8];
7916
7917 u8 output_mailbox_pointer_63_32[0x20];
7918
7919 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007920 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007921
7922 u8 output_length[0x20];
7923
7924 u8 token[0x8];
7925 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007926 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007927 u8 status[0x7];
7928 u8 ownership[0x1];
7929};
7930
7931struct mlx5_ifc_cmd_out_bits {
7932 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007933 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007934
7935 u8 syndrome[0x20];
7936
7937 u8 command_output[0x20];
7938};
7939
7940struct mlx5_ifc_cmd_in_bits {
7941 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945 u8 op_mod[0x10];
7946
7947 u8 command[0][0x20];
7948};
7949
7950struct mlx5_ifc_cmd_if_box_bits {
7951 u8 mailbox_data[512][0x8];
7952
Matan Barakb4ff3a32016-02-09 14:57:42 +02007953 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007954
7955 u8 next_pointer_63_32[0x20];
7956
7957 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959
7960 u8 block_number[0x20];
7961
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963 u8 token[0x8];
7964 u8 ctrl_signature[0x8];
7965 u8 signature[0x8];
7966};
7967
7968struct mlx5_ifc_mtt_bits {
7969 u8 ptag_63_32[0x20];
7970
7971 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007972 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007973 u8 wr_en[0x1];
7974 u8 rd_en[0x1];
7975};
7976
Tariq Toukan928cfe82016-02-22 18:17:29 +02007977struct mlx5_ifc_query_wol_rol_out_bits {
7978 u8 status[0x8];
7979 u8 reserved_at_8[0x18];
7980
7981 u8 syndrome[0x20];
7982
7983 u8 reserved_at_40[0x10];
7984 u8 rol_mode[0x8];
7985 u8 wol_mode[0x8];
7986
7987 u8 reserved_at_60[0x20];
7988};
7989
7990struct mlx5_ifc_query_wol_rol_in_bits {
7991 u8 opcode[0x10];
7992 u8 reserved_at_10[0x10];
7993
7994 u8 reserved_at_20[0x10];
7995 u8 op_mod[0x10];
7996
7997 u8 reserved_at_40[0x40];
7998};
7999
8000struct mlx5_ifc_set_wol_rol_out_bits {
8001 u8 status[0x8];
8002 u8 reserved_at_8[0x18];
8003
8004 u8 syndrome[0x20];
8005
8006 u8 reserved_at_40[0x40];
8007};
8008
8009struct mlx5_ifc_set_wol_rol_in_bits {
8010 u8 opcode[0x10];
8011 u8 reserved_at_10[0x10];
8012
8013 u8 reserved_at_20[0x10];
8014 u8 op_mod[0x10];
8015
8016 u8 rol_mode_valid[0x1];
8017 u8 wol_mode_valid[0x1];
8018 u8 reserved_at_42[0xe];
8019 u8 rol_mode[0x8];
8020 u8 wol_mode[0x8];
8021
8022 u8 reserved_at_60[0x20];
8023};
8024
Saeed Mahameede2816822015-05-28 22:28:40 +03008025enum {
8026 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8027 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8028 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8029};
8030
8031enum {
8032 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8033 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8034 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8035};
8036
8037enum {
8038 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8039 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8040 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8041 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8042 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8043 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8044 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8045 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8046 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8047 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8048 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8049};
8050
8051struct mlx5_ifc_initial_seg_bits {
8052 u8 fw_rev_minor[0x10];
8053 u8 fw_rev_major[0x10];
8054
8055 u8 cmd_interface_rev[0x10];
8056 u8 fw_rev_subminor[0x10];
8057
Matan Barakb4ff3a32016-02-09 14:57:42 +02008058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008059
8060 u8 cmdq_phy_addr_63_32[0x20];
8061
8062 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008063 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008064 u8 nic_interface[0x2];
8065 u8 log_cmdq_size[0x4];
8066 u8 log_cmdq_stride[0x4];
8067
8068 u8 command_doorbell_vector[0x20];
8069
Matan Barakb4ff3a32016-02-09 14:57:42 +02008070 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008071
8072 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008073 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008074 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076
8077 struct mlx5_ifc_health_buffer_bits health_buffer;
8078
8079 u8 no_dram_nic_offset[0x20];
8080
Matan Barakb4ff3a32016-02-09 14:57:42 +02008081 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008082
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084 u8 clear_int[0x1];
8085
8086 u8 health_syndrome[0x8];
8087 u8 health_counter[0x18];
8088
Matan Barakb4ff3a32016-02-09 14:57:42 +02008089 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008090};
8091
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008092struct mlx5_ifc_mtpps_reg_bits {
8093 u8 reserved_at_0[0xc];
8094 u8 cap_number_of_pps_pins[0x4];
8095 u8 reserved_at_10[0x4];
8096 u8 cap_max_num_of_pps_in_pins[0x4];
8097 u8 reserved_at_18[0x4];
8098 u8 cap_max_num_of_pps_out_pins[0x4];
8099
8100 u8 reserved_at_20[0x24];
8101 u8 cap_pin_3_mode[0x4];
8102 u8 reserved_at_48[0x4];
8103 u8 cap_pin_2_mode[0x4];
8104 u8 reserved_at_50[0x4];
8105 u8 cap_pin_1_mode[0x4];
8106 u8 reserved_at_58[0x4];
8107 u8 cap_pin_0_mode[0x4];
8108
8109 u8 reserved_at_60[0x4];
8110 u8 cap_pin_7_mode[0x4];
8111 u8 reserved_at_68[0x4];
8112 u8 cap_pin_6_mode[0x4];
8113 u8 reserved_at_70[0x4];
8114 u8 cap_pin_5_mode[0x4];
8115 u8 reserved_at_78[0x4];
8116 u8 cap_pin_4_mode[0x4];
8117
8118 u8 reserved_at_80[0x80];
8119
8120 u8 enable[0x1];
8121 u8 reserved_at_101[0xb];
8122 u8 pattern[0x4];
8123 u8 reserved_at_110[0x4];
8124 u8 pin_mode[0x4];
8125 u8 pin[0x8];
8126
8127 u8 reserved_at_120[0x20];
8128
8129 u8 time_stamp[0x40];
8130
8131 u8 out_pulse_duration[0x10];
8132 u8 out_periodic_adjustment[0x10];
8133
8134 u8 reserved_at_1a0[0x60];
8135};
8136
8137struct mlx5_ifc_mtppse_reg_bits {
8138 u8 reserved_at_0[0x18];
8139 u8 pin[0x8];
8140 u8 event_arm[0x1];
8141 u8 reserved_at_21[0x1b];
8142 u8 event_generation_mode[0x4];
8143 u8 reserved_at_40[0x40];
8144};
8145
Saeed Mahameede2816822015-05-28 22:28:40 +03008146union mlx5_ifc_ports_control_registers_document_bits {
8147 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8148 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8149 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8150 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8151 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8152 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8153 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8154 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8155 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8156 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8157 struct mlx5_ifc_paos_reg_bits paos_reg;
8158 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8159 struct mlx5_ifc_peir_reg_bits peir_reg;
8160 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8161 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008162 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008163 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8164 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8165 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8166 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8167 struct mlx5_ifc_plib_reg_bits plib_reg;
8168 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8169 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8170 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8171 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8172 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8173 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8174 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8175 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8176 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8177 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008178 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008179 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8180 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8181 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8182 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8183 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8184 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8185 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008186 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008187 struct mlx5_ifc_pude_reg_bits pude_reg;
8188 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8189 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8190 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008191 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8192 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008193 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008194};
8195
8196union mlx5_ifc_debug_enhancements_document_bits {
8197 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008198 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008199};
8200
8201union mlx5_ifc_uplink_pci_interface_document_bits {
8202 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008204};
8205
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008206struct mlx5_ifc_set_flow_table_root_out_bits {
8207 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008208 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008209
8210 u8 syndrome[0x20];
8211
Matan Barakb4ff3a32016-02-09 14:57:42 +02008212 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008213};
8214
8215struct mlx5_ifc_set_flow_table_root_in_bits {
8216 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008218
Matan Barakb4ff3a32016-02-09 14:57:42 +02008219 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008220 u8 op_mod[0x10];
8221
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008222 u8 other_vport[0x1];
8223 u8 reserved_at_41[0xf];
8224 u8 vport_number[0x10];
8225
8226 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008227
8228 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008229 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008230
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008232 u8 table_id[0x18];
8233
Erez Shitrit500a3d02017-04-13 06:36:51 +03008234 u8 reserved_at_c0[0x8];
8235 u8 underlay_qpn[0x18];
8236 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008237};
8238
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008239enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008240 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8241 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008242};
8243
8244struct mlx5_ifc_modify_flow_table_out_bits {
8245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008246 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008247
8248 u8 syndrome[0x20];
8249
Matan Barakb4ff3a32016-02-09 14:57:42 +02008250 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008251};
8252
8253struct mlx5_ifc_modify_flow_table_in_bits {
8254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008255 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008256
Matan Barakb4ff3a32016-02-09 14:57:42 +02008257 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008258 u8 op_mod[0x10];
8259
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008260 u8 other_vport[0x1];
8261 u8 reserved_at_41[0xf];
8262 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008263
Matan Barakb4ff3a32016-02-09 14:57:42 +02008264 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008265 u8 modify_field_select[0x10];
8266
8267 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008268 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008269
Matan Barakb4ff3a32016-02-09 14:57:42 +02008270 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008271 u8 table_id[0x18];
8272
Matan Barakb4ff3a32016-02-09 14:57:42 +02008273 u8 reserved_at_c0[0x4];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008274 u8 table_miss_mode[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008275 u8 reserved_at_c8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008276
Matan Barakb4ff3a32016-02-09 14:57:42 +02008277 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008278 u8 table_miss_id[0x18];
8279
Aviv Heller84df61e2016-05-10 13:47:50 +03008280 u8 reserved_at_100[0x8];
8281 u8 lag_master_next_table_id[0x18];
8282
8283 u8 reserved_at_120[0x80];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008284};
8285
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008286struct mlx5_ifc_ets_tcn_config_reg_bits {
8287 u8 g[0x1];
8288 u8 b[0x1];
8289 u8 r[0x1];
8290 u8 reserved_at_3[0x9];
8291 u8 group[0x4];
8292 u8 reserved_at_10[0x9];
8293 u8 bw_allocation[0x7];
8294
8295 u8 reserved_at_20[0xc];
8296 u8 max_bw_units[0x4];
8297 u8 reserved_at_30[0x8];
8298 u8 max_bw_value[0x8];
8299};
8300
8301struct mlx5_ifc_ets_global_config_reg_bits {
8302 u8 reserved_at_0[0x2];
8303 u8 r[0x1];
8304 u8 reserved_at_3[0x1d];
8305
8306 u8 reserved_at_20[0xc];
8307 u8 max_bw_units[0x4];
8308 u8 reserved_at_30[0x8];
8309 u8 max_bw_value[0x8];
8310};
8311
8312struct mlx5_ifc_qetc_reg_bits {
8313 u8 reserved_at_0[0x8];
8314 u8 port_number[0x8];
8315 u8 reserved_at_10[0x30];
8316
8317 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8318 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8319};
8320
8321struct mlx5_ifc_qtct_reg_bits {
8322 u8 reserved_at_0[0x8];
8323 u8 port_number[0x8];
8324 u8 reserved_at_10[0xd];
8325 u8 prio[0x3];
8326
8327 u8 reserved_at_20[0x1d];
8328 u8 tclass[0x3];
8329};
8330
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008331struct mlx5_ifc_mcia_reg_bits {
8332 u8 l[0x1];
8333 u8 reserved_at_1[0x7];
8334 u8 module[0x8];
8335 u8 reserved_at_10[0x8];
8336 u8 status[0x8];
8337
8338 u8 i2c_device_address[0x8];
8339 u8 page_number[0x8];
8340 u8 device_address[0x10];
8341
8342 u8 reserved_at_40[0x10];
8343 u8 size[0x10];
8344
8345 u8 reserved_at_60[0x20];
8346
8347 u8 dword_0[0x20];
8348 u8 dword_1[0x20];
8349 u8 dword_2[0x20];
8350 u8 dword_3[0x20];
8351 u8 dword_4[0x20];
8352 u8 dword_5[0x20];
8353 u8 dword_6[0x20];
8354 u8 dword_7[0x20];
8355 u8 dword_8[0x20];
8356 u8 dword_9[0x20];
8357 u8 dword_10[0x20];
8358 u8 dword_11[0x20];
8359};
8360
Saeed Mahameed74862162016-06-09 15:11:34 +03008361struct mlx5_ifc_dcbx_param_bits {
8362 u8 dcbx_cee_cap[0x1];
8363 u8 dcbx_ieee_cap[0x1];
8364 u8 dcbx_standby_cap[0x1];
8365 u8 reserved_at_0[0x5];
8366 u8 port_number[0x8];
8367 u8 reserved_at_10[0xa];
8368 u8 max_application_table_size[6];
8369 u8 reserved_at_20[0x15];
8370 u8 version_oper[0x3];
8371 u8 reserved_at_38[5];
8372 u8 version_admin[0x3];
8373 u8 willing_admin[0x1];
8374 u8 reserved_at_41[0x3];
8375 u8 pfc_cap_oper[0x4];
8376 u8 reserved_at_48[0x4];
8377 u8 pfc_cap_admin[0x4];
8378 u8 reserved_at_50[0x4];
8379 u8 num_of_tc_oper[0x4];
8380 u8 reserved_at_58[0x4];
8381 u8 num_of_tc_admin[0x4];
8382 u8 remote_willing[0x1];
8383 u8 reserved_at_61[3];
8384 u8 remote_pfc_cap[4];
8385 u8 reserved_at_68[0x14];
8386 u8 remote_num_of_tc[0x4];
8387 u8 reserved_at_80[0x18];
8388 u8 error[0x8];
8389 u8 reserved_at_a0[0x160];
8390};
Aviv Heller84df61e2016-05-10 13:47:50 +03008391
8392struct mlx5_ifc_lagc_bits {
8393 u8 reserved_at_0[0x1d];
8394 u8 lag_state[0x3];
8395
8396 u8 reserved_at_20[0x14];
8397 u8 tx_remap_affinity_2[0x4];
8398 u8 reserved_at_38[0x4];
8399 u8 tx_remap_affinity_1[0x4];
8400};
8401
8402struct mlx5_ifc_create_lag_out_bits {
8403 u8 status[0x8];
8404 u8 reserved_at_8[0x18];
8405
8406 u8 syndrome[0x20];
8407
8408 u8 reserved_at_40[0x40];
8409};
8410
8411struct mlx5_ifc_create_lag_in_bits {
8412 u8 opcode[0x10];
8413 u8 reserved_at_10[0x10];
8414
8415 u8 reserved_at_20[0x10];
8416 u8 op_mod[0x10];
8417
8418 struct mlx5_ifc_lagc_bits ctx;
8419};
8420
8421struct mlx5_ifc_modify_lag_out_bits {
8422 u8 status[0x8];
8423 u8 reserved_at_8[0x18];
8424
8425 u8 syndrome[0x20];
8426
8427 u8 reserved_at_40[0x40];
8428};
8429
8430struct mlx5_ifc_modify_lag_in_bits {
8431 u8 opcode[0x10];
8432 u8 reserved_at_10[0x10];
8433
8434 u8 reserved_at_20[0x10];
8435 u8 op_mod[0x10];
8436
8437 u8 reserved_at_40[0x20];
8438 u8 field_select[0x20];
8439
8440 struct mlx5_ifc_lagc_bits ctx;
8441};
8442
8443struct mlx5_ifc_query_lag_out_bits {
8444 u8 status[0x8];
8445 u8 reserved_at_8[0x18];
8446
8447 u8 syndrome[0x20];
8448
8449 u8 reserved_at_40[0x40];
8450
8451 struct mlx5_ifc_lagc_bits ctx;
8452};
8453
8454struct mlx5_ifc_query_lag_in_bits {
8455 u8 opcode[0x10];
8456 u8 reserved_at_10[0x10];
8457
8458 u8 reserved_at_20[0x10];
8459 u8 op_mod[0x10];
8460
8461 u8 reserved_at_40[0x40];
8462};
8463
8464struct mlx5_ifc_destroy_lag_out_bits {
8465 u8 status[0x8];
8466 u8 reserved_at_8[0x18];
8467
8468 u8 syndrome[0x20];
8469
8470 u8 reserved_at_40[0x40];
8471};
8472
8473struct mlx5_ifc_destroy_lag_in_bits {
8474 u8 opcode[0x10];
8475 u8 reserved_at_10[0x10];
8476
8477 u8 reserved_at_20[0x10];
8478 u8 op_mod[0x10];
8479
8480 u8 reserved_at_40[0x40];
8481};
8482
8483struct mlx5_ifc_create_vport_lag_out_bits {
8484 u8 status[0x8];
8485 u8 reserved_at_8[0x18];
8486
8487 u8 syndrome[0x20];
8488
8489 u8 reserved_at_40[0x40];
8490};
8491
8492struct mlx5_ifc_create_vport_lag_in_bits {
8493 u8 opcode[0x10];
8494 u8 reserved_at_10[0x10];
8495
8496 u8 reserved_at_20[0x10];
8497 u8 op_mod[0x10];
8498
8499 u8 reserved_at_40[0x40];
8500};
8501
8502struct mlx5_ifc_destroy_vport_lag_out_bits {
8503 u8 status[0x8];
8504 u8 reserved_at_8[0x18];
8505
8506 u8 syndrome[0x20];
8507
8508 u8 reserved_at_40[0x40];
8509};
8510
8511struct mlx5_ifc_destroy_vport_lag_in_bits {
8512 u8 opcode[0x10];
8513 u8 reserved_at_10[0x10];
8514
8515 u8 reserved_at_20[0x10];
8516 u8 op_mod[0x10];
8517
8518 u8 reserved_at_40[0x40];
8519};
8520
Eli Cohend29b7962014-10-02 12:19:43 +03008521#endif /* MLX5_IFC_H */