blob: 46dcc71ce05858204c99abc56a0c9286a9c51f27 [file] [log] [blame]
Mythri P Kc3198a52011-03-12 12:04:27 +05301/*
Archit Tanejaef269582013-09-12 17:45:57 +05302 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
Mythri P Kc3198a52011-03-12 12:04:27 +05303 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Authors: Yong Zhi
5 * Mythri pk <mythripk@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "HDMI"
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/interrupt.h>
27#include <linux/mutex.h>
28#include <linux/delay.h>
29#include <linux/string.h>
Tomi Valkeinen24e62892011-05-23 11:51:18 +030030#include <linux/platform_device.h>
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030031#include <linux/pm_runtime.h>
32#include <linux/clk.h>
Tomi Valkeinencca35012012-04-26 14:48:32 +030033#include <linux/gpio.h>
Tomi Valkeinen17486942012-08-15 15:55:04 +030034#include <linux/regulator/consumer.h>
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030035#include <video/omapdss.h>
Mythri P Kc3198a52011-03-12 12:04:27 +053036
Archit Tanejaef269582013-09-12 17:45:57 +053037#include "hdmi4_core.h"
Mythri P Kc3198a52011-03-12 12:04:27 +053038#include "dss.h"
Ricardo Neriad44cc32011-05-18 22:31:56 -050039#include "dss_features.h"
Mythri P Kc3198a52011-03-12 12:04:27 +053040
41static struct {
42 struct mutex lock;
Mythri P Kc3198a52011-03-12 12:04:27 +053043 struct platform_device *pdev;
Ricardo Neri66a06b02012-11-06 00:19:14 -060044
Archit Taneja275cfa12013-10-08 14:22:03 +053045 struct hdmi_wp_data wp;
46 struct hdmi_pll_data pll;
47 struct hdmi_phy_data phy;
48 struct hdmi_core_data core;
49
50 struct hdmi_config cfg;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030051
Tomi Valkeinen17486942012-08-15 15:55:04 +030052 struct regulator *vdda_hdmi_dac_reg;
Tomi Valkeinencca35012012-04-26 14:48:32 +030053
Tomi Valkeinen0b450c32013-05-24 13:20:17 +030054 bool core_enabled;
55
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +030056 struct omap_dss_device output;
Mythri P Kc3198a52011-03-12 12:04:27 +053057} hdmi;
58
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030059static int hdmi_runtime_get(void)
60{
61 int r;
62
63 DSSDBG("hdmi_runtime_get\n");
64
65 r = pm_runtime_get_sync(&hdmi.pdev->dev);
66 WARN_ON(r < 0);
Archit Tanejaa247ce782012-02-10 11:45:52 +053067 if (r < 0)
Tomi Valkeinen852f0832012-02-17 17:58:04 +020068 return r;
Archit Tanejaa247ce782012-02-10 11:45:52 +053069
70 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030071}
72
73static void hdmi_runtime_put(void)
74{
75 int r;
76
77 DSSDBG("hdmi_runtime_put\n");
78
Tomi Valkeinen0eaf9f52012-01-23 13:23:08 +020079 r = pm_runtime_put_sync(&hdmi.pdev->dev);
Tomi Valkeinen5be3aeb2012-06-27 16:37:18 +030080 WARN_ON(r < 0 && r != -ENOSYS);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +030081}
82
Tomi Valkeinendcf5f722013-10-28 11:47:34 +020083static irqreturn_t hdmi_irq_handler(int irq, void *data)
84{
85 struct hdmi_wp_data *wp = data;
86 u32 irqstatus;
87
88 irqstatus = hdmi_wp_get_irqstatus(wp);
89 hdmi_wp_set_irqstatus(wp, irqstatus);
90
91 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
92 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
93 /*
94 * If we get both connect and disconnect interrupts at the same
95 * time, turn off the PHY, clear interrupts, and restart, which
96 * raises connect interrupt if a cable is connected, or nothing
97 * if cable is not connected.
98 */
99 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
100
101 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
102 HDMI_IRQ_LINK_DISCONNECT);
103
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
105 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
106 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
107 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
108 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
109 }
110
111 return IRQ_HANDLED;
112}
113
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300114static int hdmi_init_regulator(void)
115{
Tomi Valkeinen818a0532013-09-23 18:42:11 +0530116 int r;
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300117 struct regulator *reg;
118
119 if (hdmi.vdda_hdmi_dac_reg != NULL)
120 return 0;
121
Tomi Valkeinen931d4bd2013-06-10 14:05:10 +0300122 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300123
124 if (IS_ERR(reg)) {
Tomi Valkeinen40359a92013-12-19 16:15:34 +0200125 if (PTR_ERR(reg) != -EPROBE_DEFER)
Tomi Valkeinen931d4bd2013-06-10 14:05:10 +0300126 DSSERR("can't get VDDA regulator\n");
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300127 return PTR_ERR(reg);
128 }
129
Tomi Valkeinen818a0532013-09-23 18:42:11 +0530130 if (regulator_can_change_voltage(reg)) {
131 r = regulator_set_voltage(reg, 1800000, 1800000);
132 if (r) {
133 devm_regulator_put(reg);
134 DSSWARN("can't set the regulator voltage\n");
135 return r;
136 }
137 }
138
Tomi Valkeinene25001d2013-05-10 15:20:52 +0300139 hdmi.vdda_hdmi_dac_reg = reg;
140
141 return 0;
142}
143
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300144static int hdmi_power_on_core(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530145{
Mythri P K46095b22012-01-06 17:52:09 +0530146 int r;
Mythri P Kc3198a52011-03-12 12:04:27 +0530147
Tomi Valkeinen17486942012-08-15 15:55:04 +0300148 r = regulator_enable(hdmi.vdda_hdmi_dac_reg);
149 if (r)
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300150 return r;
Tomi Valkeinen17486942012-08-15 15:55:04 +0300151
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300152 r = hdmi_runtime_get();
153 if (r)
Tomi Valkeinencca35012012-04-26 14:48:32 +0300154 goto err_runtime_get;
Mythri P Kc3198a52011-03-12 12:04:27 +0530155
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300156 /* Make selection of HDMI in DSS */
157 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
158
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300159 hdmi.core_enabled = true;
160
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300161 return 0;
162
163err_runtime_get:
164 regulator_disable(hdmi.vdda_hdmi_dac_reg);
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300165
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300166 return r;
167}
168
169static void hdmi_power_off_core(struct omap_dss_device *dssdev)
170{
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300171 hdmi.core_enabled = false;
172
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300173 hdmi_runtime_put();
174 regulator_disable(hdmi.vdda_hdmi_dac_reg);
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300175}
176
177static int hdmi_power_on_full(struct omap_dss_device *dssdev)
178{
179 int r;
180 struct omap_video_timings *p;
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300181 struct omap_overlay_manager *mgr = hdmi.output.manager;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200182 struct hdmi_wp_data *wp = &hdmi.wp;
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300183 struct dss_pll_clock_info hdmi_cinfo = { 0 };
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300184
185 r = hdmi_power_on_core(dssdev);
186 if (r)
187 return r;
188
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200189 /* disable and clear irqs */
190 hdmi_wp_clear_irqenable(wp, 0xffffffff);
191 hdmi_wp_set_irqstatus(wp, 0xffffffff);
192
Archit Taneja275cfa12013-10-08 14:22:03 +0530193 p = &hdmi.cfg.timings;
Mythri P Kc3198a52011-03-12 12:04:27 +0530194
Archit Taneja78493982012-08-08 16:50:42 +0530195 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
Mythri P Kc3198a52011-03-12 12:04:27 +0530196
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300197 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
Mythri P Kc3198a52011-03-12 12:04:27 +0530198
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300199 r = dss_pll_enable(&hdmi.pll.pll);
Mythri P Kc3198a52011-03-12 12:04:27 +0530200 if (r) {
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300201 DSSERR("Failed to enable PLL\n");
Tomi Valkeinencca35012012-04-26 14:48:32 +0300202 goto err_pll_enable;
Mythri P Kc3198a52011-03-12 12:04:27 +0530203 }
204
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300205 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300206 if (r) {
207 DSSERR("Failed to configure PLL\n");
208 goto err_pll_cfg;
209 }
210
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300211 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
212 hdmi_cinfo.clkout[0]);
Mythri P Kc3198a52011-03-12 12:04:27 +0530213 if (r) {
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200214 DSSDBG("Failed to configure PHY\n");
215 goto err_phy_cfg;
Mythri P Kc3198a52011-03-12 12:04:27 +0530216 }
217
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200218 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
219 if (r)
220 goto err_phy_pwr;
221
Archit Taneja275cfa12013-10-08 14:22:03 +0530222 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
Mythri P Kc3198a52011-03-12 12:04:27 +0530223
Mythri P Kc3198a52011-03-12 12:04:27 +0530224 /* bypass TV gamma table */
225 dispc_enable_gamma_table(0);
226
227 /* tv size */
Archit Tanejacea87b92012-09-07 17:56:20 +0530228 dss_mgr_set_timings(mgr, p);
Mythri P Kc3198a52011-03-12 12:04:27 +0530229
Archit Taneja275cfa12013-10-08 14:22:03 +0530230 r = hdmi_wp_video_start(&hdmi.wp);
Ricardo Neric0456be2012-04-27 13:48:45 -0500231 if (r)
232 goto err_vid_enable;
Mythri P Kc3198a52011-03-12 12:04:27 +0530233
Archit Tanejacea87b92012-09-07 17:56:20 +0530234 r = dss_mgr_enable(mgr);
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200235 if (r)
236 goto err_mgr_enable;
Tomi Valkeinen3870c902011-08-31 14:47:11 +0300237
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200238 hdmi_wp_set_irqenable(wp,
239 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
240
Mythri P Kc3198a52011-03-12 12:04:27 +0530241 return 0;
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200242
243err_mgr_enable:
Archit Taneja275cfa12013-10-08 14:22:03 +0530244 hdmi_wp_video_stop(&hdmi.wp);
Ricardo Neric0456be2012-04-27 13:48:45 -0500245err_vid_enable:
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200246err_phy_cfg:
247 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
248err_phy_pwr:
Tomi Valkeinenc2fbd062014-10-16 16:01:51 +0300249err_pll_cfg:
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300250 dss_pll_disable(&hdmi.pll.pll);
Tomi Valkeinencca35012012-04-26 14:48:32 +0300251err_pll_enable:
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300252 hdmi_power_off_core(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530253 return -EIO;
254}
255
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300256static void hdmi_power_off_full(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530257{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300258 struct omap_overlay_manager *mgr = hdmi.output.manager;
Archit Tanejacea87b92012-09-07 17:56:20 +0530259
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200260 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
261
Archit Tanejacea87b92012-09-07 17:56:20 +0530262 dss_mgr_disable(mgr);
Mythri P Kc3198a52011-03-12 12:04:27 +0530263
Archit Taneja275cfa12013-10-08 14:22:03 +0530264 hdmi_wp_video_stop(&hdmi.wp);
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200265
266 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
267
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300268 dss_pll_disable(&hdmi.pll.pll);
Tomi Valkeinencca35012012-04-26 14:48:32 +0300269
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300270 hdmi_power_off_core(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530271}
272
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300273static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
Mythri P Kc3198a52011-03-12 12:04:27 +0530274 struct omap_video_timings *timings)
275{
Archit Taneja1e676242013-12-09 19:39:08 +0530276 struct omap_dss_device *out = &hdmi.output;
Mythri P Kc3198a52011-03-12 12:04:27 +0530277
Archit Taneja1e676242013-12-09 19:39:08 +0530278 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
Mythri P Kc3198a52011-03-12 12:04:27 +0530279 return -EINVAL;
Mythri P Kc3198a52011-03-12 12:04:27 +0530280
281 return 0;
Mythri P Kc3198a52011-03-12 12:04:27 +0530282}
283
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300284static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
Archit Taneja78493982012-08-08 16:50:42 +0530285 struct omap_video_timings *timings)
Mythri P Kc3198a52011-03-12 12:04:27 +0530286{
Archit Tanejaed1aa902012-08-15 00:40:31 +0530287 mutex_lock(&hdmi.lock);
288
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300289 hdmi.cfg.timings = *timings;
Archit Taneja78493982012-08-08 16:50:42 +0530290
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300291 dispc_set_tv_pclk(timings->pixelclock);
Archit Taneja1e676242013-12-09 19:39:08 +0530292
Archit Tanejaed1aa902012-08-15 00:40:31 +0530293 mutex_unlock(&hdmi.lock);
Mythri P Kc3198a52011-03-12 12:04:27 +0530294}
295
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300296static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300297 struct omap_video_timings *timings)
298{
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300299 *timings = hdmi.cfg.timings;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300300}
301
Tomi Valkeinene40402c2012-03-02 18:01:07 +0200302static void hdmi_dump_regs(struct seq_file *s)
Mythri P K162874d2011-09-22 13:37:45 +0530303{
304 mutex_lock(&hdmi.lock);
305
Wei Yongjunf8fb7d72012-10-21 20:54:26 +0800306 if (hdmi_runtime_get()) {
307 mutex_unlock(&hdmi.lock);
Mythri P K162874d2011-09-22 13:37:45 +0530308 return;
Wei Yongjunf8fb7d72012-10-21 20:54:26 +0800309 }
Mythri P K162874d2011-09-22 13:37:45 +0530310
Archit Taneja275cfa12013-10-08 14:22:03 +0530311 hdmi_wp_dump(&hdmi.wp, s);
312 hdmi_pll_dump(&hdmi.pll, s);
313 hdmi_phy_dump(&hdmi.phy, s);
314 hdmi4_core_dump(&hdmi.core, s);
Mythri P K162874d2011-09-22 13:37:45 +0530315
316 hdmi_runtime_put();
317 mutex_unlock(&hdmi.lock);
318}
319
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300320static int read_edid(u8 *buf, int len)
Tomi Valkeinen47024562011-08-25 17:12:56 +0300321{
322 int r;
323
324 mutex_lock(&hdmi.lock);
325
326 r = hdmi_runtime_get();
327 BUG_ON(r);
328
Archit Taneja275cfa12013-10-08 14:22:03 +0530329 r = hdmi4_read_edid(&hdmi.core, buf, len);
Tomi Valkeinen47024562011-08-25 17:12:56 +0300330
331 hdmi_runtime_put();
332 mutex_unlock(&hdmi.lock);
333
334 return r;
335}
336
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300337static int hdmi_display_enable(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530338{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300339 struct omap_dss_device *out = &hdmi.output;
Mythri P Kc3198a52011-03-12 12:04:27 +0530340 int r = 0;
341
342 DSSDBG("ENTER hdmi_display_enable\n");
343
344 mutex_lock(&hdmi.lock);
345
Archit Tanejacea87b92012-09-07 17:56:20 +0530346 if (out == NULL || out->manager == NULL) {
347 DSSERR("failed to enable display: no output/manager\n");
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300348 r = -ENODEV;
349 goto err0;
350 }
351
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300352 r = hdmi_power_on_full(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530353 if (r) {
354 DSSERR("failed to power on device\n");
Tomi Valkeinend3923932013-04-25 13:12:07 +0300355 goto err0;
Mythri P Kc3198a52011-03-12 12:04:27 +0530356 }
357
358 mutex_unlock(&hdmi.lock);
359 return 0;
360
Mythri P Kc3198a52011-03-12 12:04:27 +0530361err0:
362 mutex_unlock(&hdmi.lock);
363 return r;
364}
365
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300366static void hdmi_display_disable(struct omap_dss_device *dssdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530367{
368 DSSDBG("Enter hdmi_display_disable\n");
369
370 mutex_lock(&hdmi.lock);
371
Tomi Valkeinenbb426fc92012-10-19 17:42:10 +0300372 hdmi_power_off_full(dssdev);
Mythri P Kc3198a52011-03-12 12:04:27 +0530373
Mythri P Kc3198a52011-03-12 12:04:27 +0530374 mutex_unlock(&hdmi.lock);
375}
376
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300377static int hdmi_core_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen44898232012-10-19 17:42:27 +0300378{
379 int r = 0;
380
381 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
382
383 mutex_lock(&hdmi.lock);
384
Tomi Valkeinen44898232012-10-19 17:42:27 +0300385 r = hdmi_power_on_core(dssdev);
386 if (r) {
387 DSSERR("failed to power on device\n");
388 goto err0;
389 }
390
391 mutex_unlock(&hdmi.lock);
392 return 0;
393
394err0:
395 mutex_unlock(&hdmi.lock);
396 return r;
397}
398
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300399static void hdmi_core_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen44898232012-10-19 17:42:27 +0300400{
401 DSSDBG("Enter omapdss_hdmi_core_disable\n");
402
403 mutex_lock(&hdmi.lock);
404
405 hdmi_power_off_core(dssdev);
406
407 mutex_unlock(&hdmi.lock);
408}
409
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300410static int hdmi_connect(struct omap_dss_device *dssdev,
411 struct omap_dss_device *dst)
412{
413 struct omap_overlay_manager *mgr;
414 int r;
415
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300416 r = hdmi_init_regulator();
417 if (r)
418 return r;
419
420 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
421 if (!mgr)
422 return -ENODEV;
423
424 r = dss_mgr_connect(mgr, dssdev);
425 if (r)
426 return r;
427
428 r = omapdss_output_set_device(dssdev, dst);
429 if (r) {
430 DSSERR("failed to connect output to new device: %s\n",
431 dst->name);
432 dss_mgr_disconnect(mgr, dssdev);
433 return r;
434 }
435
436 return 0;
437}
438
439static void hdmi_disconnect(struct omap_dss_device *dssdev,
440 struct omap_dss_device *dst)
441{
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300442 WARN_ON(dst != dssdev->dst);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300443
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300444 if (dst != dssdev->dst)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300445 return;
446
447 omapdss_output_unset_device(dssdev);
448
449 if (dssdev->manager)
450 dss_mgr_disconnect(dssdev->manager, dssdev);
451}
452
453static int hdmi_read_edid(struct omap_dss_device *dssdev,
454 u8 *edid, int len)
455{
456 bool need_enable;
457 int r;
458
459 need_enable = hdmi.core_enabled == false;
460
461 if (need_enable) {
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300462 r = hdmi_core_enable(dssdev);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300463 if (r)
464 return r;
465 }
466
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300467 r = read_edid(edid, len);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300468
469 if (need_enable)
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300470 hdmi_core_disable(dssdev);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300471
472 return r;
473}
474
475#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300476static int hdmi_audio_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300477{
478 int r;
479
480 mutex_lock(&hdmi.lock);
481
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300482 if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300483 r = -EPERM;
484 goto err;
485 }
486
Archit Taneja275cfa12013-10-08 14:22:03 +0530487 r = hdmi_wp_audio_enable(&hdmi.wp, true);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300488 if (r)
489 goto err;
490
491 mutex_unlock(&hdmi.lock);
492 return 0;
493
494err:
495 mutex_unlock(&hdmi.lock);
496 return r;
497}
498
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300499static void hdmi_audio_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300500{
Archit Taneja275cfa12013-10-08 14:22:03 +0530501 hdmi_wp_audio_enable(&hdmi.wp, false);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300502}
503
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300504static int hdmi_audio_start(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300505{
Archit Taneja275cfa12013-10-08 14:22:03 +0530506 return hdmi4_audio_start(&hdmi.core, &hdmi.wp);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300507}
508
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300509static void hdmi_audio_stop(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300510{
Archit Taneja275cfa12013-10-08 14:22:03 +0530511 hdmi4_audio_stop(&hdmi.core, &hdmi.wp);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300512}
513
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300514static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300515{
516 bool r;
517
518 mutex_lock(&hdmi.lock);
519
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300520 r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300521
522 mutex_unlock(&hdmi.lock);
523 return r;
524}
525
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300526static int hdmi_audio_config(struct omap_dss_device *dssdev,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300527 struct omap_dss_audio *audio)
528{
529 int r;
Tomi Valkeinend8d789412013-04-10 14:12:14 +0300530 u32 pclk = hdmi.cfg.timings.pixelclock;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300531
532 mutex_lock(&hdmi.lock);
533
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300534 if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300535 r = -EPERM;
536 goto err;
537 }
538
Archit Taneja08d83e4e2013-09-17 11:43:15 +0530539 r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300540 if (r)
541 goto err;
542
543 mutex_unlock(&hdmi.lock);
544 return 0;
545
546err:
547 mutex_unlock(&hdmi.lock);
548 return r;
549}
550#else
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300551static int hdmi_audio_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300552{
553 return -EPERM;
554}
555
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300556static void hdmi_audio_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300557{
558}
559
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300560static int hdmi_audio_start(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300561{
562 return -EPERM;
563}
564
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300565static void hdmi_audio_stop(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300566{
567}
568
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300569static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300570{
571 return false;
572}
573
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300574static int hdmi_audio_config(struct omap_dss_device *dssdev,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300575 struct omap_dss_audio *audio)
576{
577 return -EPERM;
578}
579#endif
580
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300581static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
582 const struct hdmi_avi_infoframe *avi)
583{
584 hdmi.cfg.infoframe = *avi;
585 return 0;
586}
587
588static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
589 bool hdmi_mode)
590{
591 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
592 return 0;
593}
594
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300595static const struct omapdss_hdmi_ops hdmi_ops = {
596 .connect = hdmi_connect,
597 .disconnect = hdmi_disconnect,
598
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300599 .enable = hdmi_display_enable,
600 .disable = hdmi_display_disable,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300601
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300602 .check_timings = hdmi_display_check_timing,
603 .set_timings = hdmi_display_set_timing,
604 .get_timings = hdmi_display_get_timings,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300605
606 .read_edid = hdmi_read_edid,
Tomi Valkeinenab0aee92014-06-18 14:21:44 +0300607 .set_infoframe = hdmi_set_infoframe,
608 .set_hdmi_mode = hdmi_set_hdmi_mode,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300609
Tomi Valkeinen164ebdd2013-05-15 10:48:45 +0300610 .audio_enable = hdmi_audio_enable,
611 .audio_disable = hdmi_audio_disable,
612 .audio_start = hdmi_audio_start,
613 .audio_stop = hdmi_audio_stop,
614 .audio_supported = hdmi_audio_supported,
615 .audio_config = hdmi_audio_config,
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300616};
617
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300618static void hdmi_init_output(struct platform_device *pdev)
Archit Taneja81b87f52012-09-26 16:30:49 +0530619{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300620 struct omap_dss_device *out = &hdmi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530621
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300622 out->dev = &pdev->dev;
Archit Taneja81b87f52012-09-26 16:30:49 +0530623 out->id = OMAP_DSS_OUTPUT_HDMI;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300624 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
Tomi Valkeinen7286a082013-02-18 13:06:01 +0200625 out->name = "hdmi.0";
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200626 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300627 out->ops.hdmi = &hdmi_ops;
Tomi Valkeinenb7328e12013-05-03 11:42:18 +0300628 out->owner = THIS_MODULE;
Archit Taneja81b87f52012-09-26 16:30:49 +0530629
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300630 omapdss_register_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530631}
632
633static void __exit hdmi_uninit_output(struct platform_device *pdev)
634{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300635 struct omap_dss_device *out = &hdmi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530636
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300637 omapdss_unregister_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530638}
639
Tomi Valkeinen2f5dc672014-04-17 12:54:02 +0300640static int hdmi_probe_of(struct platform_device *pdev)
641{
642 struct device_node *node = pdev->dev.of_node;
643 struct device_node *ep;
644 int r;
645
646 ep = omapdss_of_get_first_endpoint(node);
647 if (!ep)
648 return 0;
649
650 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
651 if (r)
652 goto err;
653
654 of_node_put(ep);
655 return 0;
656
657err:
658 of_node_put(ep);
659 return r;
660}
661
Mythri P Kc3198a52011-03-12 12:04:27 +0530662/* HDMI HW IP initialisation */
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300663static int omapdss_hdmihw_probe(struct platform_device *pdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530664{
Tomi Valkeinen38f3daf2012-05-02 14:55:12 +0300665 int r;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200666 int irq;
Mythri P Kc3198a52011-03-12 12:04:27 +0530667
Mythri P Kc3198a52011-03-12 12:04:27 +0530668 hdmi.pdev = pdev;
669
670 mutex_init(&hdmi.lock);
671
Tomi Valkeinen2f5dc672014-04-17 12:54:02 +0300672 if (pdev->dev.of_node) {
673 r = hdmi_probe_of(pdev);
674 if (r)
675 return r;
676 }
677
Archit Taneja275cfa12013-10-08 14:22:03 +0530678 r = hdmi_wp_init(pdev, &hdmi.wp);
Archit Tanejaf382d9e2013-08-06 14:56:55 +0530679 if (r)
680 return r;
Mythri P Kc3198a52011-03-12 12:04:27 +0530681
Tomi Valkeinen03aafa22014-10-16 15:31:38 +0300682 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
Archit Tanejac1577c12013-10-08 12:55:26 +0530683 if (r)
684 return r;
685
Archit Taneja275cfa12013-10-08 14:22:03 +0530686 r = hdmi_phy_init(pdev, &hdmi.phy);
Archit Taneja5cac5ae2013-10-08 13:07:00 +0530687 if (r)
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300688 goto err;
Tomi Valkeinenddb1d5c2013-06-06 13:08:35 +0300689
Archit Taneja275cfa12013-10-08 14:22:03 +0530690 r = hdmi4_core_init(pdev, &hdmi.core);
Archit Taneja425f02f2013-10-08 14:16:05 +0530691 if (r)
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300692 goto err;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300693
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200694 irq = platform_get_irq(pdev, 0);
695 if (irq < 0) {
696 DSSERR("platform_get_irq failed\n");
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300697 r = -ENODEV;
698 goto err;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200699 }
700
701 r = devm_request_threaded_irq(&pdev->dev, irq,
702 NULL, hdmi_irq_handler,
703 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
704 if (r) {
705 DSSERR("HDMI IRQ request failed\n");
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300706 goto err;
Tomi Valkeinendcf5f722013-10-28 11:47:34 +0200707 }
708
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300709 pm_runtime_enable(&pdev->dev);
710
Tomi Valkeinen002d3682013-02-13 12:17:43 +0200711 hdmi_init_output(pdev);
712
Tomi Valkeinene40402c2012-03-02 18:01:07 +0200713 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
714
Tomi Valkeinencca35012012-04-26 14:48:32 +0300715 return 0;
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300716err:
717 hdmi_pll_uninit(&hdmi.pll);
718 return r;
Tomi Valkeinencca35012012-04-26 14:48:32 +0300719}
720
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200721static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
Mythri P Kc3198a52011-03-12 12:04:27 +0530722{
Archit Taneja81b87f52012-09-26 16:30:49 +0530723 hdmi_uninit_output(pdev);
724
Tomi Valkeinenc84c3a52014-10-22 15:02:17 +0300725 hdmi_pll_uninit(&hdmi.pll);
726
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300727 pm_runtime_disable(&pdev->dev);
728
Mythri P Kc3198a52011-03-12 12:04:27 +0530729 return 0;
730}
731
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300732static int hdmi_runtime_suspend(struct device *dev)
733{
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300734 dispc_runtime_put();
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300735
736 return 0;
737}
738
739static int hdmi_runtime_resume(struct device *dev)
740{
741 int r;
742
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300743 r = dispc_runtime_get();
744 if (r < 0)
Tomi Valkeinen852f0832012-02-17 17:58:04 +0200745 return r;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300746
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300747 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300748}
749
750static const struct dev_pm_ops hdmi_pm_ops = {
751 .runtime_suspend = hdmi_runtime_suspend,
752 .runtime_resume = hdmi_runtime_resume,
753};
754
Tomi Valkeinen04656162013-12-16 15:14:04 +0200755static const struct of_device_id hdmi_of_match[] = {
756 { .compatible = "ti,omap4-hdmi", },
757 {},
758};
759
Mythri P Kc3198a52011-03-12 12:04:27 +0530760static struct platform_driver omapdss_hdmihw_driver = {
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300761 .probe = omapdss_hdmihw_probe,
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200762 .remove = __exit_p(omapdss_hdmihw_remove),
Mythri P Kc3198a52011-03-12 12:04:27 +0530763 .driver = {
764 .name = "omapdss_hdmi",
765 .owner = THIS_MODULE,
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300766 .pm = &hdmi_pm_ops,
Tomi Valkeinen04656162013-12-16 15:14:04 +0200767 .of_match_table = hdmi_of_match,
Tomi Valkeinen422ccbd2014-10-16 09:54:25 +0300768 .suppress_bind_attrs = true,
Mythri P Kc3198a52011-03-12 12:04:27 +0530769 },
770};
771
Archit Tanejaef269582013-09-12 17:45:57 +0530772int __init hdmi4_init_platform_driver(void)
Mythri P Kc3198a52011-03-12 12:04:27 +0530773{
Tomi Valkeinen17ae4e82013-04-26 14:48:43 +0300774 return platform_driver_register(&omapdss_hdmihw_driver);
Mythri P Kc3198a52011-03-12 12:04:27 +0530775}
776
Archit Tanejaef269582013-09-12 17:45:57 +0530777void __exit hdmi4_uninit_platform_driver(void)
Mythri P Kc3198a52011-03-12 12:04:27 +0530778{
Tomi Valkeinen04c742c2012-02-23 15:32:37 +0200779 platform_driver_unregister(&omapdss_hdmihw_driver);
Mythri P Kc3198a52011-03-12 12:04:27 +0530780}