| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/vfp.h |
| 3 | * |
| 4 | * VFP register definitions. |
| 5 | * First, the standard VFP set. |
| 6 | */ |
| 7 | |
| 8 | #define FPSID cr0 |
| 9 | #define FPSCR cr1 |
| 10 | #define FPEXC cr8 |
| 11 | |
| 12 | /* FPSID bits */ |
| 13 | #define FPSID_IMPLEMENTER_BIT (24) |
| 14 | #define FPSID_IMPLEMENTER_MASK (0xff << FPSID_IMPLEMENTER_BIT) |
| 15 | #define FPSID_SOFTWARE (1<<23) |
| 16 | #define FPSID_FORMAT_BIT (21) |
| 17 | #define FPSID_FORMAT_MASK (0x3 << FPSID_FORMAT_BIT) |
| 18 | #define FPSID_NODOUBLE (1<<20) |
| 19 | #define FPSID_ARCH_BIT (16) |
| 20 | #define FPSID_ARCH_MASK (0xF << FPSID_ARCH_BIT) |
| 21 | #define FPSID_PART_BIT (8) |
| 22 | #define FPSID_PART_MASK (0xFF << FPSID_PART_BIT) |
| 23 | #define FPSID_VARIANT_BIT (4) |
| 24 | #define FPSID_VARIANT_MASK (0xF << FPSID_VARIANT_BIT) |
| 25 | #define FPSID_REV_BIT (0) |
| 26 | #define FPSID_REV_MASK (0xF << FPSID_REV_BIT) |
| 27 | |
| 28 | /* FPEXC bits */ |
| 29 | #define FPEXC_EXCEPTION (1<<31) |
| 30 | #define FPEXC_ENABLE (1<<30) |
| 31 | |
| 32 | /* FPSCR bits */ |
| 33 | #define FPSCR_DEFAULT_NAN (1<<25) |
| 34 | #define FPSCR_FLUSHTOZERO (1<<24) |
| 35 | #define FPSCR_ROUND_NEAREST (0<<22) |
| 36 | #define FPSCR_ROUND_PLUSINF (1<<22) |
| 37 | #define FPSCR_ROUND_MINUSINF (2<<22) |
| 38 | #define FPSCR_ROUND_TOZERO (3<<22) |
| 39 | #define FPSCR_RMODE_BIT (22) |
| 40 | #define FPSCR_RMODE_MASK (3 << FPSCR_RMODE_BIT) |
| 41 | #define FPSCR_STRIDE_BIT (20) |
| 42 | #define FPSCR_STRIDE_MASK (3 << FPSCR_STRIDE_BIT) |
| 43 | #define FPSCR_LENGTH_BIT (16) |
| 44 | #define FPSCR_LENGTH_MASK (7 << FPSCR_LENGTH_BIT) |
| 45 | #define FPSCR_IOE (1<<8) |
| 46 | #define FPSCR_DZE (1<<9) |
| 47 | #define FPSCR_OFE (1<<10) |
| 48 | #define FPSCR_UFE (1<<11) |
| 49 | #define FPSCR_IXE (1<<12) |
| 50 | #define FPSCR_IDE (1<<15) |
| 51 | #define FPSCR_IOC (1<<0) |
| 52 | #define FPSCR_DZC (1<<1) |
| 53 | #define FPSCR_OFC (1<<2) |
| 54 | #define FPSCR_UFC (1<<3) |
| 55 | #define FPSCR_IXC (1<<4) |
| 56 | #define FPSCR_IDC (1<<7) |
| 57 | |
| 58 | /* |
| 59 | * VFP9-S specific. |
| 60 | */ |
| 61 | #define FPINST cr9 |
| 62 | #define FPINST2 cr10 |
| 63 | |
| 64 | /* FPEXC bits */ |
| 65 | #define FPEXC_FPV2 (1<<28) |
| 66 | #define FPEXC_LENGTH_BIT (8) |
| 67 | #define FPEXC_LENGTH_MASK (7 << FPEXC_LENGTH_BIT) |
| 68 | #define FPEXC_INV (1 << 7) |
| 69 | #define FPEXC_UFC (1 << 3) |
| 70 | #define FPEXC_OFC (1 << 2) |
| 71 | #define FPEXC_IOC (1 << 0) |
| 72 | |
| 73 | /* Bit patterns for decoding the packaged operation descriptors */ |
| 74 | #define VFPOPDESC_LENGTH_BIT (9) |
| 75 | #define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT) |
| 76 | #define VFPOPDESC_UNUSED_BIT (24) |
| 77 | #define VFPOPDESC_UNUSED_MASK (0xFF << VFPOPDESC_UNUSED_BIT) |
| 78 | #define VFPOPDESC_OPDESC_MASK (~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK)) |