Brian Norris | ca22f04 | 2015-05-12 12:12:02 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright © 2015 Broadcom Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/ioport.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/of.h> |
| 19 | #include <linux/of_address.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/slab.h> |
| 22 | |
| 23 | #include "brcmnand.h" |
| 24 | |
| 25 | struct iproc_nand_soc_priv { |
| 26 | void __iomem *idm_base; |
| 27 | void __iomem *ext_base; |
| 28 | spinlock_t idm_lock; |
| 29 | }; |
| 30 | |
| 31 | #define IPROC_NAND_CTLR_READY_OFFSET 0x10 |
| 32 | #define IPROC_NAND_CTLR_READY BIT(0) |
| 33 | |
| 34 | #define IPROC_NAND_IO_CTRL_OFFSET 0x00 |
| 35 | #define IPROC_NAND_APB_LE_MODE BIT(24) |
| 36 | #define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6) |
| 37 | |
| 38 | static bool iproc_nand_intc_ack(struct brcmnand_soc *soc) |
| 39 | { |
| 40 | struct iproc_nand_soc_priv *priv = soc->priv; |
| 41 | void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET; |
| 42 | u32 val = brcmnand_readl(mmio); |
| 43 | |
| 44 | if (val & IPROC_NAND_CTLR_READY) { |
| 45 | brcmnand_writel(IPROC_NAND_CTLR_READY, mmio); |
| 46 | return true; |
| 47 | } |
| 48 | |
| 49 | return false; |
| 50 | } |
| 51 | |
| 52 | static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en) |
| 53 | { |
| 54 | struct iproc_nand_soc_priv *priv = soc->priv; |
| 55 | void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; |
| 56 | u32 val; |
| 57 | unsigned long flags; |
| 58 | |
| 59 | spin_lock_irqsave(&priv->idm_lock, flags); |
| 60 | |
| 61 | val = brcmnand_readl(mmio); |
| 62 | |
| 63 | if (en) |
| 64 | val |= IPROC_NAND_INT_CTRL_READ_ENABLE; |
| 65 | else |
| 66 | val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE; |
| 67 | |
| 68 | brcmnand_writel(val, mmio); |
| 69 | |
| 70 | spin_unlock_irqrestore(&priv->idm_lock, flags); |
| 71 | } |
| 72 | |
| 73 | static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare) |
| 74 | { |
| 75 | struct iproc_nand_soc_priv *priv = soc->priv; |
| 76 | void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; |
| 77 | u32 val; |
| 78 | unsigned long flags; |
| 79 | |
| 80 | spin_lock_irqsave(&priv->idm_lock, flags); |
| 81 | |
| 82 | val = brcmnand_readl(mmio); |
| 83 | |
| 84 | if (prepare) |
| 85 | val |= IPROC_NAND_APB_LE_MODE; |
| 86 | else |
| 87 | val &= ~IPROC_NAND_APB_LE_MODE; |
| 88 | |
| 89 | brcmnand_writel(val, mmio); |
| 90 | |
| 91 | spin_unlock_irqrestore(&priv->idm_lock, flags); |
| 92 | } |
| 93 | |
| 94 | static int iproc_nand_probe(struct platform_device *pdev) |
| 95 | { |
| 96 | struct device *dev = &pdev->dev; |
| 97 | struct iproc_nand_soc_priv *priv; |
| 98 | struct brcmnand_soc *soc; |
| 99 | struct resource *res; |
| 100 | |
| 101 | soc = devm_kzalloc(dev, sizeof(*soc), GFP_KERNEL); |
| 102 | if (!soc) |
| 103 | return -ENOMEM; |
| 104 | |
| 105 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 106 | if (!priv) |
| 107 | return -ENOMEM; |
| 108 | |
| 109 | spin_lock_init(&priv->idm_lock); |
| 110 | |
| 111 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "iproc-idm"); |
| 112 | priv->idm_base = devm_ioremap_resource(dev, res); |
| 113 | if (IS_ERR(priv->idm_base)) |
| 114 | return PTR_ERR(priv->idm_base); |
| 115 | |
| 116 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "iproc-ext"); |
| 117 | priv->ext_base = devm_ioremap_resource(dev, res); |
| 118 | if (IS_ERR(priv->ext_base)) |
| 119 | return PTR_ERR(priv->ext_base); |
| 120 | |
| 121 | soc->pdev = pdev; |
| 122 | soc->priv = priv; |
| 123 | soc->ctlrdy_ack = iproc_nand_intc_ack; |
| 124 | soc->ctlrdy_set_enabled = iproc_nand_intc_set; |
| 125 | soc->prepare_data_bus = iproc_nand_apb_access; |
| 126 | |
| 127 | return brcmnand_probe(pdev, soc); |
| 128 | } |
| 129 | |
| 130 | static const struct of_device_id iproc_nand_of_match[] = { |
| 131 | { .compatible = "brcm,nand-iproc" }, |
| 132 | {}, |
| 133 | }; |
| 134 | MODULE_DEVICE_TABLE(of, iproc_nand_of_match); |
| 135 | |
| 136 | static struct platform_driver iproc_nand_driver = { |
| 137 | .probe = iproc_nand_probe, |
| 138 | .remove = brcmnand_remove, |
| 139 | .driver = { |
| 140 | .name = "iproc_nand", |
| 141 | .pm = &brcmnand_pm_ops, |
| 142 | .of_match_table = iproc_nand_of_match, |
| 143 | } |
| 144 | }; |
| 145 | module_platform_driver(iproc_nand_driver); |
| 146 | |
| 147 | MODULE_LICENSE("GPL v2"); |
| 148 | MODULE_AUTHOR("Brian Norris"); |
| 149 | MODULE_AUTHOR("Ray Jui"); |
| 150 | MODULE_DESCRIPTION("NAND driver for Broadcom IPROC-based SoCs"); |