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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_MCE_H
2#define _ASM_X86_MCE_H
Thomas Gleixnere2f43022007-10-17 18:04:40 +02003
Jaswinder Singh Rajput999b6972009-01-30 22:47:27 +05304#include <linux/types.h>
Thomas Gleixnere2f43022007-10-17 18:04:40 +02005#include <asm/ioctls.h>
Thomas Gleixnere2f43022007-10-17 18:04:40 +02006
7/*
8 * Machine Check support for x86
9 */
10
Ingo Molnar06b851d2009-04-08 12:31:25 +020011#define MCG_CTL_P (1ULL<<8) /* MCG_CAP register available */
Andi Kleen03195c62009-02-12 13:49:35 +010012#define MCG_EXT_P (1ULL<<9) /* Extended registers available */
13#define MCG_CMCI_P (1ULL<<10) /* CMCI supported */
Thomas Gleixnere2f43022007-10-17 18:04:40 +020014
Ingo Molnar06b851d2009-04-08 12:31:25 +020015#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
16#define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */
17#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
Thomas Gleixnere2f43022007-10-17 18:04:40 +020018
Ingo Molnar06b851d2009-04-08 12:31:25 +020019#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
20#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */
21#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */
22#define MCI_STATUS_EN (1ULL<<60) /* error enabled */
23#define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */
24#define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */
25#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */
Thomas Gleixnere2f43022007-10-17 18:04:40 +020026
27/* Fields are zero when not available */
28struct mce {
29 __u64 status;
30 __u64 misc;
31 __u64 addr;
32 __u64 mcgstatus;
H. Peter Anvin65ea5b02008-01-30 13:30:56 +010033 __u64 ip;
Thomas Gleixnere2f43022007-10-17 18:04:40 +020034 __u64 tsc; /* cpu time stamp counter */
35 __u64 res1; /* for future extension */
36 __u64 res2; /* dito. */
37 __u8 cs; /* code segment */
38 __u8 bank; /* machine check bank */
39 __u8 cpu; /* cpu that raised the error */
40 __u8 finished; /* entry is valid */
41 __u32 pad;
42};
43
44/*
45 * This structure contains all data related to the MCE log. Also
46 * carries a signature to make it easier to find from external
47 * debugging tools. Each entry is only valid when its finished flag
48 * is set.
49 */
50
51#define MCE_LOG_LEN 32
52
53struct mce_log {
54 char signature[12]; /* "MACHINECHECK" */
55 unsigned len; /* = MCE_LOG_LEN */
56 unsigned next;
57 unsigned flags;
58 unsigned pad0;
59 struct mce entry[MCE_LOG_LEN];
60};
61
62#define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
63
64#define MCE_LOG_SIGNATURE "MACHINECHECK"
65
66#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
67#define MCE_GET_LOG_LEN _IOR('M', 2, int)
68#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
69
70/* Software defined banks */
71#define MCE_EXTENDED_BANK 128
72#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
73
74#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
75#define K8_MCE_THRESHOLD_BANK_0 (MCE_THRESHOLD_BASE + 0 * 9)
76#define K8_MCE_THRESHOLD_BANK_1 (MCE_THRESHOLD_BASE + 1 * 9)
77#define K8_MCE_THRESHOLD_BANK_2 (MCE_THRESHOLD_BASE + 2 * 9)
78#define K8_MCE_THRESHOLD_BANK_3 (MCE_THRESHOLD_BASE + 3 * 9)
79#define K8_MCE_THRESHOLD_BANK_4 (MCE_THRESHOLD_BASE + 4 * 9)
80#define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9)
81#define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0)
82
Thomas Gleixnere2f43022007-10-17 18:04:40 +020083#ifdef __KERNEL__
84
Thomas Gleixner96a388d2007-10-11 11:20:03 +020085#ifdef CONFIG_X86_32
Thomas Gleixnere2f43022007-10-17 18:04:40 +020086extern int mce_disabled;
Ingo Molnar06b851d2009-04-08 12:31:25 +020087#endif
Thomas Gleixnere2f43022007-10-17 18:04:40 +020088
89#include <asm/atomic.h>
90
Andi Kleenb5f2fa42009-02-12 13:43:22 +010091void mce_setup(struct mce *m);
Thomas Gleixnere2f43022007-10-17 18:04:40 +020092void mce_log(struct mce *m);
Ingo Molnarcb491fc2009-04-08 12:31:17 +020093DECLARE_PER_CPU(struct sys_device, mce_dev);
Rafael J. Wysocki87357282008-08-22 22:23:09 +020094extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
Thomas Gleixnere2f43022007-10-17 18:04:40 +020095
Andi Kleen41fdff32009-02-12 13:49:30 +010096/*
97 * To support more than 128 would need to escape the predefined
98 * Linux defined extended banks first.
99 */
100#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
101
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200102#ifdef CONFIG_X86_MCE_INTEL
103void mce_intel_feature_init(struct cpuinfo_x86 *c);
Andi Kleen88ccbed2009-02-12 13:49:36 +0100104void cmci_clear(void);
105void cmci_reenable(void);
106void cmci_rediscover(int dying);
107void cmci_recheck(void);
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200108#else
109static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
Andi Kleen88ccbed2009-02-12 13:49:36 +0100110static inline void cmci_clear(void) {}
111static inline void cmci_reenable(void) {}
112static inline void cmci_rediscover(int dying) {}
113static inline void cmci_recheck(void) {}
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200114#endif
115
116#ifdef CONFIG_X86_MCE_AMD
117void mce_amd_feature_init(struct cpuinfo_x86 *c);
118#else
119static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
120#endif
121
Andi Kleen88ccbed2009-02-12 13:49:36 +0100122extern int mce_available(struct cpuinfo_x86 *c);
123
Andi Kleenb5f2fa42009-02-12 13:43:22 +0100124void mce_log_therm_throt_event(__u64 status);
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200125
126extern atomic_t mce_entry;
127
128extern void do_machine_check(struct pt_regs *, long);
Andi Kleenb79109c2009-02-12 13:43:23 +0100129
Andi Kleenee031c32009-02-12 13:49:34 +0100130typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS);
131DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
132
Andi Kleenb79109c2009-02-12 13:43:23 +0100133enum mcp_flags {
134 MCP_TIMESTAMP = (1 << 0), /* log time stamp */
135 MCP_UC = (1 << 1), /* log uncorrected errors */
Andi Kleen5679af42009-04-07 17:06:55 +0200136 MCP_DONTLOG = (1 << 2), /* only clear, don't log */
Andi Kleenb79109c2009-02-12 13:43:23 +0100137};
Andi Kleenee031c32009-02-12 13:49:34 +0100138extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
Andi Kleenb79109c2009-02-12 13:43:23 +0100139
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200140extern int mce_notify_user(void);
141
Thomas Gleixneraf7a78e2008-01-30 13:30:17 +0100142#ifdef CONFIG_X86_MCE
143extern void mcheck_init(struct cpuinfo_x86 *c);
144#else
145#define mcheck_init(c) do { } while (0)
146#endif
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200147
Andi Kleenb2762682009-02-12 13:49:31 +0100148extern void (*mce_threshold_vector)(void);
149
Thomas Gleixnere2f43022007-10-17 18:04:40 +0200150#endif /* __KERNEL__ */
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700151#endif /* _ASM_X86_MCE_H */