Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/plat-omap/include/mach/entry-macro.S |
| 3 | * |
| 4 | * Low-level IRQ helper macros for OMAP-based platforms |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | */ |
| 10 | #include <mach/hardware.h> |
| 11 | #include <mach/io.h> |
| 12 | #include <mach/irqs.h> |
| 13 | |
| 14 | #if defined(CONFIG_ARCH_OMAP1) |
| 15 | |
| 16 | #if defined(CONFIG_ARCH_OMAP730) && \ |
| 17 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) |
| 18 | #error "FIXME: OMAP730 doesn't support multiple-OMAP" |
| 19 | #elif defined(CONFIG_ARCH_OMAP730) |
| 20 | #define INT_IH2_IRQ INT_730_IH2_IRQ |
| 21 | #elif defined(CONFIG_ARCH_OMAP15XX) |
| 22 | #define INT_IH2_IRQ INT_1510_IH2_IRQ |
| 23 | #elif defined(CONFIG_ARCH_OMAP16XX) |
| 24 | #define INT_IH2_IRQ INT_1610_IH2_IRQ |
| 25 | #else |
| 26 | #warning "IH2 IRQ defaulted" |
| 27 | #define INT_IH2_IRQ INT_1510_IH2_IRQ |
| 28 | #endif |
| 29 | |
| 30 | .macro disable_fiq |
| 31 | .endm |
| 32 | |
| 33 | .macro get_irqnr_preamble, base, tmp |
| 34 | .endm |
| 35 | |
| 36 | .macro arch_ret_to_user, tmp1, tmp2 |
| 37 | .endm |
| 38 | |
| 39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 40 | ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) |
| 41 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] |
| 42 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] |
| 43 | mov \irqstat, #0xffffffff |
| 44 | bic \tmp, \irqstat, \tmp |
| 45 | tst \irqnr, \tmp |
| 46 | beq 1510f |
| 47 | |
| 48 | ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] |
| 49 | cmp \irqnr, #0 |
| 50 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] |
| 51 | cmpeq \irqnr, #INT_IH2_IRQ |
| 52 | ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) |
| 53 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] |
| 54 | addeqs \irqnr, \irqnr, #32 |
| 55 | 1510: |
| 56 | .endm |
| 57 | |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame^] | 58 | #endif |
| 59 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 60 | |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame^] | 61 | #if defined(CONFIG_ARCH_OMAP24XX) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 62 | #include <mach/omap24xx.h> |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame^] | 63 | #endif |
| 64 | #if defined(CONFIG_ARCH_OMAP34XX) |
| 65 | #include <mach/omap34xx.h> |
| 66 | #endif |
| 67 | |
| 68 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 69 | |
| 70 | .macro disable_fiq |
| 71 | .endm |
| 72 | |
| 73 | .macro get_irqnr_preamble, base, tmp |
| 74 | .endm |
| 75 | |
| 76 | .macro arch_ret_to_user, tmp1, tmp2 |
| 77 | .endm |
| 78 | |
| 79 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 80 | ldr \base, =OMAP2_VA_IC_BASE |
| 81 | ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ |
| 82 | cmp \irqnr, #0x0 |
| 83 | bne 2222f |
| 84 | ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ |
| 85 | cmp \irqnr, #0x0 |
| 86 | bne 2222f |
| 87 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ |
| 88 | cmp \irqnr, #0x0 |
| 89 | 2222: |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame^] | 90 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 91 | |
| 92 | .endm |
| 93 | |
| 94 | .macro irq_prio_table |
| 95 | .endm |
| 96 | |
| 97 | #endif |