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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/arch/arm/mach-s3c2410/mach-bast.c
2 *
Ben Dooksccae9412009-11-13 22:54:14 +00003 * Copyright 2003-2008 Simtec Electronics
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
Linus Torvalds1da177e2005-04-16 15:20:36 -070011*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
Ben Dooksec976d62009-05-13 22:52:24 +010019#include <linux/gpio.h>
Ben Dooks6ddc4b02008-04-16 00:06:14 +010020#include <linux/sysdev.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010021#include <linux/serial_core.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010022#include <linux/platform_device.h>
Ben Dooksd97a6662005-06-23 21:56:47 +010023#include <linux/dm9000.h>
Ben Dooksb7a12d12008-07-03 11:24:37 +010024#include <linux/ata_platform.h>
Ben Dooks042cf0f2008-07-03 11:24:41 +010025#include <linux/i2c.h>
Russell Kingfced80c2008-09-06 12:10:45 +010026#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Ben Dooks5ce4b1f2007-07-12 10:44:53 +010028#include <net/ax88796.h>
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
33
Russell Kinga09e64f2008-08-05 16:14:15 +010034#include <mach/bast-map.h>
35#include <mach/bast-irq.h>
36#include <mach/bast-cpld.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
Russell Kinga09e64f2008-08-05 16:14:15 +010038#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <asm/irq.h>
40#include <asm/mach-types.h>
41
42//#include <asm/debug-ll.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010043#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010044#include <mach/regs-gpio.h>
45#include <mach/regs-mem.h>
46#include <mach/regs-lcd.h>
Ben Dooks58c8d572005-10-28 15:31:46 +010047
Ben Dooks885f9eb2009-07-18 10:12:26 +010048#include <plat/hwmon.h>
Ben Dooks7926b5a2008-10-30 10:14:35 +000049#include <plat/nand.h>
Ben Dooks9498cb72008-10-30 10:14:33 +000050#include <plat/iic.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010051#include <mach/fb.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
53#include <linux/mtd/mtd.h>
54#include <linux/mtd/nand.h>
55#include <linux/mtd/nand_ecc.h>
56#include <linux/mtd/partitions.h>
57
Ben Dooks65cc3372005-07-18 10:24:32 +010058#include <linux/serial_8250.h>
59
Ben Dooksd5120ae2008-10-07 23:09:51 +010060#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010061#include <plat/devs.h>
62#include <plat/cpu.h>
Ben Dooksca0b4902009-07-30 23:23:39 +010063#include <plat/cpu-freq.h>
Ben Dooks4d3a3462009-11-13 22:34:20 +000064#include <plat/audio-simtec.h>
Ben Dooks9d529c62008-07-03 11:24:39 +010065
Linus Torvalds1da177e2005-04-16 15:20:36 -070066#include "usb-simtec.h"
Ben Dooks9d529c62008-07-03 11:24:39 +010067#include "nor-simtec.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Ben Dooksccae9412009-11-13 22:54:14 +000069#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
71/* macros for virtual address mods for the io space entries */
72#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
73#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
74#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
75#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
76
77/* macros to modify the physical addresses for io space */
78
Ben Dooks1d23b652005-11-08 19:15:31 +000079#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
80#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
81#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
82#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
84static struct map_desc bast_iodesc[] __initdata = {
85 /* ISA IO areas */
Ben Dooks1d23b652005-11-08 19:15:31 +000086 {
87 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
88 .pfn = PA_CS2(BAST_PA_ISAIO),
89 .length = SZ_16M,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (u32)S3C24XX_VA_ISA_WORD,
93 .pfn = PA_CS3(BAST_PA_ISAIO),
94 .length = SZ_16M,
95 .type = MT_DEVICE,
96 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070097 /* bast CPLD control registers, and external interrupt controls */
Ben Dooks1d23b652005-11-08 19:15:31 +000098 {
99 .virtual = (u32)BAST_VA_CTRL1,
100 .pfn = __phys_to_pfn(BAST_PA_CTRL1),
101 .length = SZ_1M,
102 .type = MT_DEVICE,
103 }, {
104 .virtual = (u32)BAST_VA_CTRL2,
105 .pfn = __phys_to_pfn(BAST_PA_CTRL2),
106 .length = SZ_1M,
107 .type = MT_DEVICE,
108 }, {
109 .virtual = (u32)BAST_VA_CTRL3,
110 .pfn = __phys_to_pfn(BAST_PA_CTRL3),
111 .length = SZ_1M,
112 .type = MT_DEVICE,
113 }, {
114 .virtual = (u32)BAST_VA_CTRL4,
115 .pfn = __phys_to_pfn(BAST_PA_CTRL4),
116 .length = SZ_1M,
117 .type = MT_DEVICE,
118 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 /* PC104 IRQ mux */
Ben Dooks1d23b652005-11-08 19:15:31 +0000120 {
121 .virtual = (u32)BAST_VA_PC104_IRQREQ,
122 .pfn = __phys_to_pfn(BAST_PA_PC104_IRQREQ),
123 .length = SZ_1M,
124 .type = MT_DEVICE,
125 }, {
126 .virtual = (u32)BAST_VA_PC104_IRQRAW,
127 .pfn = __phys_to_pfn(BAST_PA_PC104_IRQRAW),
128 .length = SZ_1M,
129 .type = MT_DEVICE,
130 }, {
131 .virtual = (u32)BAST_VA_PC104_IRQMASK,
132 .pfn = __phys_to_pfn(BAST_PA_PC104_IRQMASK),
133 .length = SZ_1M,
134 .type = MT_DEVICE,
135 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136
137 /* peripheral space... one for each of fast/slow/byte/16bit */
138 /* note, ide is only decoded in word space, even though some registers
139 * are only 8bit */
140
141 /* slow, byte */
142 { VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
143 { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
146 /* slow, word */
147 { VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
148 { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151 /* fast, byte */
152 { VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
153 { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154 { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155
156 /* fast, word */
157 { VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
158 { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160};
161
162#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
163#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
164#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
165
166static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
167 [0] = {
168 .name = "uclk",
169 .divisor = 1,
170 .min_baud = 0,
171 .max_baud = 0,
172 },
173 [1] = {
174 .name = "pclk",
175 .divisor = 1,
176 .min_baud = 0,
Ben Dooksb526bf22005-11-16 15:05:12 +0000177 .max_baud = 0,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 }
179};
180
181
Ben Dooks66a9b492006-06-18 23:04:05 +0100182static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 [0] = {
184 .hwport = 0,
185 .flags = 0,
186 .ucon = UCON,
187 .ulcon = ULCON,
188 .ufcon = UFCON,
189 .clocks = bast_serial_clocks,
Ben Dooksb526bf22005-11-16 15:05:12 +0000190 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 },
192 [1] = {
193 .hwport = 1,
194 .flags = 0,
195 .ucon = UCON,
196 .ulcon = ULCON,
197 .ufcon = UFCON,
198 .clocks = bast_serial_clocks,
Ben Dooksb526bf22005-11-16 15:05:12 +0000199 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 },
201 /* port 2 is not actually used */
202 [2] = {
203 .hwport = 2,
204 .flags = 0,
205 .ucon = UCON,
206 .ulcon = ULCON,
207 .ufcon = UFCON,
208 .clocks = bast_serial_clocks,
Ben Dooksb526bf22005-11-16 15:05:12 +0000209 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 }
211};
212
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213/* NAND Flash on BAST board */
214
Ben Dooks6ddc4b02008-04-16 00:06:14 +0100215#ifdef CONFIG_PM
216static int bast_pm_suspend(struct sys_device *sd, pm_message_t state)
217{
218 /* ensure that an nRESET is not generated on resume. */
Ben Dooks070276d2009-05-17 22:32:23 +0100219 s3c2410_gpio_setpin(S3C2410_GPA(21), 1);
220 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
Ben Dooks6ddc4b02008-04-16 00:06:14 +0100221
222 return 0;
223}
224
225static int bast_pm_resume(struct sys_device *sd)
226{
Ben Dooks070276d2009-05-17 22:32:23 +0100227 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
Ben Dooks6ddc4b02008-04-16 00:06:14 +0100228 return 0;
229}
230
231#else
232#define bast_pm_suspend NULL
233#define bast_pm_resume NULL
234#endif
235
236static struct sysdev_class bast_pm_sysclass = {
Ben Dooks140749e2008-04-19 13:08:43 +0100237 .name = "mach-bast",
Ben Dooks6ddc4b02008-04-16 00:06:14 +0100238 .suspend = bast_pm_suspend,
239 .resume = bast_pm_resume,
240};
241
242static struct sys_device bast_pm_sysdev = {
243 .cls = &bast_pm_sysclass,
244};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245
246static int smartmedia_map[] = { 0 };
247static int chip0_map[] = { 1 };
248static int chip1_map[] = { 2 };
249static int chip2_map[] = { 3 };
250
Ben Dooks9f693d72005-10-12 19:58:07 +0100251static struct mtd_partition bast_default_nand_part[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252 [0] = {
253 .name = "Boot Agent",
254 .size = SZ_16K,
Ben Dooksb526bf22005-11-16 15:05:12 +0000255 .offset = 0,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 },
257 [1] = {
258 .name = "/boot",
259 .size = SZ_4M - SZ_16K,
260 .offset = SZ_16K,
261 },
262 [2] = {
263 .name = "user",
264 .offset = SZ_4M,
265 .size = MTDPART_SIZ_FULL,
266 }
267};
268
269/* the bast has 4 selectable slots for nand-flash, the three
270 * on-board chip areas, as well as the external SmartMedia
271 * slot.
272 *
273 * Note, there is no current hot-plug support for the SmartMedia
274 * socket.
275*/
276
277static struct s3c2410_nand_set bast_nand_sets[] = {
278 [0] = {
279 .name = "SmartMedia",
280 .nr_chips = 1,
281 .nr_map = smartmedia_map,
282 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
Ben Dooksb526bf22005-11-16 15:05:12 +0000283 .partitions = bast_default_nand_part,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284 },
285 [1] = {
286 .name = "chip0",
287 .nr_chips = 1,
288 .nr_map = chip0_map,
289 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
Ben Dooksb526bf22005-11-16 15:05:12 +0000290 .partitions = bast_default_nand_part,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 },
292 [2] = {
293 .name = "chip1",
294 .nr_chips = 1,
295 .nr_map = chip1_map,
296 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
Ben Dooksb526bf22005-11-16 15:05:12 +0000297 .partitions = bast_default_nand_part,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298 },
299 [3] = {
300 .name = "chip2",
301 .nr_chips = 1,
302 .nr_map = chip2_map,
303 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
Ben Dooksb526bf22005-11-16 15:05:12 +0000304 .partitions = bast_default_nand_part,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305 }
306};
307
308static void bast_nand_select(struct s3c2410_nand_set *set, int slot)
309{
310 unsigned int tmp;
311
312 slot = set->nr_map[slot] & 3;
313
314 pr_debug("bast_nand: selecting slot %d (set %p,%p)\n",
315 slot, set, set->nr_map);
316
317 tmp = __raw_readb(BAST_VA_CTRL2);
318 tmp &= BAST_CPLD_CTLR2_IDERST;
319 tmp |= slot;
320 tmp |= BAST_CPLD_CTRL2_WNAND;
321
322 pr_debug("bast_nand: ctrl2 now %02x\n", tmp);
323
324 __raw_writeb(tmp, BAST_VA_CTRL2);
325}
326
327static struct s3c2410_platform_nand bast_nand_info = {
Ben Dooksb048dbf2005-10-20 23:21:19 +0100328 .tacls = 30,
329 .twrph0 = 60,
330 .twrph1 = 60,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 .nr_sets = ARRAY_SIZE(bast_nand_sets),
332 .sets = bast_nand_sets,
333 .select_chip = bast_nand_select,
334};
335
Ben Dooksd97a6662005-06-23 21:56:47 +0100336/* DM9000 */
337
338static struct resource bast_dm9k_resource[] = {
339 [0] = {
340 .start = S3C2410_CS5 + BAST_PA_DM9000,
341 .end = S3C2410_CS5 + BAST_PA_DM9000 + 3,
Ben Dooksb526bf22005-11-16 15:05:12 +0000342 .flags = IORESOURCE_MEM,
Ben Dooksd97a6662005-06-23 21:56:47 +0100343 },
344 [1] = {
345 .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,
346 .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,
Ben Dooksb526bf22005-11-16 15:05:12 +0000347 .flags = IORESOURCE_MEM,
Ben Dooksd97a6662005-06-23 21:56:47 +0100348 },
349 [2] = {
350 .start = IRQ_DM9000,
351 .end = IRQ_DM9000,
Ben Dooks9cf345e2008-07-03 11:24:22 +0100352 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
Ben Dooksd97a6662005-06-23 21:56:47 +0100353 }
354
355};
356
357/* for the moment we limit ourselves to 16bit IO until some
358 * better IO routines can be written and tested
359*/
360
Ben Dooks9f693d72005-10-12 19:58:07 +0100361static struct dm9000_plat_data bast_dm9k_platdata = {
Ben Dooksb526bf22005-11-16 15:05:12 +0000362 .flags = DM9000_PLATF_16BITONLY,
Ben Dooksd97a6662005-06-23 21:56:47 +0100363};
364
365static struct platform_device bast_device_dm9k = {
366 .name = "dm9000",
367 .id = 0,
368 .num_resources = ARRAY_SIZE(bast_dm9k_resource),
369 .resource = bast_dm9k_resource,
370 .dev = {
371 .platform_data = &bast_dm9k_platdata,
372 }
373};
374
Ben Dooks65cc3372005-07-18 10:24:32 +0100375/* serial devices */
376
377#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
378#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
379#define SERIAL_CLK (1843200)
380
381static struct plat_serial8250_port bast_sio_data[] = {
382 [0] = {
383 .mapbase = SERIAL_BASE + 0x2f8,
384 .irq = IRQ_PCSERIAL1,
385 .flags = SERIAL_FLAGS,
386 .iotype = UPIO_MEM,
387 .regshift = 0,
388 .uartclk = SERIAL_CLK,
389 },
390 [1] = {
391 .mapbase = SERIAL_BASE + 0x3f8,
392 .irq = IRQ_PCSERIAL2,
393 .flags = SERIAL_FLAGS,
394 .iotype = UPIO_MEM,
395 .regshift = 0,
396 .uartclk = SERIAL_CLK,
397 },
398 { }
399};
400
401static struct platform_device bast_sio = {
402 .name = "serial8250",
Russell King6df29de2005-09-08 16:04:41 +0100403 .id = PLAT8250_DEV_PLATFORM,
Ben Dooks65cc3372005-07-18 10:24:32 +0100404 .dev = {
405 .platform_data = &bast_sio_data,
406 },
407};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408
Ben Dooks1fcf8442005-08-03 19:49:16 +0100409/* we have devices on the bus which cannot work much over the
410 * standard 100KHz i2c bus frequency
411*/
412
Ben Dooks3e1b7762008-10-31 16:14:40 +0000413static struct s3c2410_platform_i2c __initdata bast_i2c_info = {
Ben Dooks1fcf8442005-08-03 19:49:16 +0100414 .flags = 0,
415 .slave_addr = 0x10,
Daniel Silverstonec564e6a2009-03-13 13:53:46 +0000416 .frequency = 100*1000,
Ben Dooks1fcf8442005-08-03 19:49:16 +0100417};
418
Ben Dooks5ce4b1f2007-07-12 10:44:53 +0100419/* Asix AX88796 10/100 ethernet controller */
420
421static struct ax_plat_data bast_asix_platdata = {
422 .flags = AXFLG_MAC_FROMDEV,
423 .wordlength = 2,
424 .dcr_val = 0x48,
425 .rcr_val = 0x40,
426};
427
428static struct resource bast_asix_resource[] = {
429 [0] = {
430 .start = S3C2410_CS5 + BAST_PA_ASIXNET,
431 .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20) - 1,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),
436 .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),
437 .flags = IORESOURCE_MEM,
438 },
439 [2] = {
440 .start = IRQ_ASIX,
441 .end = IRQ_ASIX,
442 .flags = IORESOURCE_IRQ
443 }
444};
445
446static struct platform_device bast_device_asix = {
447 .name = "ax88796",
448 .id = 0,
449 .num_resources = ARRAY_SIZE(bast_asix_resource),
450 .resource = bast_asix_resource,
451 .dev = {
452 .platform_data = &bast_asix_platdata
453 }
454};
455
456/* Asix AX88796 10/100 ethernet controller parallel port */
457
458static struct resource bast_asixpp_resource[] = {
459 [0] = {
460 .start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20),
461 .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1b * 0x20) - 1,
462 .flags = IORESOURCE_MEM,
463 }
464};
465
466static struct platform_device bast_device_axpp = {
467 .name = "ax88796-pp",
468 .id = 0,
469 .num_resources = ARRAY_SIZE(bast_asixpp_resource),
470 .resource = bast_asixpp_resource,
471};
472
473/* LCD/VGA controller */
Ben Dooks58c8d572005-10-28 15:31:46 +0100474
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700475static struct s3c2410fb_display __initdata bast_lcd_info[] = {
476 {
Krzysztof Helt1f411532007-10-16 01:28:57 -0700477 .type = S3C2410_LCDCON1_TFT,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700478 .width = 640,
479 .height = 480,
Krzysztof Helt5f20f692007-10-16 01:28:59 -0700480
Krzysztof Helt69816692007-10-16 01:29:06 -0700481 .pixclock = 33333,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700482 .xres = 640,
483 .yres = 480,
484 .bpp = 4,
Krzysztof Helt1f411532007-10-16 01:28:57 -0700485 .left_margin = 40,
486 .right_margin = 20,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700487 .hsync_len = 88,
Krzysztof Helt5f20f692007-10-16 01:28:59 -0700488 .upper_margin = 30,
489 .lower_margin = 32,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700490 .vsync_len = 3,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700491
Krzysztof Heltf28ef572007-10-16 01:28:58 -0700492 .lcdcon5 = 0x00014b02,
Ben Dooks58c8d572005-10-28 15:31:46 +0100493 },
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700494 {
Krzysztof Helt1f411532007-10-16 01:28:57 -0700495 .type = S3C2410_LCDCON1_TFT,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700496 .width = 640,
497 .height = 480,
Ben Dooks58c8d572005-10-28 15:31:46 +0100498
Krzysztof Helt69816692007-10-16 01:29:06 -0700499 .pixclock = 33333,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700500 .xres = 640,
501 .yres = 480,
502 .bpp = 8,
Krzysztof Helt1f411532007-10-16 01:28:57 -0700503 .left_margin = 40,
504 .right_margin = 20,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700505 .hsync_len = 88,
Krzysztof Helt5f20f692007-10-16 01:28:59 -0700506 .upper_margin = 30,
507 .lower_margin = 32,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700508 .vsync_len = 3,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700509
Krzysztof Heltf28ef572007-10-16 01:28:58 -0700510 .lcdcon5 = 0x00014b02,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700511 },
512 {
Krzysztof Helt1f411532007-10-16 01:28:57 -0700513 .type = S3C2410_LCDCON1_TFT,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700514 .width = 640,
515 .height = 480,
516
Krzysztof Helt69816692007-10-16 01:29:06 -0700517 .pixclock = 33333,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700518 .xres = 640,
519 .yres = 480,
520 .bpp = 16,
Krzysztof Helt1f411532007-10-16 01:28:57 -0700521 .left_margin = 40,
522 .right_margin = 20,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700523 .hsync_len = 88,
Krzysztof Helt5f20f692007-10-16 01:28:59 -0700524 .upper_margin = 30,
525 .lower_margin = 32,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700526 .vsync_len = 3,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700527
Krzysztof Heltf28ef572007-10-16 01:28:58 -0700528 .lcdcon5 = 0x00014b02,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700529 },
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700530};
531
532/* LCD/VGA controller */
533
534static struct s3c2410fb_mach_info __initdata bast_fb_info = {
535
536 .displays = bast_lcd_info,
537 .num_displays = ARRAY_SIZE(bast_lcd_info),
Ben Dooks9cbae122007-12-23 03:09:38 +0100538 .default_display = 1,
Ben Dooks58c8d572005-10-28 15:31:46 +0100539};
540
Ben Dooks042cf0f2008-07-03 11:24:41 +0100541/* I2C devices fitted. */
542
543static struct i2c_board_info bast_i2c_devs[] __initdata = {
544 {
545 I2C_BOARD_INFO("tlv320aic23", 0x1a),
546 }, {
547 I2C_BOARD_INFO("simtec-pmu", 0x6b),
548 }, {
549 I2C_BOARD_INFO("ch7013", 0x75),
550 },
551};
Ben Dooksb7a12d12008-07-03 11:24:37 +0100552
Ben Dooks885f9eb2009-07-18 10:12:26 +0100553static struct s3c_hwmon_pdata bast_hwmon_info = {
554 /* LCD contrast (0-6.6V) */
555 .in[0] = &(struct s3c_hwmon_chcfg) {
556 .name = "lcd-contrast",
557 .mult = 3300,
558 .div = 512,
559 },
560 /* LED current feedback */
561 .in[1] = &(struct s3c_hwmon_chcfg) {
562 .name = "led-feedback",
563 .mult = 3300,
564 .div = 1024,
565 },
566 /* LCD feedback (0-6.6V) */
567 .in[2] = &(struct s3c_hwmon_chcfg) {
568 .name = "lcd-feedback",
569 .mult = 3300,
570 .div = 512,
571 },
572 /* Vcore (1.8-2.0V), Vref 3.3V */
573 .in[3] = &(struct s3c_hwmon_chcfg) {
574 .name = "vcore",
575 .mult = 3300,
576 .div = 1024,
577 },
578};
579
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580/* Standard BAST devices */
Ben Dooks885f9eb2009-07-18 10:12:26 +0100581// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582
583static struct platform_device *bast_devices[] __initdata = {
584 &s3c_device_usb,
585 &s3c_device_lcd,
586 &s3c_device_wdt,
Ben Dooks3e1b7762008-10-31 16:14:40 +0000587 &s3c_device_i2c0,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 &s3c_device_rtc,
589 &s3c_device_nand,
Ben Dooks885f9eb2009-07-18 10:12:26 +0100590 &s3c_device_adc,
591 &s3c_device_hwmon,
Ben Dooksd97a6662005-06-23 21:56:47 +0100592 &bast_device_dm9k,
Ben Dooks5ce4b1f2007-07-12 10:44:53 +0100593 &bast_device_asix,
594 &bast_device_axpp,
Ben Dooks65cc3372005-07-18 10:24:32 +0100595 &bast_sio,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596};
597
Ben Dooks2bc75092008-07-15 17:17:48 +0100598static struct clk *bast_clocks[] __initdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599 &s3c24xx_dclk0,
600 &s3c24xx_dclk1,
601 &s3c24xx_clkout0,
602 &s3c24xx_clkout1,
603 &s3c24xx_uclk,
604};
605
Ben Dooksca0b4902009-07-30 23:23:39 +0100606static struct s3c_cpufreq_board __initdata bast_cpufreq = {
607 .refresh = 7800, /* 7.8usec */
608 .auto_io = 1,
609 .need_io = 1,
610};
611
Ben Dooks4d3a3462009-11-13 22:34:20 +0000612static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = {
613 .have_mic = 1,
614 .have_lout = 1,
615};
616
Ben Dooks5fe10ab2005-09-20 17:24:33 +0100617static void __init bast_map_io(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618{
619 /* initialise the clocks */
620
Ben Dooksd96a9802008-04-16 00:12:39 +0100621 s3c24xx_dclk0.parent = &clk_upll;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 s3c24xx_dclk0.rate = 12*1000*1000;
623
Ben Dooksd96a9802008-04-16 00:12:39 +0100624 s3c24xx_dclk1.parent = &clk_upll;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625 s3c24xx_dclk1.rate = 24*1000*1000;
626
627 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
628 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
629
630 s3c24xx_uclk.parent = &s3c24xx_clkout1;
631
Ben Dooksce89c202007-04-20 11:15:27 +0100632 s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
633
Linus Torvalds1da177e2005-04-16 15:20:36 -0700634 s3c_device_nand.dev.platform_data = &bast_nand_info;
Ben Dooks885f9eb2009-07-18 10:12:26 +0100635 s3c_device_hwmon.dev.platform_data = &bast_hwmon_info;
Ben Dooks3e1b7762008-10-31 16:14:40 +0000636
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
638 s3c24xx_init_clocks(0);
639 s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640}
641
Ben Dooks58c8d572005-10-28 15:31:46 +0100642static void __init bast_init(void)
643{
Ben Dooks6ddc4b02008-04-16 00:06:14 +0100644 sysdev_class_register(&bast_pm_sysclass);
645 sysdev_register(&bast_pm_sysdev);
646
Ben Dooksa8af6de2009-05-15 14:57:09 +0100647 s3c_i2c0_set_platdata(&bast_i2c_info);
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700648 s3c24xx_fb_set_platdata(&bast_fb_info);
Ben Dooks57e51712007-04-20 11:19:16 +0100649 platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices));
Ben Dooks9d529c62008-07-03 11:24:39 +0100650
Ben Dooks042cf0f2008-07-03 11:24:41 +0100651 i2c_register_board_info(0, bast_i2c_devs,
652 ARRAY_SIZE(bast_i2c_devs));
653
Ben Dooks7a05a2c2009-05-18 20:15:01 +0100654 usb_simtec_init();
Ben Dooks9d529c62008-07-03 11:24:39 +0100655 nor_simtec_init();
Ben Dooks4d3a3462009-11-13 22:34:20 +0000656 simtec_audio_add(NULL, true, &bast_audio);
Ben Dooksca0b4902009-07-30 23:23:39 +0100657
658 s3c_cpufreq_setboard(&bast_cpufreq);
Ben Dooks58c8d572005-10-28 15:31:46 +0100659}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660
661MACHINE_START(BAST, "Simtec-BAST")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100662 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
Russell Kinge9dea0c2005-07-03 17:38:58 +0100663 .phys_io = S3C2410_PA_UART,
664 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
665 .boot_params = S3C2410_SDRAM_PA + 0x100,
Ben Dooksf705b1a2005-06-29 11:09:15 +0100666 .map_io = bast_map_io,
667 .init_irq = s3c24xx_init_irq,
Ben Dooks58c8d572005-10-28 15:31:46 +0100668 .init_machine = bast_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669 .timer = &s3c24xx_timer,
670MACHINE_END