blob: 1ec62444e32e0c90b2a014969f7e9af78269a754 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
David Howells760285e2012-10-02 18:01:07 +010028#include <drm/drmP.h>
29#include <drm/radeon_drm.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020030#include "radeon.h"
31
Jerome Glisse771fe6b2009-06-05 14:42:42 +020032void radeon_gem_object_free(struct drm_gem_object *gobj)
33{
Daniel Vetter7e4d15d2011-02-18 17:59:17 +010034 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020035
Jerome Glisse771fe6b2009-06-05 14:42:42 +020036 if (robj) {
Alex Deucher40f5cf92012-05-10 18:33:13 -040037 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
Jerome Glisse4c788672009-11-20 14:29:23 +010039 radeon_bo_unref(&robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020040 }
41}
42
43int radeon_gem_object_create(struct radeon_device *rdev, int size,
Jerome Glisse4c788672009-11-20 14:29:23 +010044 int alignment, int initial_domain,
Michel Dänzer02376d82014-07-17 19:01:08 +090045 u32 flags, bool discardable, bool kernel,
Jerome Glisse4c788672009-11-20 14:29:23 +010046 struct drm_gem_object **obj)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020047{
Jerome Glisse4c788672009-11-20 14:29:23 +010048 struct radeon_bo *robj;
Christian König6c0d1122012-10-23 15:53:18 +020049 unsigned long max_size;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020050 int r;
51
52 *obj = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020053 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
56 }
Christian König6c0d1122012-10-23 15:53:18 +020057
58 /* maximun bo size is the minimun btw visible vram and gtt size */
59 max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
60 if (size > max_size) {
Michel Dänzer380670a2014-07-16 18:40:32 +090061 DRM_DEBUG("Allocation size %dMb bigger than %ldMb limit\n",
62 size >> 20, max_size >> 20);
Christian König6c0d1122012-10-23 15:53:18 +020063 return -ENOMEM;
64 }
65
Christian König0fe71582012-10-23 15:53:19 +020066retry:
Michel Dänzer02376d82014-07-17 19:01:08 +090067 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
68 flags, NULL, &robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020069 if (r) {
Christian König0fe71582012-10-23 15:53:19 +020070 if (r != -ERESTARTSYS) {
71 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
72 initial_domain |= RADEON_GEM_DOMAIN_GTT;
73 goto retry;
74 }
Dave Airlieecabd322009-12-15 10:39:48 +100075 DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
76 size, initial_domain, alignment, r);
Christian König0fe71582012-10-23 15:53:19 +020077 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +020078 return r;
79 }
Daniel Vetter441921d2011-02-18 17:59:16 +010080 *obj = &robj->gem_base;
Jerome Glisse409851f2013-04-25 22:29:27 -040081 robj->pid = task_pid_nr(current);
Daniel Vetter441921d2011-02-18 17:59:16 +010082
83 mutex_lock(&rdev->gem.mutex);
84 list_add_tail(&robj->list, &rdev->gem.objects);
85 mutex_unlock(&rdev->gem.mutex);
86
Jerome Glisse771fe6b2009-06-05 14:42:42 +020087 return 0;
88}
89
Rashika Kheria248a6c42014-01-06 20:58:45 +053090static int radeon_gem_set_domain(struct drm_gem_object *gobj,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020091 uint32_t rdomain, uint32_t wdomain)
92{
Jerome Glisse4c788672009-11-20 14:29:23 +010093 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020094 uint32_t domain;
95 int r;
96
97 /* FIXME: reeimplement */
Daniel Vetter7e4d15d2011-02-18 17:59:17 +010098 robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020099 /* work out where to validate the buffer to */
100 domain = wdomain;
101 if (!domain) {
102 domain = rdomain;
103 }
104 if (!domain) {
105 /* Do nothings */
Masanari Iidab6cafa22012-02-27 23:28:38 +0900106 printk(KERN_WARNING "Set domain without domain !\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200107 return 0;
108 }
109 if (domain == RADEON_GEM_DOMAIN_CPU) {
110 /* Asking for cpu access wait for object idle */
Jerome Glisse4c788672009-11-20 14:29:23 +0100111 r = radeon_bo_wait(robj, NULL, false);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200112 if (r) {
113 printk(KERN_ERR "Failed to wait for object !\n");
114 return r;
115 }
116 }
117 return 0;
118}
119
120int radeon_gem_init(struct radeon_device *rdev)
121{
122 INIT_LIST_HEAD(&rdev->gem.objects);
123 return 0;
124}
125
126void radeon_gem_fini(struct radeon_device *rdev)
127{
Jerome Glisse4c788672009-11-20 14:29:23 +0100128 radeon_bo_force_delete(rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200129}
130
Jerome Glisse721604a2012-01-05 22:11:05 -0500131/*
132 * Call from drm_gem_handle_create which appear in both new and open ioctl
133 * case.
134 */
135int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
136{
Christian Könige971bd52012-09-11 16:10:04 +0200137 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
138 struct radeon_device *rdev = rbo->rdev;
139 struct radeon_fpriv *fpriv = file_priv->driver_priv;
140 struct radeon_vm *vm = &fpriv->vm;
141 struct radeon_bo_va *bo_va;
142 int r;
143
144 if (rdev->family < CHIP_CAYMAN) {
145 return 0;
146 }
147
148 r = radeon_bo_reserve(rbo, false);
149 if (r) {
150 return r;
151 }
152
153 bo_va = radeon_vm_bo_find(vm, rbo);
154 if (!bo_va) {
155 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
156 } else {
157 ++bo_va->ref_count;
158 }
159 radeon_bo_unreserve(rbo);
160
Jerome Glisse721604a2012-01-05 22:11:05 -0500161 return 0;
162}
163
164void radeon_gem_object_close(struct drm_gem_object *obj,
165 struct drm_file *file_priv)
166{
167 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
168 struct radeon_device *rdev = rbo->rdev;
169 struct radeon_fpriv *fpriv = file_priv->driver_priv;
170 struct radeon_vm *vm = &fpriv->vm;
Christian Könige971bd52012-09-11 16:10:04 +0200171 struct radeon_bo_va *bo_va;
Christian Königd59f7022012-09-11 16:10:02 +0200172 int r;
Jerome Glisse721604a2012-01-05 22:11:05 -0500173
174 if (rdev->family < CHIP_CAYMAN) {
175 return;
176 }
177
Christian Königd59f7022012-09-11 16:10:02 +0200178 r = radeon_bo_reserve(rbo, true);
179 if (r) {
180 dev_err(rdev->dev, "leaking bo va because "
181 "we fail to reserve bo (%d)\n", r);
Jerome Glisse721604a2012-01-05 22:11:05 -0500182 return;
183 }
Christian Könige971bd52012-09-11 16:10:04 +0200184 bo_va = radeon_vm_bo_find(vm, rbo);
185 if (bo_va) {
186 if (--bo_va->ref_count == 0) {
187 radeon_vm_bo_rmv(rdev, bo_va);
188 }
189 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500190 radeon_bo_unreserve(rbo);
191}
192
Christian König6c6f4782012-05-02 15:11:19 +0200193static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
194{
195 if (r == -EDEADLK) {
Christian König6c6f4782012-05-02 15:11:19 +0200196 r = radeon_gpu_reset(rdev);
197 if (!r)
198 r = -EAGAIN;
Christian König6c6f4782012-05-02 15:11:19 +0200199 }
200 return r;
201}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200202
203/*
204 * GEM ioctls.
205 */
206int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
207 struct drm_file *filp)
208{
209 struct radeon_device *rdev = dev->dev_private;
210 struct drm_radeon_gem_info *args = data;
Dave Airlie53595332011-03-14 09:47:24 +1000211 struct ttm_mem_type_manager *man;
212
213 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200214
Dave Airlie7a50f012009-07-21 20:39:30 +1000215 args->vram_size = rdev->mc.real_vram_size;
Dave Airlie53595332011-03-14 09:47:24 +1000216 args->vram_visible = (u64)man->size << PAGE_SHIFT;
Alex Deucherccbe0062014-07-17 12:16:20 -0400217 args->vram_visible -= rdev->vram_pin_size;
218 args->gart_size = rdev->mc.gtt_size;
219 args->gart_size -= rdev->gart_pin_size;
220
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200221 return 0;
222}
223
224int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
225 struct drm_file *filp)
226{
227 /* TODO: implement */
228 DRM_ERROR("unimplemented %s\n", __func__);
229 return -ENOSYS;
230}
231
232int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
233 struct drm_file *filp)
234{
235 /* TODO: implement */
236 DRM_ERROR("unimplemented %s\n", __func__);
237 return -ENOSYS;
238}
239
240int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
241 struct drm_file *filp)
242{
243 struct radeon_device *rdev = dev->dev_private;
244 struct drm_radeon_gem_create *args = data;
245 struct drm_gem_object *gobj;
246 uint32_t handle;
247 int r;
248
Jerome Glissedee53e72012-07-02 12:45:19 -0400249 down_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200250 /* create a gem object to contain this object in */
251 args->size = roundup(args->size, PAGE_SIZE);
252 r = radeon_gem_object_create(rdev, args->size, args->alignment,
Michel Dänzer02376d82014-07-17 19:01:08 +0900253 args->initial_domain, args->flags,
254 false, false, &gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200255 if (r) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400256 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200257 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200258 return r;
259 }
260 r = drm_gem_handle_create(filp, gobj, &handle);
Dave Airlie29d08b32010-09-27 16:17:17 +1000261 /* drop reference from allocate - handle holds it now */
262 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200263 if (r) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400264 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200265 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200266 return r;
267 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200268 args->handle = handle;
Jerome Glissedee53e72012-07-02 12:45:19 -0400269 up_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200270 return 0;
271}
272
273int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
274 struct drm_file *filp)
275{
276 /* transition the BO to a domain -
277 * just validate the BO into a certain domain */
Jerome Glissedee53e72012-07-02 12:45:19 -0400278 struct radeon_device *rdev = dev->dev_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200279 struct drm_radeon_gem_set_domain *args = data;
280 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100281 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200282 int r;
283
284 /* for now if someone requests domain CPU -
285 * just make sure the buffer is finished with */
Jerome Glissedee53e72012-07-02 12:45:19 -0400286 down_read(&rdev->exclusive_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200287
288 /* just do a BO wait for now */
289 gobj = drm_gem_object_lookup(dev, filp, args->handle);
290 if (gobj == NULL) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400291 up_read(&rdev->exclusive_lock);
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100292 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200293 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100294 robj = gem_to_radeon_bo(gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200295
296 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
297
Luca Barbieribc9025b2010-02-09 05:49:12 +0000298 drm_gem_object_unreference_unlocked(gobj);
Jerome Glissedee53e72012-07-02 12:45:19 -0400299 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200300 r = radeon_gem_handle_lockup(robj->rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200301 return r;
302}
303
Dave Airlieff72145b2011-02-07 12:16:14 +1000304int radeon_mode_dumb_mmap(struct drm_file *filp,
305 struct drm_device *dev,
306 uint32_t handle, uint64_t *offset_p)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200307{
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200308 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100309 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200310
Dave Airlieff72145b2011-02-07 12:16:14 +1000311 gobj = drm_gem_object_lookup(dev, filp, handle);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200312 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100313 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200314 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100315 robj = gem_to_radeon_bo(gobj);
Dave Airlieff72145b2011-02-07 12:16:14 +1000316 *offset_p = radeon_bo_mmap_offset(robj);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000317 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100318 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200319}
320
Dave Airlieff72145b2011-02-07 12:16:14 +1000321int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
322 struct drm_file *filp)
323{
324 struct drm_radeon_gem_mmap *args = data;
325
326 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
327}
328
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200329int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
330 struct drm_file *filp)
331{
Jerome Glisse1ef53252012-07-02 12:40:54 -0400332 struct radeon_device *rdev = dev->dev_private;
Dave Airliecefb87e2009-08-16 21:05:45 +1000333 struct drm_radeon_gem_busy *args = data;
334 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100335 struct radeon_bo *robj;
Dave Airliecefb87e2009-08-16 21:05:45 +1000336 int r;
Dave Airlie4361e522009-12-10 15:59:32 +1000337 uint32_t cur_placement = 0;
Dave Airliecefb87e2009-08-16 21:05:45 +1000338
339 gobj = drm_gem_object_lookup(dev, filp, args->handle);
340 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100341 return -ENOENT;
Dave Airliecefb87e2009-08-16 21:05:45 +1000342 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100343 robj = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100344 r = radeon_bo_wait(robj, &cur_placement, true);
Marek Olšák0bc490a2014-03-02 00:56:19 +0100345 args->domain = radeon_mem_type_to_domain(cur_placement);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000346 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse1ef53252012-07-02 12:40:54 -0400347 r = radeon_gem_handle_lockup(rdev, r);
Dave Airliee3b24152009-08-21 09:47:45 +1000348 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200349}
350
351int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
352 struct drm_file *filp)
353{
Jerome Glisse1ef53252012-07-02 12:40:54 -0400354 struct radeon_device *rdev = dev->dev_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200355 struct drm_radeon_gem_wait_idle *args = data;
356 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100357 struct radeon_bo *robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200358 int r;
359
360 gobj = drm_gem_object_lookup(dev, filp, args->handle);
361 if (gobj == NULL) {
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100362 return -ENOENT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200363 }
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100364 robj = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100365 r = radeon_bo_wait(robj, NULL, false);
Jerome Glisse062b3892010-02-04 20:36:39 +0100366 /* callback hw specific functions if any */
Jerome Glisse1ef53252012-07-02 12:40:54 -0400367 if (rdev->asic->ioctl_wait_idle)
368 robj->rdev->asic->ioctl_wait_idle(rdev, robj);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000369 drm_gem_object_unreference_unlocked(gobj);
Jerome Glisse1ef53252012-07-02 12:40:54 -0400370 r = radeon_gem_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200371 return r;
372}
Dave Airliee024e112009-06-24 09:48:08 +1000373
374int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
375 struct drm_file *filp)
376{
377 struct drm_radeon_gem_set_tiling *args = data;
378 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100379 struct radeon_bo *robj;
Dave Airliee024e112009-06-24 09:48:08 +1000380 int r = 0;
381
382 DRM_DEBUG("%d \n", args->handle);
383 gobj = drm_gem_object_lookup(dev, filp, args->handle);
384 if (gobj == NULL)
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100385 return -ENOENT;
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100386 robj = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100387 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
Luca Barbieribc9025b2010-02-09 05:49:12 +0000388 drm_gem_object_unreference_unlocked(gobj);
Dave Airliee024e112009-06-24 09:48:08 +1000389 return r;
390}
391
392int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
393 struct drm_file *filp)
394{
395 struct drm_radeon_gem_get_tiling *args = data;
396 struct drm_gem_object *gobj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100397 struct radeon_bo *rbo;
Dave Airliee024e112009-06-24 09:48:08 +1000398 int r = 0;
399
400 DRM_DEBUG("\n");
401 gobj = drm_gem_object_lookup(dev, filp, args->handle);
402 if (gobj == NULL)
Chris Wilsonbf79cb92010-08-04 14:19:46 +0100403 return -ENOENT;
Daniel Vetter7e4d15d2011-02-18 17:59:17 +0100404 rbo = gem_to_radeon_bo(gobj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100405 r = radeon_bo_reserve(rbo, false);
406 if (unlikely(r != 0))
Dave Airlie51f07b72009-12-16 13:10:43 +1000407 goto out;
Jerome Glisse4c788672009-11-20 14:29:23 +0100408 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
409 radeon_bo_unreserve(rbo);
Dave Airlie51f07b72009-12-16 13:10:43 +1000410out:
Luca Barbieribc9025b2010-02-09 05:49:12 +0000411 drm_gem_object_unreference_unlocked(gobj);
Dave Airliee024e112009-06-24 09:48:08 +1000412 return r;
413}
Dave Airlieff72145b2011-02-07 12:16:14 +1000414
Jerome Glisse721604a2012-01-05 22:11:05 -0500415int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
416 struct drm_file *filp)
417{
418 struct drm_radeon_gem_va *args = data;
419 struct drm_gem_object *gobj;
420 struct radeon_device *rdev = dev->dev_private;
421 struct radeon_fpriv *fpriv = filp->driver_priv;
422 struct radeon_bo *rbo;
423 struct radeon_bo_va *bo_va;
424 u32 invalid_flags;
425 int r = 0;
426
Alex Deucher67e915e2012-01-06 09:38:15 -0500427 if (!rdev->vm_manager.enabled) {
428 args->operation = RADEON_VA_RESULT_ERROR;
429 return -ENOTTY;
430 }
431
Jerome Glisse721604a2012-01-05 22:11:05 -0500432 /* !! DONT REMOVE !!
433 * We don't support vm_id yet, to be sure we don't have have broken
434 * userspace, reject anyone trying to use non 0 value thus moving
435 * forward we can use those fields without breaking existant userspace
436 */
437 if (args->vm_id) {
438 args->operation = RADEON_VA_RESULT_ERROR;
439 return -EINVAL;
440 }
441
442 if (args->offset < RADEON_VA_RESERVED_SIZE) {
443 dev_err(&dev->pdev->dev,
444 "offset 0x%lX is in reserved area 0x%X\n",
445 (unsigned long)args->offset,
446 RADEON_VA_RESERVED_SIZE);
447 args->operation = RADEON_VA_RESULT_ERROR;
448 return -EINVAL;
449 }
450
451 /* don't remove, we need to enforce userspace to set the snooped flag
452 * otherwise we will endup with broken userspace and we won't be able
453 * to enable this feature without adding new interface
454 */
455 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
456 if ((args->flags & invalid_flags)) {
457 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
458 args->flags, invalid_flags);
459 args->operation = RADEON_VA_RESULT_ERROR;
460 return -EINVAL;
461 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500462
463 switch (args->operation) {
464 case RADEON_VA_MAP:
465 case RADEON_VA_UNMAP:
466 break;
467 default:
468 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
469 args->operation);
470 args->operation = RADEON_VA_RESULT_ERROR;
471 return -EINVAL;
472 }
473
474 gobj = drm_gem_object_lookup(dev, filp, args->handle);
475 if (gobj == NULL) {
476 args->operation = RADEON_VA_RESULT_ERROR;
477 return -ENOENT;
478 }
479 rbo = gem_to_radeon_bo(gobj);
480 r = radeon_bo_reserve(rbo, false);
481 if (r) {
482 args->operation = RADEON_VA_RESULT_ERROR;
483 drm_gem_object_unreference_unlocked(gobj);
484 return r;
485 }
Christian Könige971bd52012-09-11 16:10:04 +0200486 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
487 if (!bo_va) {
488 args->operation = RADEON_VA_RESULT_ERROR;
489 drm_gem_object_unreference_unlocked(gobj);
490 return -ENOENT;
491 }
492
Jerome Glisse721604a2012-01-05 22:11:05 -0500493 switch (args->operation) {
494 case RADEON_VA_MAP:
Christian Könige971bd52012-09-11 16:10:04 +0200495 if (bo_va->soffset) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500496 args->operation = RADEON_VA_RESULT_VA_EXIST;
497 args->offset = bo_va->soffset;
498 goto out;
499 }
Christian Könige971bd52012-09-11 16:10:04 +0200500 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
Jerome Glisse721604a2012-01-05 22:11:05 -0500501 break;
502 case RADEON_VA_UNMAP:
Christian Könige971bd52012-09-11 16:10:04 +0200503 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
Jerome Glisse721604a2012-01-05 22:11:05 -0500504 break;
505 default:
506 break;
507 }
508 args->operation = RADEON_VA_RESULT_OK;
509 if (r) {
510 args->operation = RADEON_VA_RESULT_ERROR;
511 }
512out:
513 radeon_bo_unreserve(rbo);
514 drm_gem_object_unreference_unlocked(gobj);
515 return r;
516}
517
Marek Olšákbda72d52014-03-02 00:56:17 +0100518int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
519 struct drm_file *filp)
520{
521 struct drm_radeon_gem_op *args = data;
522 struct drm_gem_object *gobj;
523 struct radeon_bo *robj;
524 int r;
525
526 gobj = drm_gem_object_lookup(dev, filp, args->handle);
527 if (gobj == NULL) {
528 return -ENOENT;
529 }
530 robj = gem_to_radeon_bo(gobj);
531 r = radeon_bo_reserve(robj, false);
532 if (unlikely(r))
533 goto out;
534
535 switch (args->op) {
536 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
537 args->value = robj->initial_domain;
538 break;
539 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
540 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
541 RADEON_GEM_DOMAIN_GTT |
542 RADEON_GEM_DOMAIN_CPU);
543 break;
544 default:
545 r = -EINVAL;
546 }
547
548 radeon_bo_unreserve(robj);
549out:
550 drm_gem_object_unreference_unlocked(gobj);
551 return r;
552}
553
Dave Airlieff72145b2011-02-07 12:16:14 +1000554int radeon_mode_dumb_create(struct drm_file *file_priv,
555 struct drm_device *dev,
556 struct drm_mode_create_dumb *args)
557{
558 struct radeon_device *rdev = dev->dev_private;
559 struct drm_gem_object *gobj;
Dave Airliec87a8d82011-03-17 13:58:34 +1000560 uint32_t handle;
Dave Airlieff72145b2011-02-07 12:16:14 +1000561 int r;
562
563 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
564 args->size = args->pitch * args->height;
565 args->size = ALIGN(args->size, PAGE_SIZE);
566
567 r = radeon_gem_object_create(rdev, args->size, 0,
Michel Dänzer02376d82014-07-17 19:01:08 +0900568 RADEON_GEM_DOMAIN_VRAM, 0,
Dave Airlieff72145b2011-02-07 12:16:14 +1000569 false, ttm_bo_type_device,
570 &gobj);
571 if (r)
572 return -ENOMEM;
573
Dave Airliec87a8d82011-03-17 13:58:34 +1000574 r = drm_gem_handle_create(file_priv, gobj, &handle);
575 /* drop reference from allocate - handle holds it now */
576 drm_gem_object_unreference_unlocked(gobj);
Dave Airlieff72145b2011-02-07 12:16:14 +1000577 if (r) {
Dave Airlieff72145b2011-02-07 12:16:14 +1000578 return r;
579 }
Dave Airliec87a8d82011-03-17 13:58:34 +1000580 args->handle = handle;
Dave Airlieff72145b2011-02-07 12:16:14 +1000581 return 0;
582}
583
Jerome Glisse409851f2013-04-25 22:29:27 -0400584#if defined(CONFIG_DEBUG_FS)
585static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
586{
587 struct drm_info_node *node = (struct drm_info_node *)m->private;
588 struct drm_device *dev = node->minor->dev;
589 struct radeon_device *rdev = dev->dev_private;
590 struct radeon_bo *rbo;
591 unsigned i = 0;
592
593 mutex_lock(&rdev->gem.mutex);
594 list_for_each_entry(rbo, &rdev->gem.objects, list) {
595 unsigned domain;
596 const char *placement;
597
598 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
599 switch (domain) {
600 case RADEON_GEM_DOMAIN_VRAM:
601 placement = "VRAM";
602 break;
603 case RADEON_GEM_DOMAIN_GTT:
604 placement = " GTT";
605 break;
606 case RADEON_GEM_DOMAIN_CPU:
607 default:
608 placement = " CPU";
609 break;
610 }
611 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
612 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
613 placement, (unsigned long)rbo->pid);
614 i++;
615 }
616 mutex_unlock(&rdev->gem.mutex);
617 return 0;
618}
619
620static struct drm_info_list radeon_debugfs_gem_list[] = {
621 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
622};
623#endif
624
625int radeon_gem_debugfs_init(struct radeon_device *rdev)
626{
627#if defined(CONFIG_DEBUG_FS)
628 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
629#endif
630 return 0;
631}