blob: 5bf4b2b7112689a8ddffbdb269258c279e07c512 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchart2d278f52015-03-05 21:31:37 +020020#include <drm/drm_crtc_helper.h>
21#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060022
Andy Gross5c137792012-03-05 10:48:39 -060023#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020024#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060025
26#define DRIVER_NAME MODULE_NAME
27#define DRIVER_DESC "OMAP DRM"
28#define DRIVER_DATE "20110917"
29#define DRIVER_MAJOR 1
30#define DRIVER_MINOR 0
31#define DRIVER_PATCHLEVEL 0
32
Rob Clarkcd5351f2011-11-12 12:09:40 -060033static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
34
35MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36module_param(num_crtc, int, 0600);
37
38/*
39 * mode config funcs
40 */
41
42/* Notes about mapping DSS and DRM entities:
43 * CRTC: overlay
44 * encoder: manager.. with some extension to allow one primary CRTC
45 * and zero or more video CRTC's to be mapped to one encoder?
46 * connector: dssdev.. manager can be attached/detached from different
47 * devices
48 */
49
50static void omap_fb_output_poll_changed(struct drm_device *dev)
51{
52 struct omap_drm_private *priv = dev->dev_private;
53 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090054 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060055 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060056}
57
Laurent Pincharte6ecefa2012-05-17 13:27:23 +020058static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -060059 .fb_create = omap_framebuffer_create,
60 .output_poll_changed = omap_fb_output_poll_changed,
61};
62
63static int get_connector_type(struct omap_dss_device *dssdev)
64{
65 switch (dssdev->type) {
66 case OMAP_DISPLAY_TYPE_HDMI:
67 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +030068 case OMAP_DISPLAY_TYPE_DVI:
69 return DRM_MODE_CONNECTOR_DVID;
Rob Clarkcd5351f2011-11-12 12:09:40 -060070 default:
71 return DRM_MODE_CONNECTOR_Unknown;
72 }
73}
74
Archit Taneja0d8f3712013-03-26 19:15:19 +053075static bool channel_used(struct drm_device *dev, enum omap_channel channel)
76{
77 struct omap_drm_private *priv = dev->dev_private;
78 int i;
79
80 for (i = 0; i < priv->num_crtcs; i++) {
81 struct drm_crtc *crtc = priv->crtcs[i];
82
83 if (omap_crtc_channel(crtc) == channel)
84 return true;
85 }
86
87 return false;
88}
Archit Tanejacc823bd2014-01-02 14:49:52 +053089static void omap_disconnect_dssdevs(void)
90{
91 struct omap_dss_device *dssdev = NULL;
92
93 for_each_dss_dev(dssdev)
94 dssdev->driver->disconnect(dssdev);
95}
Archit Taneja0d8f3712013-03-26 19:15:19 +053096
Archit Taneja3a01ab22014-01-02 14:49:51 +053097static int omap_connect_dssdevs(void)
98{
99 int r;
100 struct omap_dss_device *dssdev = NULL;
101 bool no_displays = true;
102
103 for_each_dss_dev(dssdev) {
104 r = dssdev->driver->connect(dssdev);
105 if (r == -EPROBE_DEFER) {
106 omap_dss_put_device(dssdev);
107 goto cleanup;
108 } else if (r) {
109 dev_warn(dssdev->dev, "could not connect display: %s\n",
110 dssdev->name);
111 } else {
112 no_displays = false;
113 }
114 }
115
116 if (no_displays)
117 return -EPROBE_DEFER;
118
119 return 0;
120
121cleanup:
122 /*
123 * if we are deferring probe, we disconnect the devices we previously
124 * connected
125 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530126 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530127
128 return r;
129}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600130
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200131static int omap_modeset_create_crtc(struct drm_device *dev, int id,
132 enum omap_channel channel)
133{
134 struct omap_drm_private *priv = dev->dev_private;
135 struct drm_plane *plane;
136 struct drm_crtc *crtc;
137
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200138 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200139 if (IS_ERR(plane))
140 return PTR_ERR(plane);
141
142 crtc = omap_crtc_init(dev, plane, channel, id);
143
144 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
145 priv->crtcs[id] = crtc;
146 priv->num_crtcs++;
147
148 priv->planes[id] = plane;
149 priv->num_planes++;
150
151 return 0;
152}
153
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200154static int omap_modeset_init_properties(struct drm_device *dev)
155{
156 struct omap_drm_private *priv = dev->dev_private;
157
158 if (priv->has_dmm) {
159 dev->mode_config.rotation_property =
160 drm_mode_create_rotation_property(dev,
161 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
162 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
163 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
164 if (!dev->mode_config.rotation_property)
165 return -ENOMEM;
166 }
167
168 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
169 if (!priv->zorder_prop)
170 return -ENOMEM;
171
172 return 0;
173}
174
Rob Clarkcd5351f2011-11-12 12:09:40 -0600175static int omap_modeset_init(struct drm_device *dev)
176{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600177 struct omap_drm_private *priv = dev->dev_private;
178 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600179 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530180 int num_mgrs = dss_feat_get_num_mgrs();
181 int num_crtcs;
182 int i, id = 0;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200183 int ret;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300184
Rob Clarkcd5351f2011-11-12 12:09:40 -0600185 drm_mode_config_init(dev);
186
Rob Clarkf5f94542012-12-04 13:59:12 -0600187 omap_drm_irq_install(dev);
Andy Gross71e88312011-12-05 19:19:21 -0600188
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200189 ret = omap_modeset_init_properties(dev);
190 if (ret < 0)
191 return ret;
192
Rob Clarkf5f94542012-12-04 13:59:12 -0600193 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530194 * We usually don't want to create a CRTC for each manager, at least
195 * not until we have a way to expose private planes to userspace.
196 * Otherwise there would not be enough video pipes left for drm planes.
197 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600198 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530199 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600200
Archit Taneja0d8f3712013-03-26 19:15:19 +0530201 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600202
Rob Clarkf5f94542012-12-04 13:59:12 -0600203 for_each_dss_dev(dssdev) {
204 struct drm_connector *connector;
205 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530206 enum omap_channel channel;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300207 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -0600208
Archit Taneja3a01ab22014-01-02 14:49:51 +0530209 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530210 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300211
Rob Clarkf5f94542012-12-04 13:59:12 -0600212 encoder = omap_encoder_init(dev, dssdev);
213
214 if (!encoder) {
215 dev_err(dev->dev, "could not create encoder: %s\n",
216 dssdev->name);
217 return -ENOMEM;
218 }
219
220 connector = omap_connector_init(dev,
221 get_connector_type(dssdev), dssdev, encoder);
222
223 if (!connector) {
224 dev_err(dev->dev, "could not create connector: %s\n",
225 dssdev->name);
226 return -ENOMEM;
227 }
228
229 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
230 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
231
232 priv->encoders[priv->num_encoders++] = encoder;
233 priv->connectors[priv->num_connectors++] = connector;
234
235 drm_mode_connector_attach_encoder(connector, encoder);
236
Archit Taneja0d8f3712013-03-26 19:15:19 +0530237 /*
238 * if we have reached the limit of the crtcs we are allowed to
239 * create, let's not try to look for a crtc for this
240 * panel/encoder and onwards, we will, of course, populate the
241 * the possible_crtcs field for all the encoders with the final
242 * set of crtcs we create
243 */
244 if (id == num_crtcs)
245 continue;
246
247 /*
248 * get the recommended DISPC channel for this encoder. For now,
249 * we only try to get create a crtc out of the recommended, the
250 * other possible channels to which the encoder can connect are
251 * not considered.
252 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530253
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300254 mgr = omapdss_find_mgr_from_display(dssdev);
255 channel = mgr->id;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530256 /*
257 * if this channel hasn't already been taken by a previously
258 * allocated crtc, we create a new crtc for it
259 */
260 if (!channel_used(dev, channel)) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200261 ret = omap_modeset_create_crtc(dev, id, channel);
262 if (ret < 0) {
263 dev_err(dev->dev,
264 "could not create CRTC (channel %u)\n",
265 channel);
266 return ret;
267 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530268
269 id++;
270 }
271 }
272
273 /*
274 * we have allocated crtcs according to the need of the panels/encoders,
275 * adding more crtcs here if needed
276 */
277 for (; id < num_crtcs; id++) {
278
279 /* find a free manager for this crtc */
280 for (i = 0; i < num_mgrs; i++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200281 if (!channel_used(dev, i))
Archit Taneja0d8f3712013-03-26 19:15:19 +0530282 break;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530283 }
284
285 if (i == num_mgrs) {
286 /* this shouldn't really happen */
287 dev_err(dev->dev, "no managers left for crtc\n");
288 return -ENOMEM;
289 }
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200290
291 ret = omap_modeset_create_crtc(dev, id, i);
292 if (ret < 0) {
293 dev_err(dev->dev,
294 "could not create CRTC (channel %u)\n", i);
295 return ret;
296 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530297 }
298
299 /*
300 * Create normal planes for the remaining overlays:
301 */
302 for (; id < num_ovls; id++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200303 struct drm_plane *plane;
304
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200305 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200306 if (IS_ERR(plane))
307 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530308
309 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
310 priv->planes[priv->num_planes++] = plane;
311 }
312
313 for (i = 0; i < priv->num_encoders; i++) {
314 struct drm_encoder *encoder = priv->encoders[i];
315 struct omap_dss_device *dssdev =
316 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300317 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300318
319 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530320
Rob Clarkf5f94542012-12-04 13:59:12 -0600321 /* figure out which crtc's we can connect the encoder to: */
322 encoder->possible_crtcs = 0;
323 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530324 struct drm_crtc *crtc = priv->crtcs[id];
325 enum omap_channel crtc_channel;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530326
327 crtc_channel = omap_crtc_channel(crtc);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530328
Tomi Valkeinen17337292014-09-03 19:25:49 +0000329 if (output->dispc_channel == crtc_channel) {
Rob Clarkf5f94542012-12-04 13:59:12 -0600330 encoder->possible_crtcs |= (1 << id);
Tomi Valkeinen17337292014-09-03 19:25:49 +0000331 break;
332 }
Rob Clarkf5f94542012-12-04 13:59:12 -0600333 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300334
335 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600336 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600337
Archit Taneja0d8f3712013-03-26 19:15:19 +0530338 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
339 priv->num_planes, priv->num_crtcs, priv->num_encoders,
340 priv->num_connectors);
341
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600342 dev->mode_config.min_width = 32;
343 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600344
345 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
346 * to fill in these limits properly on different OMAP generations..
347 */
348 dev->mode_config.max_width = 2048;
349 dev->mode_config.max_height = 2048;
350
351 dev->mode_config.funcs = &omap_mode_config_funcs;
352
Laurent Pinchart69a12262015-03-05 21:38:16 +0200353 drm_mode_config_reset(dev);
354
Rob Clarkcd5351f2011-11-12 12:09:40 -0600355 return 0;
356}
357
358static void omap_modeset_free(struct drm_device *dev)
359{
360 drm_mode_config_cleanup(dev);
361}
362
363/*
364 * drm ioctl funcs
365 */
366
367
368static int ioctl_get_param(struct drm_device *dev, void *data,
369 struct drm_file *file_priv)
370{
Rob Clark5e3b0872012-10-29 09:31:12 +0100371 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600372 struct drm_omap_param *args = data;
373
374 DBG("%p: param=%llu", dev, args->param);
375
376 switch (args->param) {
377 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100378 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600379 break;
380 default:
381 DBG("unknown parameter %lld", args->param);
382 return -EINVAL;
383 }
384
385 return 0;
386}
387
388static int ioctl_set_param(struct drm_device *dev, void *data,
389 struct drm_file *file_priv)
390{
391 struct drm_omap_param *args = data;
392
393 switch (args->param) {
394 default:
395 DBG("unknown parameter %lld", args->param);
396 return -EINVAL;
397 }
398
399 return 0;
400}
401
402static int ioctl_gem_new(struct drm_device *dev, void *data,
403 struct drm_file *file_priv)
404{
405 struct drm_omap_gem_new *args = data;
Rob Clarkf5f94542012-12-04 13:59:12 -0600406 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600407 args->size.bytes, args->flags);
408 return omap_gem_new_handle(dev, file_priv, args->size,
409 args->flags, &args->handle);
410}
411
412static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
413 struct drm_file *file_priv)
414{
415 struct drm_omap_gem_cpu_prep *args = data;
416 struct drm_gem_object *obj;
417 int ret;
418
419 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
420
421 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900422 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600423 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600424
425 ret = omap_gem_op_sync(obj, args->op);
426
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900427 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600428 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600429
430 drm_gem_object_unreference_unlocked(obj);
431
432 return ret;
433}
434
435static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
436 struct drm_file *file_priv)
437{
438 struct drm_omap_gem_cpu_fini *args = data;
439 struct drm_gem_object *obj;
440 int ret;
441
442 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
443
444 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900445 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600446 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600447
448 /* XXX flushy, flushy */
449 ret = 0;
450
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900451 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600452 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600453
454 drm_gem_object_unreference_unlocked(obj);
455
456 return ret;
457}
458
459static int ioctl_gem_info(struct drm_device *dev, void *data,
460 struct drm_file *file_priv)
461{
462 struct drm_omap_gem_info *args = data;
463 struct drm_gem_object *obj;
464 int ret = 0;
465
Rob Clarkf5f94542012-12-04 13:59:12 -0600466 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600467
468 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900469 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600470 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600471
Rob Clarkf7f9f452011-12-05 19:19:22 -0600472 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600473 args->offset = omap_gem_mmap_offset(obj);
474
475 drm_gem_object_unreference_unlocked(obj);
476
477 return ret;
478}
479
Rob Clarkbaa70942013-08-02 13:27:49 -0400480static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600481 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
482 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
483 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
484 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
485 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
486 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
487};
488
489/*
490 * drm driver funcs
491 */
492
493/**
494 * load - setup chip and create an initial config
495 * @dev: DRM device
496 * @flags: startup flags
497 *
498 * The driver load routine has to do several things:
499 * - initialize the memory manager
500 * - allocate initial config memory
501 * - setup the DRM framebuffer with the allocated memory
502 */
503static int dev_load(struct drm_device *dev, unsigned long flags)
504{
Rob Clark5e3b0872012-10-29 09:31:12 +0100505 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600506 struct omap_drm_private *priv;
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200507 unsigned int i;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600508 int ret;
509
510 DBG("load: dev=%p", dev);
511
Rob Clarkcd5351f2011-11-12 12:09:40 -0600512 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800513 if (!priv)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600514 return -ENOMEM;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600515
Rob Clark5e3b0872012-10-29 09:31:12 +0100516 priv->omaprev = pdata->omaprev;
517
Rob Clarkcd5351f2011-11-12 12:09:40 -0600518 dev->dev_private = priv;
519
Tejun Heo4619cdb2012-08-22 16:49:44 -0700520 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
Rob Clark5609f7f2012-03-05 10:48:32 -0600521
Tomi Valkeinen76c40552014-12-17 14:34:22 +0200522 spin_lock_init(&priv->list_lock);
Rob Clarkf6b60362012-03-05 10:48:36 -0600523 INIT_LIST_HEAD(&priv->obj_list);
524
Rob Clarkf7f9f452011-12-05 19:19:22 -0600525 omap_gem_init(dev);
526
Rob Clarkcd5351f2011-11-12 12:09:40 -0600527 ret = omap_modeset_init(dev);
528 if (ret) {
529 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
530 dev->dev_private = NULL;
531 kfree(priv);
532 return ret;
533 }
534
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200535 /* Initialize vblank handling, start with all CRTCs disabled. */
Rob Clarkf5f94542012-12-04 13:59:12 -0600536 ret = drm_vblank_init(dev, priv->num_crtcs);
537 if (ret)
538 dev_warn(dev->dev, "could not init vblank\n");
539
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200540 for (i = 0; i < priv->num_crtcs; i++)
541 drm_crtc_vblank_off(priv->crtcs[i]);
542
Rob Clarkcd5351f2011-11-12 12:09:40 -0600543 priv->fbdev = omap_fbdev_init(dev);
544 if (!priv->fbdev) {
545 dev_warn(dev->dev, "omap_fbdev_init failed\n");
546 /* well, limp along without an fbdev.. maybe X11 will work? */
547 }
548
Andy Grosse78edba2012-12-19 14:53:37 -0600549 /* store off drm_device for use in pm ops */
550 dev_set_drvdata(dev->dev, dev);
551
Rob Clarkcd5351f2011-11-12 12:09:40 -0600552 drm_kms_helper_poll_init(dev);
553
Rob Clarkcd5351f2011-11-12 12:09:40 -0600554 return 0;
555}
556
557static int dev_unload(struct drm_device *dev)
558{
Rob Clark5609f7f2012-03-05 10:48:32 -0600559 struct omap_drm_private *priv = dev->dev_private;
560
Rob Clarkcd5351f2011-11-12 12:09:40 -0600561 DBG("unload: dev=%p", dev);
562
Rob Clarkcd5351f2011-11-12 12:09:40 -0600563 drm_kms_helper_poll_fini(dev);
564
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000565 if (priv->fbdev)
566 omap_fbdev_free(dev);
Tomi Valkeinene2f8fd72014-04-02 14:31:57 +0300567
Rob Clarkcd5351f2011-11-12 12:09:40 -0600568 omap_modeset_free(dev);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600569 omap_gem_deinit(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600570
Rob Clark5609f7f2012-03-05 10:48:32 -0600571 destroy_workqueue(priv->wq);
572
Archit Taneja80e4ed52014-01-02 14:49:54 +0530573 drm_vblank_cleanup(dev);
574 omap_drm_irq_uninstall(dev);
575
Rob Clarkcd5351f2011-11-12 12:09:40 -0600576 kfree(dev->dev_private);
577 dev->dev_private = NULL;
578
Andy Grosse78edba2012-12-19 14:53:37 -0600579 dev_set_drvdata(dev->dev, NULL);
580
Rob Clarkcd5351f2011-11-12 12:09:40 -0600581 return 0;
582}
583
584static int dev_open(struct drm_device *dev, struct drm_file *file)
585{
586 file->driver_priv = NULL;
587
588 DBG("open: dev=%p, file=%p", dev, file);
589
590 return 0;
591}
592
Rob Clarkcd5351f2011-11-12 12:09:40 -0600593/**
594 * lastclose - clean up after all DRM clients have exited
595 * @dev: DRM device
596 *
597 * Take care of cleaning up after all DRM clients have exited. In the
598 * mode setting case, we want to restore the kernel's initial mode (just
599 * in case the last client left us in a bad state).
600 */
601static void dev_lastclose(struct drm_device *dev)
602{
Rob Clark3c810c62012-08-15 15:18:01 -0500603 int i;
604
Rob Clarkcd5351f2011-11-12 12:09:40 -0600605 /* we don't support vga-switcheroo.. so just make sure the fbdev
606 * mode is active
607 */
608 struct omap_drm_private *priv = dev->dev_private;
609 int ret;
610
611 DBG("lastclose: dev=%p", dev);
612
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200613 if (dev->mode_config.rotation_property) {
Rob Clarkc2a6a552012-10-25 17:14:13 -0500614 /* need to restore default rotation state.. not sure
615 * if there is a cleaner way to restore properties to
616 * default state? Maybe a flag that properties should
617 * automatically be restored to default state on
618 * lastclose?
619 */
620 for (i = 0; i < priv->num_crtcs; i++) {
621 drm_object_property_set_value(&priv->crtcs[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200622 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500623 }
Rob Clark3c810c62012-08-15 15:18:01 -0500624
Rob Clarkc2a6a552012-10-25 17:14:13 -0500625 for (i = 0; i < priv->num_planes; i++) {
626 drm_object_property_set_value(&priv->planes[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200627 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500628 }
Rob Clark3c810c62012-08-15 15:18:01 -0500629 }
630
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000631 if (priv->fbdev) {
632 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
633 if (ret)
634 DBG("failed to restore crtc mode");
635 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600636}
637
638static void dev_preclose(struct drm_device *dev, struct drm_file *file)
639{
Laurent Pinchart1d5e5ea2015-01-18 16:57:36 +0200640 struct omap_drm_private *priv = dev->dev_private;
641 unsigned int i;
642
Rob Clarkcd5351f2011-11-12 12:09:40 -0600643 DBG("preclose: dev=%p", dev);
Laurent Pinchart1d5e5ea2015-01-18 16:57:36 +0200644
645 for (i = 0; i < priv->num_crtcs; ++i)
646 omap_crtc_cancel_page_flip(priv->crtcs[i], file);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600647}
648
649static void dev_postclose(struct drm_device *dev, struct drm_file *file)
650{
651 DBG("postclose: dev=%p, file=%p", dev, file);
652}
653
Laurent Pinchart78b68552012-05-17 13:27:22 +0200654static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600655 .fault = omap_gem_fault,
656 .open = drm_gem_vm_open,
657 .close = drm_gem_vm_close,
658};
659
Rob Clarkff4f3872012-01-16 12:51:14 -0600660static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200661 .owner = THIS_MODULE,
662 .open = drm_open,
663 .unlocked_ioctl = drm_ioctl,
664 .release = drm_release,
665 .mmap = omap_gem_mmap,
666 .poll = drm_poll,
667 .read = drm_read,
668 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600669};
670
Rob Clarkcd5351f2011-11-12 12:09:40 -0600671static struct drm_driver omap_drm_driver = {
Laurent Pinchartf13ab002015-01-25 22:06:45 +0200672 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200673 .load = dev_load,
674 .unload = dev_unload,
675 .open = dev_open,
676 .lastclose = dev_lastclose,
677 .preclose = dev_preclose,
678 .postclose = dev_postclose,
679 .set_busid = drm_platform_set_busid,
680 .get_vblank_counter = drm_vblank_count,
681 .enable_vblank = omap_irq_enable_vblank,
682 .disable_vblank = omap_irq_disable_vblank,
Andy Gross6169a1482011-12-15 21:05:17 -0600683#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200684 .debugfs_init = omap_debugfs_init,
685 .debugfs_cleanup = omap_debugfs_cleanup,
Andy Gross6169a1482011-12-15 21:05:17 -0600686#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200687 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
688 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
689 .gem_prime_export = omap_gem_prime_export,
690 .gem_prime_import = omap_gem_prime_import,
691 .gem_free_object = omap_gem_free_object,
692 .gem_vm_ops = &omap_gem_vm_ops,
693 .dumb_create = omap_gem_dumb_create,
694 .dumb_map_offset = omap_gem_dumb_map_offset,
695 .dumb_destroy = drm_gem_dumb_destroy,
696 .ioctls = ioctls,
697 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
698 .fops = &omapdriver_fops,
699 .name = DRIVER_NAME,
700 .desc = DRIVER_DESC,
701 .date = DRIVER_DATE,
702 .major = DRIVER_MAJOR,
703 .minor = DRIVER_MINOR,
704 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600705};
706
Rob Clarkcd5351f2011-11-12 12:09:40 -0600707static int pdev_probe(struct platform_device *device)
708{
Archit Taneja3a01ab22014-01-02 14:49:51 +0530709 int r;
710
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300711 if (omapdss_is_initialized() == false)
712 return -EPROBE_DEFER;
713
Archit Taneja3a01ab22014-01-02 14:49:51 +0530714 omap_crtc_pre_init();
715
716 r = omap_connect_dssdevs();
717 if (r) {
718 omap_crtc_pre_uninit();
719 return r;
720 }
721
Rob Clarkcd5351f2011-11-12 12:09:40 -0600722 DBG("%s", device->name);
723 return drm_platform_init(&omap_drm_driver, device);
724}
725
726static int pdev_remove(struct platform_device *device)
727{
728 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600729
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300730 drm_put_dev(platform_get_drvdata(device));
731
Archit Tanejacc823bd2014-01-02 14:49:52 +0530732 omap_disconnect_dssdevs();
733 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100734
Rob Clarkcd5351f2011-11-12 12:09:40 -0600735 return 0;
736}
737
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200738#ifdef CONFIG_PM_SLEEP
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200739static int omap_drm_suspend(struct device *dev)
740{
741 struct drm_device *drm_dev = dev_get_drvdata(dev);
742
743 drm_kms_helper_poll_disable(drm_dev);
744
745 return 0;
746}
747
748static int omap_drm_resume(struct device *dev)
749{
750 struct drm_device *drm_dev = dev_get_drvdata(dev);
751
752 drm_kms_helper_poll_enable(drm_dev);
753
754 return omap_gem_resume(dev);
755}
Andy Grosse78edba2012-12-19 14:53:37 -0600756#endif
757
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200758static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
759
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300760static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200761 .driver = {
762 .name = DRIVER_NAME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200763 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200764 },
765 .probe = pdev_probe,
766 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600767};
768
769static int __init omap_drm_init(void)
770{
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300771 int r;
772
Rob Clarkcd5351f2011-11-12 12:09:40 -0600773 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300774
775 r = platform_driver_register(&omap_dmm_driver);
776 if (r) {
777 pr_err("DMM driver registration failed\n");
778 return r;
Rob Clarkbe0775a2012-04-05 10:34:56 -0500779 }
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300780
781 r = platform_driver_register(&pdev);
782 if (r) {
783 pr_err("omapdrm driver registration failed\n");
784 platform_driver_unregister(&omap_dmm_driver);
785 return r;
786 }
787
788 return 0;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600789}
790
791static void __exit omap_drm_fini(void)
792{
793 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300794
Rob Clarkcd5351f2011-11-12 12:09:40 -0600795 platform_driver_unregister(&pdev);
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300796
797 platform_driver_unregister(&omap_dmm_driver);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600798}
799
800/* need late_initcall() so we load after dss_driver's are loaded */
801late_initcall(omap_drm_init);
802module_exit(omap_drm_fini);
803
804MODULE_AUTHOR("Rob Clark <rob@ti.com>");
805MODULE_DESCRIPTION("OMAP DRM Display Driver");
806MODULE_ALIAS("platform:" DRIVER_NAME);
807MODULE_LICENSE("GPL v2");