blob: c05f56c3023f1edb2ace78b50de25ef99f4b829e [file] [log] [blame]
James Smart858c9f62007-06-17 19:56:39 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
James Smartd080abe2017-02-12 13:52:39 -08004 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
James Smart2a622bf2011-02-16 12:40:06 -05006 * Copyright (C) 2007-2011 Emulex. All rights reserved. *
James Smart858c9f62007-06-17 19:56:39 -05007 * EMULEX and SLI are trademarks of Emulex. *
James Smartd080abe2017-02-12 13:52:39 -08008 * www.broadcom.com *
James Smart858c9f62007-06-17 19:56:39 -05009 * *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
22
23#ifndef _H_LPFC_DEBUG_FS
24#define _H_LPFC_DEBUG_FS
25
James Smart923e4b62008-12-04 22:40:07 -050026#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
James Smart2a622bf2011-02-16 12:40:06 -050027
28/* size of output line, for discovery_trace and slow_ring_trace */
29#define LPFC_DEBUG_TRC_ENTRY_SIZE 100
30
31/* nodelist output buffer size */
32#define LPFC_NODELIST_SIZE 8192
33#define LPFC_NODELIST_ENTRY_SIZE 120
34
35/* dumpHBASlim output buffer size */
36#define LPFC_DUMPHBASLIM_SIZE 4096
37
38/* dumpHostSlim output buffer size */
39#define LPFC_DUMPHOSTSLIM_SIZE 4096
40
James Smartb84daac2012-08-03 12:35:13 -040041/* dumpSLIqinfo output buffer size */
42#define LPFC_DUMPSLIQINFO_SIZE 4096
43
James Smart2a622bf2011-02-16 12:40:06 -050044/* hbqinfo output buffer size */
45#define LPFC_HBQINFO_SIZE 8192
46
James Smart1d9d5a92017-02-12 13:52:29 -080047enum {
48 DUMP_FCP,
James Smart895427b2017-02-12 13:52:30 -080049 DUMP_NVME,
James Smart1d9d5a92017-02-12 13:52:29 -080050 DUMP_MBX,
51 DUMP_ELS,
James Smart895427b2017-02-12 13:52:30 -080052 DUMP_NVMELS,
James Smart1d9d5a92017-02-12 13:52:29 -080053};
54
James Smartbd2cdd52017-02-12 13:52:33 -080055/* nvmestat output buffer size */
56#define LPFC_NVMESTAT_SIZE 8192
57#define LPFC_NVMEKTIME_SIZE 8192
58#define LPFC_CPUCHECK_SIZE 8192
59#define LPFC_NVMEIO_TRC_SIZE 8192
60
61#define LPFC_DEBUG_OUT_LINE_SZ 80
62
James Smartb76f2dc2011-07-22 18:37:42 -040063/*
64 * For SLI4 iDiag debugfs diagnostics tool
65 */
66
James Smart86a80842011-04-16 11:03:04 -040067/* pciConf */
68#define LPFC_PCI_CFG_BROWSE 0xffff
69#define LPFC_PCI_CFG_RD_CMD_ARG 2
70#define LPFC_PCI_CFG_WR_CMD_ARG 3
James Smart2a622bf2011-02-16 12:40:06 -050071#define LPFC_PCI_CFG_SIZE 4096
James Smart2a622bf2011-02-16 12:40:06 -050072#define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
73
James Smartb76f2dc2011-07-22 18:37:42 -040074#define IDIAG_PCICFG_WHERE_INDX 0
75#define IDIAG_PCICFG_COUNT_INDX 1
76#define IDIAG_PCICFG_VALUE_INDX 2
77
78/* barAcc */
79#define LPFC_PCI_BAR_BROWSE 0xffff
80#define LPFC_PCI_BAR_RD_CMD_ARG 3
81#define LPFC_PCI_BAR_WR_CMD_ARG 3
82
83#define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16)
84#define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
85#define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
86#define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32)
87
88#define LPFC_PCI_BAR_RD_BUF_SIZE 4096
89#define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
90
91#define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
92#define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
93#define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
94#define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
95
96#define IDIAG_BARACC_BAR_NUM_INDX 0
97#define IDIAG_BARACC_OFF_SET_INDX 1
98#define IDIAG_BARACC_ACC_MOD_INDX 2
99#define IDIAG_BARACC_REG_VAL_INDX 2
100#define IDIAG_BARACC_BAR_SZE_INDX 3
101
102#define IDIAG_BARACC_BAR_0 0
103#define IDIAG_BARACC_BAR_1 1
104#define IDIAG_BARACC_BAR_2 2
105
106#define SINGLE_WORD 1
107
James Smart86a80842011-04-16 11:03:04 -0400108/* queue info */
109#define LPFC_QUE_INFO_GET_BUF_SIZE 4096
110
111/* queue acc */
112#define LPFC_QUE_ACC_BROWSE 0xffff
113#define LPFC_QUE_ACC_RD_CMD_ARG 4
114#define LPFC_QUE_ACC_WR_CMD_ARG 6
115#define LPFC_QUE_ACC_BUF_SIZE 4096
116#define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
117
118#define LPFC_IDIAG_EQ 1
119#define LPFC_IDIAG_CQ 2
120#define LPFC_IDIAG_MQ 3
121#define LPFC_IDIAG_WQ 4
122#define LPFC_IDIAG_RQ 5
123
James Smartb76f2dc2011-07-22 18:37:42 -0400124#define IDIAG_QUEACC_QUETP_INDX 0
125#define IDIAG_QUEACC_QUEID_INDX 1
126#define IDIAG_QUEACC_INDEX_INDX 2
127#define IDIAG_QUEACC_COUNT_INDX 3
128#define IDIAG_QUEACC_OFFST_INDX 4
129#define IDIAG_QUEACC_VALUE_INDX 5
130
131/* doorbell register acc */
James Smart86a80842011-04-16 11:03:04 -0400132#define LPFC_DRB_ACC_ALL 0xffff
133#define LPFC_DRB_ACC_RD_CMD_ARG 1
134#define LPFC_DRB_ACC_WR_CMD_ARG 2
135#define LPFC_DRB_ACC_BUF_SIZE 256
136
137#define LPFC_DRB_EQCQ 1
138#define LPFC_DRB_MQ 2
139#define LPFC_DRB_WQ 3
140#define LPFC_DRB_RQ 4
141
142#define LPFC_DRB_MAX 4
James Smart2a622bf2011-02-16 12:40:06 -0500143
James Smartb76f2dc2011-07-22 18:37:42 -0400144#define IDIAG_DRBACC_REGID_INDX 0
145#define IDIAG_DRBACC_VALUE_INDX 1
146
147/* control register acc */
148#define LPFC_CTL_ACC_ALL 0xffff
149#define LPFC_CTL_ACC_RD_CMD_ARG 1
150#define LPFC_CTL_ACC_WR_CMD_ARG 2
151#define LPFC_CTL_ACC_BUF_SIZE 256
152
153#define LPFC_CTL_PORT_SEM 1
154#define LPFC_CTL_PORT_STA 2
155#define LPFC_CTL_PORT_CTL 3
156#define LPFC_CTL_PORT_ER1 4
157#define LPFC_CTL_PORT_ER2 5
158#define LPFC_CTL_PDEV_CTL 6
159
160#define LPFC_CTL_MAX 6
161
162#define IDIAG_CTLACC_REGID_INDX 0
163#define IDIAG_CTLACC_VALUE_INDX 1
164
165/* mailbox access */
166#define LPFC_MBX_DMP_ARG 4
167
168#define LPFC_MBX_ACC_BUF_SIZE 512
169#define LPFC_MBX_ACC_LBUF_SZ 128
170
171#define LPFC_MBX_DMP_MBX_WORD 0x00000001
172#define LPFC_MBX_DMP_MBX_BYTE 0x00000002
173#define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
174
175#define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
176#define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
177#define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
178#define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
179#define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
180 LPFC_BSG_DMP_MBX_RD_BUF | \
181 LPFC_BSG_DMP_MBX_WR_MBX | \
182 LPFC_BSG_DMP_MBX_WR_BUF)
183
184#define LPFC_MBX_DMP_ALL 0xffff
185#define LPFC_MBX_ALL_CMD 0xff
186
187#define IDIAG_MBXACC_MBCMD_INDX 0
188#define IDIAG_MBXACC_DPMAP_INDX 1
189#define IDIAG_MBXACC_DPCNT_INDX 2
190#define IDIAG_MBXACC_WDCNT_INDX 3
191
192/* extents access */
193#define LPFC_EXT_ACC_CMD_ARG 1
194#define LPFC_EXT_ACC_BUF_SIZE 4096
195
196#define LPFC_EXT_ACC_AVAIL 0x1
197#define LPFC_EXT_ACC_ALLOC 0x2
198#define LPFC_EXT_ACC_DRIVR 0x4
199#define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \
200 LPFC_EXT_ACC_AVAIL | \
201 LPFC_EXT_ACC_ALLOC)
202
203#define IDIAG_EXTACC_EXMAP_INDX 0
204
James Smart2a622bf2011-02-16 12:40:06 -0500205#define SIZE_U8 sizeof(uint8_t)
206#define SIZE_U16 sizeof(uint16_t)
207#define SIZE_U32 sizeof(uint32_t)
208
James Smartbd2cdd52017-02-12 13:52:33 -0800209#define lpfc_nvmeio_data(phba, fmt, arg...) \
210 { \
211 if (phba->nvmeio_trc_on) \
212 lpfc_debugfs_nvme_trc(phba, fmt, ##arg); \
213 }
214
James Smart2a622bf2011-02-16 12:40:06 -0500215struct lpfc_debug {
216 char *i_private;
217 char op;
218#define LPFC_IDIAG_OP_RD 1
219#define LPFC_IDIAG_OP_WR 2
220 char *buffer;
221 int len;
222};
223
James Smarta58cbd52007-08-02 11:09:43 -0400224struct lpfc_debugfs_trc {
James Smart858c9f62007-06-17 19:56:39 -0500225 char *fmt;
226 uint32_t data1;
227 uint32_t data2;
228 uint32_t data3;
229 uint32_t seq_cnt;
230 unsigned long jif;
231};
James Smart2a622bf2011-02-16 12:40:06 -0500232
James Smartbd2cdd52017-02-12 13:52:33 -0800233struct lpfc_debugfs_nvmeio_trc {
234 char *fmt;
235 uint16_t data1;
236 uint16_t data2;
237 uint32_t data3;
238};
239
James Smart2a622bf2011-02-16 12:40:06 -0500240struct lpfc_idiag_offset {
241 uint32_t last_rd;
242};
243
James Smart86a80842011-04-16 11:03:04 -0400244#define LPFC_IDIAG_CMD_DATA_SIZE 8
James Smart2a622bf2011-02-16 12:40:06 -0500245struct lpfc_idiag_cmd {
246 uint32_t opcode;
247#define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
248#define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
249#define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
250#define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
James Smart86a80842011-04-16 11:03:04 -0400251
James Smartb76f2dc2011-07-22 18:37:42 -0400252#define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
253#define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
254#define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
255#define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
256
James Smart86a80842011-04-16 11:03:04 -0400257#define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
258#define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
259#define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
260#define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
261
262#define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
263#define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
264#define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
265#define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
James Smartb76f2dc2011-07-22 18:37:42 -0400266
267#define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
268#define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
269#define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
270#define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
271
272#define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
273#define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
274
275#define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
276
James Smart2a622bf2011-02-16 12:40:06 -0500277 uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
278};
279
280struct lpfc_idiag {
281 uint32_t active;
282 struct lpfc_idiag_cmd cmd;
283 struct lpfc_idiag_offset offset;
James Smart86a80842011-04-16 11:03:04 -0400284 void *ptr_private;
James Smart2a622bf2011-02-16 12:40:06 -0500285};
James Smart858c9f62007-06-17 19:56:39 -0500286#endif
287
288/* Mask for discovery_trace */
289#define LPFC_DISC_TRC_ELS_CMD 0x1 /* Trace ELS commands */
290#define LPFC_DISC_TRC_ELS_RSP 0x2 /* Trace ELS response */
291#define LPFC_DISC_TRC_ELS_UNSOL 0x4 /* Trace ELS rcv'ed */
292#define LPFC_DISC_TRC_ELS_ALL 0x7 /* Trace ELS */
293#define LPFC_DISC_TRC_MBOX_VPORT 0x8 /* Trace vport MBOXs */
294#define LPFC_DISC_TRC_MBOX 0x10 /* Trace other MBOXs */
295#define LPFC_DISC_TRC_MBOX_ALL 0x18 /* Trace all MBOXs */
296#define LPFC_DISC_TRC_CT 0x20 /* Trace disc CT requests */
297#define LPFC_DISC_TRC_DSM 0x40 /* Trace DSM events */
298#define LPFC_DISC_TRC_RPORT 0x80 /* Trace rport events */
299#define LPFC_DISC_TRC_NODE 0x100 /* Trace ndlp state changes */
300
301#define LPFC_DISC_TRC_DISCOVERY 0xef /* common mask for general
302 * discovery */
303#endif /* H_LPFC_DEBUG_FS */
James Smart809c7532012-05-09 21:19:25 -0400304
305
306/*
307 * Driver debug utility routines outside of debugfs. The debug utility
308 * routines implemented here is intended to be used in the instrumented
309 * debug driver for debugging host or port issues.
310 */
311
312/**
313 * lpfc_debug_dump_qe - dump an specific entry from a queue
314 * @q: Pointer to the queue descriptor.
315 * @idx: Index to the entry on the queue.
316 *
317 * This function dumps an entry indexed by @idx from a queue specified by the
318 * queue descriptor @q.
319 **/
320static inline void
321lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)
322{
323 char line_buf[LPFC_LBUF_SZ];
324 int i, esize, qe_word_cnt, len;
325 uint32_t *pword;
326
327 /* sanity checks */
328 if (!q)
329 return;
330 if (idx >= q->entry_count)
331 return;
332
333 esize = q->entry_size;
334 qe_word_cnt = esize / sizeof(uint32_t);
335 pword = q->qe[idx].address;
336
337 len = 0;
338 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);
339 if (qe_word_cnt > 8)
340 printk(KERN_ERR "%s\n", line_buf);
341
342 for (i = 0; i < qe_word_cnt; i++) {
343 if (!(i % 8)) {
344 if (i != 0)
345 printk(KERN_ERR "%s\n", line_buf);
346 if (qe_word_cnt > 8) {
347 len = 0;
348 memset(line_buf, 0, LPFC_LBUF_SZ);
349 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len,
350 "%03d: ", i);
351 }
352 }
353 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",
354 ((uint32_t)*pword) & 0xffffffff);
355 pword++;
356 }
357 if (qe_word_cnt <= 8 || (i - 1) % 8)
358 printk(KERN_ERR "%s\n", line_buf);
359}
360
361/**
362 * lpfc_debug_dump_q - dump all entries from an specific queue
363 * @q: Pointer to the queue descriptor.
364 *
365 * This function dumps all entries from a queue specified by the queue
366 * descriptor @q.
367 **/
368static inline void
369lpfc_debug_dump_q(struct lpfc_queue *q)
370{
371 int idx, entry_count;
372
373 /* sanity check */
374 if (!q)
375 return;
376
377 dev_printk(KERN_ERR, &(((q->phba))->pcidev)->dev,
378 "%d: [qid:%d, type:%d, subtype:%d, "
379 "qe_size:%d, qe_count:%d, "
380 "host_index:%d, port_index:%d]\n",
381 (q->phba)->brd_no,
382 q->queue_id, q->type, q->subtype,
383 q->entry_size, q->entry_count,
384 q->host_index, q->hba_index);
385 entry_count = q->entry_count;
386 for (idx = 0; idx < entry_count; idx++)
387 lpfc_debug_dump_qe(q, idx);
388 printk(KERN_ERR "\n");
389}
390
391/**
James Smart895427b2017-02-12 13:52:30 -0800392 * lpfc_debug_dump_wq - dump all entries from the fcp or nvme work queue
James Smart809c7532012-05-09 21:19:25 -0400393 * @phba: Pointer to HBA context object.
James Smart895427b2017-02-12 13:52:30 -0800394 * @wqidx: Index to a FCP or NVME work queue.
James Smart809c7532012-05-09 21:19:25 -0400395 *
James Smart895427b2017-02-12 13:52:30 -0800396 * This function dumps all entries from a FCP or NVME work queue specified
James Smart1d9d5a92017-02-12 13:52:29 -0800397 * by the wqidx.
James Smart809c7532012-05-09 21:19:25 -0400398 **/
399static inline void
James Smart1d9d5a92017-02-12 13:52:29 -0800400lpfc_debug_dump_wq(struct lpfc_hba *phba, int qtype, int wqidx)
James Smart809c7532012-05-09 21:19:25 -0400401{
James Smart1d9d5a92017-02-12 13:52:29 -0800402 struct lpfc_queue *wq;
403 char *qtypestr;
404
405 if (qtype == DUMP_FCP) {
406 wq = phba->sli4_hba.fcp_wq[wqidx];
407 qtypestr = "FCP";
James Smart895427b2017-02-12 13:52:30 -0800408 } else if (qtype == DUMP_NVME) {
409 wq = phba->sli4_hba.nvme_wq[wqidx];
410 qtypestr = "NVME";
James Smart1d9d5a92017-02-12 13:52:29 -0800411 } else if (qtype == DUMP_MBX) {
412 wq = phba->sli4_hba.mbx_wq;
413 qtypestr = "MBX";
414 } else if (qtype == DUMP_ELS) {
415 wq = phba->sli4_hba.els_wq;
416 qtypestr = "ELS";
James Smart895427b2017-02-12 13:52:30 -0800417 } else if (qtype == DUMP_NVMELS) {
418 wq = phba->sli4_hba.nvmels_wq;
419 qtypestr = "NVMELS";
James Smart1d9d5a92017-02-12 13:52:29 -0800420 } else
James Smart809c7532012-05-09 21:19:25 -0400421 return;
422
James Smart895427b2017-02-12 13:52:30 -0800423 if (qtype == DUMP_FCP || qtype == DUMP_NVME)
James Smart1d9d5a92017-02-12 13:52:29 -0800424 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n",
425 qtypestr, wqidx, wq->queue_id);
426 else
427 pr_err("%s WQ: WQ[Qid:%d]\n",
428 qtypestr, wq->queue_id);
429
430 lpfc_debug_dump_q(wq);
James Smart809c7532012-05-09 21:19:25 -0400431}
432
433/**
James Smart895427b2017-02-12 13:52:30 -0800434 * lpfc_debug_dump_cq - dump all entries from a fcp or nvme work queue's
James Smart1d9d5a92017-02-12 13:52:29 -0800435 * cmpl queue
James Smart809c7532012-05-09 21:19:25 -0400436 * @phba: Pointer to HBA context object.
James Smart1d9d5a92017-02-12 13:52:29 -0800437 * @wqidx: Index to a FCP work queue.
James Smart809c7532012-05-09 21:19:25 -0400438 *
James Smart895427b2017-02-12 13:52:30 -0800439 * This function dumps all entries from a FCP or NVME completion queue
James Smart1d9d5a92017-02-12 13:52:29 -0800440 * which is associated to the work queue specified by the @wqidx.
James Smart809c7532012-05-09 21:19:25 -0400441 **/
442static inline void
James Smart1d9d5a92017-02-12 13:52:29 -0800443lpfc_debug_dump_cq(struct lpfc_hba *phba, int qtype, int wqidx)
James Smart809c7532012-05-09 21:19:25 -0400444{
James Smart1d9d5a92017-02-12 13:52:29 -0800445 struct lpfc_queue *wq, *cq, *eq;
446 char *qtypestr;
447 int eqidx;
James Smart809c7532012-05-09 21:19:25 -0400448
James Smart895427b2017-02-12 13:52:30 -0800449 /* fcp/nvme wq and cq are 1:1, thus same indexes */
James Smart1d9d5a92017-02-12 13:52:29 -0800450
451 if (qtype == DUMP_FCP) {
452 wq = phba->sli4_hba.fcp_wq[wqidx];
453 cq = phba->sli4_hba.fcp_cq[wqidx];
454 qtypestr = "FCP";
James Smart895427b2017-02-12 13:52:30 -0800455 } else if (qtype == DUMP_NVME) {
456 wq = phba->sli4_hba.nvme_wq[wqidx];
457 cq = phba->sli4_hba.nvme_cq[wqidx];
458 qtypestr = "NVME";
James Smart1d9d5a92017-02-12 13:52:29 -0800459 } else if (qtype == DUMP_MBX) {
460 wq = phba->sli4_hba.mbx_wq;
461 cq = phba->sli4_hba.mbx_cq;
462 qtypestr = "MBX";
463 } else if (qtype == DUMP_ELS) {
464 wq = phba->sli4_hba.els_wq;
465 cq = phba->sli4_hba.els_cq;
466 qtypestr = "ELS";
James Smart895427b2017-02-12 13:52:30 -0800467 } else if (qtype == DUMP_NVMELS) {
468 wq = phba->sli4_hba.nvmels_wq;
469 cq = phba->sli4_hba.nvmels_cq;
470 qtypestr = "NVMELS";
James Smart1d9d5a92017-02-12 13:52:29 -0800471 } else
James Smart809c7532012-05-09 21:19:25 -0400472 return;
473
James Smart895427b2017-02-12 13:52:30 -0800474 for (eqidx = 0; eqidx < phba->io_channel_irqs; eqidx++) {
James Smart1d9d5a92017-02-12 13:52:29 -0800475 eq = phba->sli4_hba.hba_eq[eqidx];
476 if (cq->assoc_qid == eq->queue_id)
James Smart809c7532012-05-09 21:19:25 -0400477 break;
James Smart1d9d5a92017-02-12 13:52:29 -0800478 }
James Smart895427b2017-02-12 13:52:30 -0800479 if (eqidx == phba->io_channel_irqs) {
James Smart1d9d5a92017-02-12 13:52:29 -0800480 pr_err("Couldn't find EQ for CQ. Using EQ[0]\n");
481 eqidx = 0;
482 eq = phba->sli4_hba.hba_eq[0];
James Smart3b3da6a2012-06-12 13:54:20 -0400483 }
James Smart809c7532012-05-09 21:19:25 -0400484
James Smart895427b2017-02-12 13:52:30 -0800485 if (qtype == DUMP_FCP || qtype == DUMP_NVME)
James Smart1d9d5a92017-02-12 13:52:29 -0800486 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]"
487 "->EQ[Idx:%d|Qid:%d]:\n",
488 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id,
489 eqidx, eq->queue_id);
490 else
491 pr_err("%s CQ: WQ[Qid:%d]->CQ[Qid:%d]"
492 "->EQ[Idx:%d|Qid:%d]:\n",
493 qtypestr, wq->queue_id, cq->queue_id,
494 eqidx, eq->queue_id);
495
496 lpfc_debug_dump_q(cq);
James Smart809c7532012-05-09 21:19:25 -0400497}
498
499/**
James Smart67d12732012-08-03 12:36:13 -0400500 * lpfc_debug_dump_hba_eq - dump all entries from a fcp work queue's evt queue
James Smart809c7532012-05-09 21:19:25 -0400501 * @phba: Pointer to HBA context object.
502 * @fcp_wqidx: Index to a FCP work queue.
503 *
504 * This function dumps all entries from a FCP event queue which is
505 * associated to the FCP work queue specified by the @fcp_wqidx.
506 **/
507static inline void
James Smart1d9d5a92017-02-12 13:52:29 -0800508lpfc_debug_dump_hba_eq(struct lpfc_hba *phba, int qidx)
James Smart809c7532012-05-09 21:19:25 -0400509{
James Smart1d9d5a92017-02-12 13:52:29 -0800510 struct lpfc_queue *qp;
James Smart809c7532012-05-09 21:19:25 -0400511
James Smart1d9d5a92017-02-12 13:52:29 -0800512 qp = phba->sli4_hba.hba_eq[qidx];
James Smart809c7532012-05-09 21:19:25 -0400513
James Smart1d9d5a92017-02-12 13:52:29 -0800514 pr_err("EQ[Idx:%d|Qid:%d]\n", qidx, qp->queue_id);
James Smart809c7532012-05-09 21:19:25 -0400515
James Smart1d9d5a92017-02-12 13:52:29 -0800516 lpfc_debug_dump_q(qp);
James Smart809c7532012-05-09 21:19:25 -0400517}
518
519/**
520 * lpfc_debug_dump_dat_rq - dump all entries from the receive data queue
521 * @phba: Pointer to HBA context object.
522 *
523 * This function dumps all entries from the receive data queue.
524 **/
525static inline void
526lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)
527{
528 printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",
529 phba->sli4_hba.dat_rq->queue_id);
530 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
531}
532
533/**
534 * lpfc_debug_dump_hdr_rq - dump all entries from the receive header queue
535 * @phba: Pointer to HBA context object.
536 *
537 * This function dumps all entries from the receive header queue.
538 **/
539static inline void
540lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)
541{
542 printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",
543 phba->sli4_hba.hdr_rq->queue_id);
544 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
545}
546
547/**
James Smart809c7532012-05-09 21:19:25 -0400548 * lpfc_debug_dump_wq_by_id - dump all entries from a work queue by queue id
549 * @phba: Pointer to HBA context object.
550 * @qid: Work queue identifier.
551 *
552 * This function dumps all entries from a work queue identified by the queue
553 * identifier.
554 **/
555static inline void
556lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)
557{
558 int wq_idx;
559
James Smart67d12732012-08-03 12:36:13 -0400560 for (wq_idx = 0; wq_idx < phba->cfg_fcp_io_channel; wq_idx++)
James Smart809c7532012-05-09 21:19:25 -0400561 if (phba->sli4_hba.fcp_wq[wq_idx]->queue_id == qid)
562 break;
James Smart67d12732012-08-03 12:36:13 -0400563 if (wq_idx < phba->cfg_fcp_io_channel) {
James Smart1d9d5a92017-02-12 13:52:29 -0800564 pr_err("FCP WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
James Smart809c7532012-05-09 21:19:25 -0400565 lpfc_debug_dump_q(phba->sli4_hba.fcp_wq[wq_idx]);
566 return;
567 }
568
James Smart895427b2017-02-12 13:52:30 -0800569 for (wq_idx = 0; wq_idx < phba->cfg_nvme_io_channel; wq_idx++)
570 if (phba->sli4_hba.nvme_wq[wq_idx]->queue_id == qid)
571 break;
572 if (wq_idx < phba->cfg_nvme_io_channel) {
573 pr_err("NVME WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
574 lpfc_debug_dump_q(phba->sli4_hba.nvme_wq[wq_idx]);
575 return;
576 }
577
James Smart809c7532012-05-09 21:19:25 -0400578 if (phba->sli4_hba.els_wq->queue_id == qid) {
James Smart1d9d5a92017-02-12 13:52:29 -0800579 pr_err("ELS WQ[Qid:%d]\n", qid);
James Smart809c7532012-05-09 21:19:25 -0400580 lpfc_debug_dump_q(phba->sli4_hba.els_wq);
James Smart1d9d5a92017-02-12 13:52:29 -0800581 return;
James Smart809c7532012-05-09 21:19:25 -0400582 }
James Smart895427b2017-02-12 13:52:30 -0800583
584 if (phba->sli4_hba.nvmels_wq->queue_id == qid) {
585 pr_err("NVME LS WQ[Qid:%d]\n", qid);
586 lpfc_debug_dump_q(phba->sli4_hba.nvmels_wq);
587 }
James Smart809c7532012-05-09 21:19:25 -0400588}
589
590/**
591 * lpfc_debug_dump_mq_by_id - dump all entries from a mbox queue by queue id
592 * @phba: Pointer to HBA context object.
593 * @qid: Mbox work queue identifier.
594 *
595 * This function dumps all entries from a mbox work queue identified by the
596 * queue identifier.
597 **/
598static inline void
599lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)
600{
601 if (phba->sli4_hba.mbx_wq->queue_id == qid) {
602 printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);
603 lpfc_debug_dump_q(phba->sli4_hba.mbx_wq);
604 }
605}
606
607/**
608 * lpfc_debug_dump_rq_by_id - dump all entries from a receive queue by queue id
609 * @phba: Pointer to HBA context object.
610 * @qid: Receive queue identifier.
611 *
612 * This function dumps all entries from a receive queue identified by the
613 * queue identifier.
614 **/
615static inline void
616lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)
617{
618 if (phba->sli4_hba.hdr_rq->queue_id == qid) {
619 printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);
620 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
621 return;
622 }
623 if (phba->sli4_hba.dat_rq->queue_id == qid) {
624 printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);
625 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
626 }
627}
628
629/**
630 * lpfc_debug_dump_cq_by_id - dump all entries from a cmpl queue by queue id
631 * @phba: Pointer to HBA context object.
632 * @qid: Complete queue identifier.
633 *
634 * This function dumps all entries from a complete queue identified by the
635 * queue identifier.
636 **/
637static inline void
638lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)
639{
James Smart1d9d5a92017-02-12 13:52:29 -0800640 int cq_idx;
James Smart809c7532012-05-09 21:19:25 -0400641
James Smart1d9d5a92017-02-12 13:52:29 -0800642 for (cq_idx = 0; cq_idx < phba->cfg_fcp_io_channel; cq_idx++)
James Smart809c7532012-05-09 21:19:25 -0400643 if (phba->sli4_hba.fcp_cq[cq_idx]->queue_id == qid)
644 break;
James Smart809c7532012-05-09 21:19:25 -0400645
James Smart67d12732012-08-03 12:36:13 -0400646 if (cq_idx < phba->cfg_fcp_io_channel) {
James Smart1d9d5a92017-02-12 13:52:29 -0800647 pr_err("FCP CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
James Smart809c7532012-05-09 21:19:25 -0400648 lpfc_debug_dump_q(phba->sli4_hba.fcp_cq[cq_idx]);
649 return;
650 }
651
James Smart895427b2017-02-12 13:52:30 -0800652 for (cq_idx = 0; cq_idx < phba->cfg_nvme_io_channel; cq_idx++)
653 if (phba->sli4_hba.nvme_cq[cq_idx]->queue_id == qid)
654 break;
655
656 if (cq_idx < phba->cfg_nvme_io_channel) {
657 pr_err("NVME CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
658 lpfc_debug_dump_q(phba->sli4_hba.nvme_cq[cq_idx]);
659 return;
660 }
661
James Smart809c7532012-05-09 21:19:25 -0400662 if (phba->sli4_hba.els_cq->queue_id == qid) {
James Smart1d9d5a92017-02-12 13:52:29 -0800663 pr_err("ELS CQ[Qid:%d]\n", qid);
James Smart809c7532012-05-09 21:19:25 -0400664 lpfc_debug_dump_q(phba->sli4_hba.els_cq);
665 return;
666 }
667
James Smart895427b2017-02-12 13:52:30 -0800668 if (phba->sli4_hba.nvmels_cq->queue_id == qid) {
669 pr_err("NVME LS CQ[Qid:%d]\n", qid);
670 lpfc_debug_dump_q(phba->sli4_hba.nvmels_cq);
671 return;
672 }
673
James Smart809c7532012-05-09 21:19:25 -0400674 if (phba->sli4_hba.mbx_cq->queue_id == qid) {
James Smart1d9d5a92017-02-12 13:52:29 -0800675 pr_err("MBX CQ[Qid:%d]\n", qid);
James Smart809c7532012-05-09 21:19:25 -0400676 lpfc_debug_dump_q(phba->sli4_hba.mbx_cq);
677 }
678}
679
680/**
681 * lpfc_debug_dump_eq_by_id - dump all entries from an event queue by queue id
682 * @phba: Pointer to HBA context object.
683 * @qid: Complete queue identifier.
684 *
685 * This function dumps all entries from an event queue identified by the
686 * queue identifier.
687 **/
688static inline void
689lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)
690{
691 int eq_idx;
692
James Smart895427b2017-02-12 13:52:30 -0800693 for (eq_idx = 0; eq_idx < phba->io_channel_irqs; eq_idx++)
James Smart67d12732012-08-03 12:36:13 -0400694 if (phba->sli4_hba.hba_eq[eq_idx]->queue_id == qid)
James Smart809c7532012-05-09 21:19:25 -0400695 break;
James Smart809c7532012-05-09 21:19:25 -0400696
James Smart895427b2017-02-12 13:52:30 -0800697 if (eq_idx < phba->io_channel_irqs) {
James Smart809c7532012-05-09 21:19:25 -0400698 printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);
James Smart67d12732012-08-03 12:36:13 -0400699 lpfc_debug_dump_q(phba->sli4_hba.hba_eq[eq_idx]);
James Smart809c7532012-05-09 21:19:25 -0400700 return;
701 }
James Smart809c7532012-05-09 21:19:25 -0400702}
703
704void lpfc_debug_dump_all_queues(struct lpfc_hba *);