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Masahiro Yamada734d82f2016-09-16 16:40:03 +09001/*
2 * Copyright (C) 2016 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/clk-provider.h>
17#include <linux/init.h>
18#include <linux/mfd/syscon.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/platform_device.h>
22
23#include "clk-uniphier.h"
24
25static struct clk_hw *uniphier_clk_register(struct device *dev,
26 struct regmap *regmap,
27 const struct uniphier_clk_data *data)
28{
29 switch (data->type) {
Masahiro Yamadad08f1f02016-12-07 10:32:32 +090030 case UNIPHIER_CLK_TYPE_CPUGEAR:
31 return uniphier_clk_register_cpugear(dev, regmap, data->name,
32 &data->data.cpugear);
Masahiro Yamada734d82f2016-09-16 16:40:03 +090033 case UNIPHIER_CLK_TYPE_FIXED_FACTOR:
34 return uniphier_clk_register_fixed_factor(dev, data->name,
35 &data->data.factor);
36 case UNIPHIER_CLK_TYPE_FIXED_RATE:
37 return uniphier_clk_register_fixed_rate(dev, data->name,
38 &data->data.rate);
39 case UNIPHIER_CLK_TYPE_GATE:
40 return uniphier_clk_register_gate(dev, regmap, data->name,
41 &data->data.gate);
42 case UNIPHIER_CLK_TYPE_MUX:
43 return uniphier_clk_register_mux(dev, regmap, data->name,
44 &data->data.mux);
45 default:
46 dev_err(dev, "unsupported clock type\n");
47 return ERR_PTR(-EINVAL);
48 }
49}
50
51static int uniphier_clk_probe(struct platform_device *pdev)
52{
53 struct device *dev = &pdev->dev;
54 struct clk_hw_onecell_data *hw_data;
55 const struct uniphier_clk_data *p, *data;
56 struct regmap *regmap;
57 struct device_node *parent;
58 int clk_num = 0;
59
60 data = of_device_get_match_data(dev);
61 if (WARN_ON(!data))
62 return -EINVAL;
63
64 parent = of_get_parent(dev->of_node); /* parent should be syscon node */
65 regmap = syscon_node_to_regmap(parent);
66 of_node_put(parent);
67 if (IS_ERR(regmap)) {
68 dev_err(dev, "failed to get regmap (error %ld)\n",
69 PTR_ERR(regmap));
70 return PTR_ERR(regmap);
71 }
72
73 for (p = data; p->name; p++)
74 clk_num = max(clk_num, p->idx + 1);
75
76 hw_data = devm_kzalloc(dev,
77 sizeof(*hw_data) + clk_num * sizeof(struct clk_hw *),
78 GFP_KERNEL);
79 if (!hw_data)
80 return -ENOMEM;
81
82 hw_data->num = clk_num;
83
84 /* avoid returning NULL for unused idx */
Masahiro Yamada7d36b9c2016-10-19 20:49:39 +090085 while (--clk_num >= 0)
Masahiro Yamada734d82f2016-09-16 16:40:03 +090086 hw_data->hws[clk_num] = ERR_PTR(-EINVAL);
87
88 for (p = data; p->name; p++) {
89 struct clk_hw *hw;
90
91 dev_dbg(dev, "register %s (index=%d)\n", p->name, p->idx);
92 hw = uniphier_clk_register(dev, regmap, p);
93 if (IS_ERR(hw)) {
94 dev_err(dev, "failed to register %s (error %ld)\n",
95 p->name, PTR_ERR(hw));
96 return PTR_ERR(hw);
97 }
98
99 if (p->idx >= 0)
100 hw_data->hws[p->idx] = hw;
101 }
102
103 return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
104 hw_data);
105}
106
107static int uniphier_clk_remove(struct platform_device *pdev)
108{
109 of_clk_del_provider(pdev->dev.of_node);
110
111 return 0;
112}
113
114static const struct of_device_id uniphier_clk_match[] = {
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900115 /* System clock */
116 {
Masahiro Yamada8236d9a2016-10-17 00:11:14 +0900117 .compatible = "socionext,uniphier-sld3-clock",
118 .data = uniphier_sld3_sys_clk_data,
119 },
120 {
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900121 .compatible = "socionext,uniphier-ld4-clock",
122 .data = uniphier_ld4_sys_clk_data,
123 },
124 {
125 .compatible = "socionext,uniphier-pro4-clock",
126 .data = uniphier_pro4_sys_clk_data,
127 },
128 {
129 .compatible = "socionext,uniphier-sld8-clock",
130 .data = uniphier_sld8_sys_clk_data,
131 },
132 {
133 .compatible = "socionext,uniphier-pro5-clock",
134 .data = uniphier_pro5_sys_clk_data,
135 },
136 {
137 .compatible = "socionext,uniphier-pxs2-clock",
138 .data = uniphier_pxs2_sys_clk_data,
139 },
140 {
141 .compatible = "socionext,uniphier-ld11-clock",
142 .data = uniphier_ld11_sys_clk_data,
143 },
144 {
145 .compatible = "socionext,uniphier-ld20-clock",
146 .data = uniphier_ld20_sys_clk_data,
147 },
Masahiro Yamada5c6201e2016-10-19 17:22:07 +0900148 /* Media I/O clock, SD clock */
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900149 {
150 .compatible = "socionext,uniphier-sld3-mio-clock",
151 .data = uniphier_sld3_mio_clk_data,
152 },
153 {
154 .compatible = "socionext,uniphier-ld4-mio-clock",
155 .data = uniphier_sld3_mio_clk_data,
156 },
157 {
158 .compatible = "socionext,uniphier-pro4-mio-clock",
159 .data = uniphier_sld3_mio_clk_data,
160 },
161 {
162 .compatible = "socionext,uniphier-sld8-mio-clock",
163 .data = uniphier_sld3_mio_clk_data,
164 },
165 {
Masahiro Yamada5c6201e2016-10-19 17:22:07 +0900166 .compatible = "socionext,uniphier-pro5-sd-clock",
167 .data = uniphier_pro5_sd_clk_data,
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900168 },
169 {
Masahiro Yamada5c6201e2016-10-19 17:22:07 +0900170 .compatible = "socionext,uniphier-pxs2-sd-clock",
171 .data = uniphier_pro5_sd_clk_data,
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900172 },
173 {
174 .compatible = "socionext,uniphier-ld11-mio-clock",
175 .data = uniphier_sld3_mio_clk_data,
176 },
177 {
Masahiro Yamada5c6201e2016-10-19 17:22:07 +0900178 .compatible = "socionext,uniphier-ld20-sd-clock",
179 .data = uniphier_pro5_sd_clk_data,
Masahiro Yamada7f4d3b52016-09-16 16:40:04 +0900180 },
181 /* Peripheral clock */
182 {
183 .compatible = "socionext,uniphier-ld4-peri-clock",
184 .data = uniphier_ld4_peri_clk_data,
185 },
186 {
187 .compatible = "socionext,uniphier-pro4-peri-clock",
188 .data = uniphier_pro4_peri_clk_data,
189 },
190 {
191 .compatible = "socionext,uniphier-sld8-peri-clock",
192 .data = uniphier_ld4_peri_clk_data,
193 },
194 {
195 .compatible = "socionext,uniphier-pro5-peri-clock",
196 .data = uniphier_pro4_peri_clk_data,
197 },
198 {
199 .compatible = "socionext,uniphier-pxs2-peri-clock",
200 .data = uniphier_pro4_peri_clk_data,
201 },
202 {
203 .compatible = "socionext,uniphier-ld11-peri-clock",
204 .data = uniphier_pro4_peri_clk_data,
205 },
206 {
207 .compatible = "socionext,uniphier-ld20-peri-clock",
208 .data = uniphier_pro4_peri_clk_data,
209 },
Masahiro Yamada734d82f2016-09-16 16:40:03 +0900210 { /* sentinel */ }
211};
212
213static struct platform_driver uniphier_clk_driver = {
214 .probe = uniphier_clk_probe,
215 .remove = uniphier_clk_remove,
216 .driver = {
217 .name = "uniphier-clk",
218 .of_match_table = uniphier_clk_match,
219 },
220};
221builtin_platform_driver(uniphier_clk_driver);