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Jeeja KPe4e2d2f2015-10-07 11:31:52 +01001/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl-topology.h"
27#include "skl.h"
28#include "skl-tplg-interface.h"
29
Jeeja KPf7590d42015-10-07 11:31:53 +010030#define SKL_CH_FIXUP_MASK (1 << 0)
31#define SKL_RATE_FIXUP_MASK (1 << 1)
32#define SKL_FMT_FIXUP_MASK (1 << 2)
33
Jeeja KPe4e2d2f2015-10-07 11:31:52 +010034/*
35 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
36 * ignore. This helpers checks if the SKL driver handles this widget type
37 */
38static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
39{
40 switch (w->id) {
41 case snd_soc_dapm_dai_link:
42 case snd_soc_dapm_dai_in:
43 case snd_soc_dapm_aif_in:
44 case snd_soc_dapm_aif_out:
45 case snd_soc_dapm_dai_out:
46 case snd_soc_dapm_switch:
47 return false;
48 default:
49 return true;
50 }
51}
52
53/*
54 * Each pipelines needs memory to be allocated. Check if we have free memory
55 * from available pool. Then only add this to pool
56 * This is freed when pipe is deleted
57 * Note: DSP does actual memory management we only keep track for complete
58 * pool
59 */
60static bool skl_tplg_alloc_pipe_mem(struct skl *skl,
61 struct skl_module_cfg *mconfig)
62{
63 struct skl_sst *ctx = skl->skl_sst;
64
65 if (skl->resource.mem + mconfig->pipe->memory_pages >
66 skl->resource.max_mem) {
67 dev_err(ctx->dev,
68 "%s: module_id %d instance %d\n", __func__,
69 mconfig->id.module_id,
70 mconfig->id.instance_id);
71 dev_err(ctx->dev,
72 "exceeds ppl memory available %d mem %d\n",
73 skl->resource.max_mem, skl->resource.mem);
74 return false;
75 }
76
77 skl->resource.mem += mconfig->pipe->memory_pages;
78 return true;
79}
80
81/*
82 * Pipeline needs needs DSP CPU resources for computation, this is
83 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
84 *
85 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
86 * pipe. This adds the mcps to driver counter
87 * This is removed on pipeline delete
88 */
89static bool skl_tplg_alloc_pipe_mcps(struct skl *skl,
90 struct skl_module_cfg *mconfig)
91{
92 struct skl_sst *ctx = skl->skl_sst;
93
94 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
95 dev_err(ctx->dev,
96 "%s: module_id %d instance %d\n", __func__,
97 mconfig->id.module_id, mconfig->id.instance_id);
98 dev_err(ctx->dev,
99 "exceeds ppl memory available %d > mem %d\n",
100 skl->resource.max_mcps, skl->resource.mcps);
101 return false;
102 }
103
104 skl->resource.mcps += mconfig->mcps;
105 return true;
106}
107
108/*
109 * Free the mcps when tearing down
110 */
111static void
112skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
113{
114 skl->resource.mcps -= mconfig->mcps;
115}
116
117/*
118 * Free the memory when tearing down
119 */
120static void
121skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
122{
123 skl->resource.mem -= mconfig->pipe->memory_pages;
124}
125
Jeeja KPf7590d42015-10-07 11:31:53 +0100126
127static void skl_dump_mconfig(struct skl_sst *ctx,
128 struct skl_module_cfg *mcfg)
129{
130 dev_dbg(ctx->dev, "Dumping config\n");
131 dev_dbg(ctx->dev, "Input Format:\n");
132 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt.channels);
133 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt.s_freq);
134 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt.ch_cfg);
135 dev_dbg(ctx->dev, "valid bit depth = %d\n",
136 mcfg->in_fmt.valid_bit_depth);
137 dev_dbg(ctx->dev, "Output Format:\n");
138 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt.channels);
139 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt.s_freq);
140 dev_dbg(ctx->dev, "valid bit depth = %d\n",
141 mcfg->out_fmt.valid_bit_depth);
142 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt.ch_cfg);
143}
144
145static void skl_tplg_update_params(struct skl_module_fmt *fmt,
146 struct skl_pipe_params *params, int fixup)
147{
148 if (fixup & SKL_RATE_FIXUP_MASK)
149 fmt->s_freq = params->s_freq;
150 if (fixup & SKL_CH_FIXUP_MASK)
151 fmt->channels = params->ch;
152 if (fixup & SKL_FMT_FIXUP_MASK)
153 fmt->valid_bit_depth = params->s_fmt;
154}
155
156/*
157 * A pipeline may have modules which impact the pcm parameters, like SRC,
158 * channel converter, format converter.
159 * We need to calculate the output params by applying the 'fixup'
160 * Topology will tell driver which type of fixup is to be applied by
161 * supplying the fixup mask, so based on that we calculate the output
162 *
163 * Now In FE the pcm hw_params is source/target format. Same is applicable
164 * for BE with its hw_params invoked.
165 * here based on FE, BE pipeline and direction we calculate the input and
166 * outfix and then apply that for a module
167 */
168static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
169 struct skl_pipe_params *params, bool is_fe)
170{
171 int in_fixup, out_fixup;
172 struct skl_module_fmt *in_fmt, *out_fmt;
173
174 in_fmt = &m_cfg->in_fmt;
175 out_fmt = &m_cfg->out_fmt;
176
177 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
178 if (is_fe) {
179 in_fixup = m_cfg->params_fixup;
180 out_fixup = (~m_cfg->converter) &
181 m_cfg->params_fixup;
182 } else {
183 out_fixup = m_cfg->params_fixup;
184 in_fixup = (~m_cfg->converter) &
185 m_cfg->params_fixup;
186 }
187 } else {
188 if (is_fe) {
189 out_fixup = m_cfg->params_fixup;
190 in_fixup = (~m_cfg->converter) &
191 m_cfg->params_fixup;
192 } else {
193 in_fixup = m_cfg->params_fixup;
194 out_fixup = (~m_cfg->converter) &
195 m_cfg->params_fixup;
196 }
197 }
198
199 skl_tplg_update_params(in_fmt, params, in_fixup);
200 skl_tplg_update_params(out_fmt, params, out_fixup);
201}
202
203/*
204 * A module needs input and output buffers, which are dependent upon pcm
205 * params, so once we have calculate params, we need buffer calculation as
206 * well.
207 */
208static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
209 struct skl_module_cfg *mcfg)
210{
211 int multiplier = 1;
212
213 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
214 multiplier = 5;
215
216 mcfg->ibs = (mcfg->in_fmt.s_freq / 1000) *
217 (mcfg->in_fmt.channels) *
218 (mcfg->in_fmt.bit_depth >> 3) *
219 multiplier;
220
221 mcfg->obs = (mcfg->out_fmt.s_freq / 1000) *
222 (mcfg->out_fmt.channels) *
223 (mcfg->out_fmt.bit_depth >> 3) *
224 multiplier;
225}
226
227static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
228 struct skl_sst *ctx)
229{
230 struct skl_module_cfg *m_cfg = w->priv;
231 struct skl_pipe_params *params = m_cfg->pipe->p_params;
232 int p_conn_type = m_cfg->pipe->conn_type;
233 bool is_fe;
234
235 if (!m_cfg->params_fixup)
236 return;
237
238 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
239 w->name);
240
241 skl_dump_mconfig(ctx, m_cfg);
242
243 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
244 is_fe = true;
245 else
246 is_fe = false;
247
248 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
249 skl_tplg_update_buffer_size(ctx, m_cfg);
250
251 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
252 w->name);
253
254 skl_dump_mconfig(ctx, m_cfg);
255}
256
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100257/*
258 * A pipe can have multiple modules, each of them will be a DAPM widget as
259 * well. While managing a pipeline we need to get the list of all the
260 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
261 * to get the SKL type widgets in that pipeline
262 */
263static int skl_tplg_alloc_pipe_widget(struct device *dev,
264 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
265{
266 struct skl_module_cfg *src_module = NULL;
267 struct snd_soc_dapm_path *p = NULL;
268 struct skl_pipe_module *p_module = NULL;
269
270 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
271 if (!p_module)
272 return -ENOMEM;
273
274 p_module->w = w;
275 list_add_tail(&p_module->node, &pipe->w_list);
276
277 snd_soc_dapm_widget_for_each_sink_path(w, p) {
278 if ((p->sink->priv == NULL)
279 && (!is_skl_dsp_widget_type(w)))
280 continue;
281
282 if ((p->sink->priv != NULL) && p->connect
283 && is_skl_dsp_widget_type(p->sink)) {
284
285 src_module = p->sink->priv;
286 if (pipe->ppl_id == src_module->pipe->ppl_id)
287 skl_tplg_alloc_pipe_widget(dev,
288 p->sink, pipe);
289 }
290 }
291 return 0;
292}
293
294/*
295 * Inside a pipe instance, we can have various modules. These modules need
296 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
297 * skl_init_module() routine, so invoke that for all modules in a pipeline
298 */
299static int
300skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
301{
302 struct skl_pipe_module *w_module;
303 struct snd_soc_dapm_widget *w;
304 struct skl_module_cfg *mconfig;
305 struct skl_sst *ctx = skl->skl_sst;
306 int ret = 0;
307
308 list_for_each_entry(w_module, &pipe->w_list, node) {
309 w = w_module->w;
310 mconfig = w->priv;
311
312 /* check resource available */
313 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
314 return -ENOMEM;
315
Jeeja KPf7590d42015-10-07 11:31:53 +0100316 /*
317 * apply fix/conversion to module params based on
318 * FE/BE params
319 */
320 skl_tplg_update_module_params(w, ctx);
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100321 ret = skl_init_module(ctx, mconfig, NULL);
322 if (ret < 0)
323 return ret;
324 }
325
326 return 0;
327}
Vinod Kould93f8e52015-10-07 11:31:54 +0100328
329/*
330 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
331 * need create the pipeline. So we do following:
332 * - check the resources
333 * - Create the pipeline
334 * - Initialize the modules in pipeline
335 * - finally bind all modules together
336 */
337static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
338 struct skl *skl)
339{
340 int ret;
341 struct skl_module_cfg *mconfig = w->priv;
342 struct skl_pipe_module *w_module;
343 struct skl_pipe *s_pipe = mconfig->pipe;
344 struct skl_module_cfg *src_module = NULL, *dst_module;
345 struct skl_sst *ctx = skl->skl_sst;
346
347 /* check resource available */
348 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
349 return -EBUSY;
350
351 if (!skl_tplg_alloc_pipe_mem(skl, mconfig))
352 return -ENOMEM;
353
354 /*
355 * Create a list of modules for pipe.
356 * This list contains modules from source to sink
357 */
358 ret = skl_create_pipeline(ctx, mconfig->pipe);
359 if (ret < 0)
360 return ret;
361
362 /*
363 * we create a w_list of all widgets in that pipe. This list is not
364 * freed on PMD event as widgets within a pipe are static. This
365 * saves us cycles to get widgets in pipe every time.
366 *
367 * So if we have already initialized all the widgets of a pipeline
368 * we skip, so check for list_empty and create the list if empty
369 */
370 if (list_empty(&s_pipe->w_list)) {
371 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
372 if (ret < 0)
373 return ret;
374 }
375
376 /* Init all pipe modules from source to sink */
377 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
378 if (ret < 0)
379 return ret;
380
381 /* Bind modules from source to sink */
382 list_for_each_entry(w_module, &s_pipe->w_list, node) {
383 dst_module = w_module->w->priv;
384
385 if (src_module == NULL) {
386 src_module = dst_module;
387 continue;
388 }
389
390 ret = skl_bind_modules(ctx, src_module, dst_module);
391 if (ret < 0)
392 return ret;
393
394 src_module = dst_module;
395 }
396
397 return 0;
398}
399
Jeeja KP8724ff12015-10-27 09:22:52 +0900400static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
401 struct skl *skl,
402 struct skl_module_cfg *src_mconfig)
Vinod Kould93f8e52015-10-07 11:31:54 +0100403{
404 struct snd_soc_dapm_path *p;
Jeeja KP8724ff12015-10-27 09:22:52 +0900405 struct snd_soc_dapm_widget *sink = NULL;
406 struct skl_module_cfg *sink_mconfig;
Vinod Kould93f8e52015-10-07 11:31:54 +0100407 struct skl_sst *ctx = skl->skl_sst;
Jeeja KP8724ff12015-10-27 09:22:52 +0900408 int ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100409
Jeeja KP8724ff12015-10-27 09:22:52 +0900410 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Kould93f8e52015-10-07 11:31:54 +0100411 if (!p->connect)
412 continue;
413
414 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
415 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
416
Jeeja KP8724ff12015-10-27 09:22:52 +0900417 sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100418 /*
419 * here we will check widgets in sink pipelines, so that
420 * can be any widgets type and we are only interested if
421 * they are ones used for SKL so check that first
422 */
423 if ((p->sink->priv != NULL) &&
424 is_skl_dsp_widget_type(p->sink)) {
425
426 sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100427 sink_mconfig = sink->priv;
428
429 /* Bind source to sink, mixin is always source */
430 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
431 if (ret)
432 return ret;
433
434 /* Start sinks pipe first */
435 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
436 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
437 if (ret)
438 return ret;
439 }
Vinod Kould93f8e52015-10-07 11:31:54 +0100440 }
441 }
442
Jeeja KP8724ff12015-10-27 09:22:52 +0900443 if (!sink)
444 return skl_tplg_bind_sinks(sink, skl, src_mconfig);
445
446 return 0;
447}
448
449/*
450 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
451 * we need to do following:
452 * - Bind to sink pipeline
453 * Since the sink pipes can be running and we don't get mixer event on
454 * connect for already running mixer, we need to find the sink pipes
455 * here and bind to them. This way dynamic connect works.
456 * - Start sink pipeline, if not running
457 * - Then run current pipe
458 */
459static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
460 struct skl *skl)
461{
462 struct skl_module_cfg *src_mconfig;
463 struct skl_sst *ctx = skl->skl_sst;
464 int ret = 0;
465
466 src_mconfig = w->priv;
467
468 /*
469 * find which sink it is connected to, bind with the sink,
470 * if sink is not started, start sink pipe first, then start
471 * this pipe
472 */
473 ret = skl_tplg_bind_sinks(w, skl, src_mconfig);
474 if (ret)
475 return ret;
476
Vinod Kould93f8e52015-10-07 11:31:54 +0100477 /* Start source pipe last after starting all sinks */
478 ret = skl_run_pipe(ctx, src_mconfig->pipe);
479 if (ret)
480 return ret;
481
482 return 0;
483}
484
Jeeja KP8724ff12015-10-27 09:22:52 +0900485static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
486 struct snd_soc_dapm_widget *w, struct skl *skl)
487{
488 struct snd_soc_dapm_path *p;
489 struct snd_soc_dapm_widget *src_w = NULL;
490 struct skl_sst *ctx = skl->skl_sst;
491
492 snd_soc_dapm_widget_for_each_source_path(w, p) {
493 src_w = p->source;
494 if (!p->connect)
495 continue;
496
497 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
498 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
499
500 /*
501 * here we will check widgets in sink pipelines, so that can
502 * be any widgets type and we are only interested if they are
503 * ones used for SKL so check that first
504 */
505 if ((p->source->priv != NULL) &&
506 is_skl_dsp_widget_type(p->source)) {
507 return p->source;
508 }
509 }
510
511 if (src_w != NULL)
512 return skl_get_src_dsp_widget(src_w, skl);
513
514 return NULL;
515}
516
Vinod Kould93f8e52015-10-07 11:31:54 +0100517/*
518 * in the Post-PMU event of mixer we need to do following:
519 * - Check if this pipe is running
520 * - if not, then
521 * - bind this pipeline to its source pipeline
522 * if source pipe is already running, this means it is a dynamic
523 * connection and we need to bind only to that pipe
524 * - start this pipeline
525 */
526static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
527 struct skl *skl)
528{
529 int ret = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100530 struct snd_soc_dapm_widget *source, *sink;
531 struct skl_module_cfg *src_mconfig, *sink_mconfig;
532 struct skl_sst *ctx = skl->skl_sst;
533 int src_pipe_started = 0;
534
535 sink = w;
536 sink_mconfig = sink->priv;
537
538 /*
539 * If source pipe is already started, that means source is driving
540 * one more sink before this sink got connected, Since source is
541 * started, bind this sink to source and start this pipe.
542 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900543 source = skl_get_src_dsp_widget(w, skl);
544 if (source != NULL) {
545 src_mconfig = source->priv;
546 sink_mconfig = sink->priv;
547 src_pipe_started = 1;
Vinod Kould93f8e52015-10-07 11:31:54 +0100548
549 /*
Jeeja KP8724ff12015-10-27 09:22:52 +0900550 * check pipe state, then no need to bind or start the
551 * pipe
Vinod Kould93f8e52015-10-07 11:31:54 +0100552 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900553 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
554 src_pipe_started = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100555 }
556
557 if (src_pipe_started) {
558 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
559 if (ret)
560 return ret;
561
562 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
563 }
564
565 return ret;
566}
567
568/*
569 * in the Pre-PMD event of mixer we need to do following:
570 * - Stop the pipe
571 * - find the source connections and remove that from dapm_path_list
572 * - unbind with source pipelines if still connected
573 */
574static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
575 struct skl *skl)
576{
Vinod Kould93f8e52015-10-07 11:31:54 +0100577 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900578 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100579 struct skl_sst *ctx = skl->skl_sst;
580
Jeeja KPce1b5552015-10-27 09:22:51 +0900581 sink_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100582
583 /* Stop the pipe */
584 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
585 if (ret)
586 return ret;
587
Jeeja KPce1b5552015-10-27 09:22:51 +0900588 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
589 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
590 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
591 if (!src_mconfig)
592 continue;
593 /*
594 * If path_found == 1, that means pmd for source
595 * pipe has not occurred, source is connected to
596 * some other sink. so its responsibility of sink
597 * to unbind itself from source.
598 */
599 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
600 if (ret < 0)
601 return ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100602
Jeeja KPce1b5552015-10-27 09:22:51 +0900603 ret = skl_unbind_modules(ctx,
604 src_mconfig, sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100605 }
606 }
607
Vinod Kould93f8e52015-10-07 11:31:54 +0100608 return ret;
609}
610
611/*
612 * in the Post-PMD event of mixer we need to do following:
613 * - Free the mcps used
614 * - Free the mem used
615 * - Unbind the modules within the pipeline
616 * - Delete the pipeline (modules are not required to be explicitly
617 * deleted, pipeline delete is enough here
618 */
619static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
620 struct skl *skl)
621{
622 struct skl_module_cfg *mconfig = w->priv;
623 struct skl_pipe_module *w_module;
624 struct skl_module_cfg *src_module = NULL, *dst_module;
625 struct skl_sst *ctx = skl->skl_sst;
626 struct skl_pipe *s_pipe = mconfig->pipe;
627 int ret = 0;
628
629 skl_tplg_free_pipe_mcps(skl, mconfig);
630
631 list_for_each_entry(w_module, &s_pipe->w_list, node) {
632 dst_module = w_module->w->priv;
633
634 if (src_module == NULL) {
635 src_module = dst_module;
636 continue;
637 }
638
639 ret = skl_unbind_modules(ctx, src_module, dst_module);
640 if (ret < 0)
641 return ret;
642
643 src_module = dst_module;
644 }
645
646 ret = skl_delete_pipe(ctx, mconfig->pipe);
647 skl_tplg_free_pipe_mem(skl, mconfig);
648
649 return ret;
650}
651
652/*
653 * in the Post-PMD event of PGA we need to do following:
654 * - Free the mcps used
655 * - Stop the pipeline
656 * - In source pipe is connected, unbind with source pipelines
657 */
658static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
659 struct skl *skl)
660{
Vinod Kould93f8e52015-10-07 11:31:54 +0100661 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900662 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100663 struct skl_sst *ctx = skl->skl_sst;
664
Jeeja KPce1b5552015-10-27 09:22:51 +0900665 src_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100666
667 skl_tplg_free_pipe_mcps(skl, src_mconfig);
668 /* Stop the pipe since this is a mixin module */
669 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
670 if (ret)
671 return ret;
672
Jeeja KPce1b5552015-10-27 09:22:51 +0900673 for (i = 0; i < src_mconfig->max_out_queue; i++) {
674 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
675 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
676 if (!sink_mconfig)
677 continue;
678 /*
679 * This is a connecter and if path is found that means
680 * unbind between source and sink has not happened yet
681 */
682 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
683 if (ret < 0)
684 return ret;
685 ret = skl_unbind_modules(ctx, src_mconfig,
686 sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100687 }
688 }
689
Vinod Kould93f8e52015-10-07 11:31:54 +0100690 return ret;
691}
692
693/*
694 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
695 * mixer is not required then it is treated as static mixer aka vmixer with
696 * a hard path to source module
697 * So we don't need to check if source is started or not as hard path puts
698 * dependency on each other
699 */
700static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
701 struct snd_kcontrol *k, int event)
702{
703 struct snd_soc_dapm_context *dapm = w->dapm;
704 struct skl *skl = get_skl_ctx(dapm->dev);
705
706 switch (event) {
707 case SND_SOC_DAPM_PRE_PMU:
708 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
709
710 case SND_SOC_DAPM_POST_PMD:
711 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
712 }
713
714 return 0;
715}
716
717/*
718 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
719 * second one is required that is created as another pipe entity.
720 * The mixer is responsible for pipe management and represent a pipeline
721 * instance
722 */
723static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
724 struct snd_kcontrol *k, int event)
725{
726 struct snd_soc_dapm_context *dapm = w->dapm;
727 struct skl *skl = get_skl_ctx(dapm->dev);
728
729 switch (event) {
730 case SND_SOC_DAPM_PRE_PMU:
731 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
732
733 case SND_SOC_DAPM_POST_PMU:
734 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
735
736 case SND_SOC_DAPM_PRE_PMD:
737 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
738
739 case SND_SOC_DAPM_POST_PMD:
740 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
741 }
742
743 return 0;
744}
745
746/*
747 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
748 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
749 * the sink when it is running (two FE to one BE or one FE to two BE)
750 * scenarios
751 */
752static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
753 struct snd_kcontrol *k, int event)
754
755{
756 struct snd_soc_dapm_context *dapm = w->dapm;
757 struct skl *skl = get_skl_ctx(dapm->dev);
758
759 switch (event) {
760 case SND_SOC_DAPM_PRE_PMU:
761 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
762
763 case SND_SOC_DAPM_POST_PMD:
764 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
765 }
766
767 return 0;
768}
Vinod Koulcfb0a872015-10-07 11:31:55 +0100769
770/*
771 * The FE params are passed by hw_params of the DAI.
772 * On hw_params, the params are stored in Gateway module of the FE and we
773 * need to calculate the format in DSP module configuration, that
774 * conversion is done here
775 */
776int skl_tplg_update_pipe_params(struct device *dev,
777 struct skl_module_cfg *mconfig,
778 struct skl_pipe_params *params)
779{
780 struct skl_pipe *pipe = mconfig->pipe;
781 struct skl_module_fmt *format = NULL;
782
783 memcpy(pipe->p_params, params, sizeof(*params));
784
785 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
786 format = &mconfig->in_fmt;
787 else
788 format = &mconfig->out_fmt;
789
790 /* set the hw_params */
791 format->s_freq = params->s_freq;
792 format->channels = params->ch;
793 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
794
795 /*
796 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
797 * container so update bit depth accordingly
798 */
799 switch (format->valid_bit_depth) {
800 case SKL_DEPTH_16BIT:
801 format->bit_depth = format->valid_bit_depth;
802 break;
803
804 case SKL_DEPTH_24BIT:
Jeeja KP6654f392015-10-27 09:22:46 +0900805 case SKL_DEPTH_32BIT:
Vinod Koulcfb0a872015-10-07 11:31:55 +0100806 format->bit_depth = SKL_DEPTH_32BIT;
807 break;
808
809 default:
810 dev_err(dev, "Invalid bit depth %x for pipe\n",
811 format->valid_bit_depth);
812 return -EINVAL;
813 }
814
815 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
816 mconfig->ibs = (format->s_freq / 1000) *
817 (format->channels) *
818 (format->bit_depth >> 3);
819 } else {
820 mconfig->obs = (format->s_freq / 1000) *
821 (format->channels) *
822 (format->bit_depth >> 3);
823 }
824
825 return 0;
826}
827
828/*
829 * Query the module config for the FE DAI
830 * This is used to find the hw_params set for that DAI and apply to FE
831 * pipeline
832 */
833struct skl_module_cfg *
834skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
835{
836 struct snd_soc_dapm_widget *w;
837 struct snd_soc_dapm_path *p = NULL;
838
839 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
840 w = dai->playback_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530841 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100842 if (p->connect && p->sink->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900843 !is_skl_dsp_widget_type(p->sink))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100844 continue;
845
846 if (p->sink->priv) {
847 dev_dbg(dai->dev, "set params for %s\n",
848 p->sink->name);
849 return p->sink->priv;
850 }
851 }
852 } else {
853 w = dai->capture_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530854 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100855 if (p->connect && p->source->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900856 !is_skl_dsp_widget_type(p->source))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100857 continue;
858
859 if (p->source->priv) {
860 dev_dbg(dai->dev, "set params for %s\n",
861 p->source->name);
862 return p->source->priv;
863 }
864 }
865 }
866
867 return NULL;
868}
869
870static u8 skl_tplg_be_link_type(int dev_type)
871{
872 int ret;
873
874 switch (dev_type) {
875 case SKL_DEVICE_BT:
876 ret = NHLT_LINK_SSP;
877 break;
878
879 case SKL_DEVICE_DMIC:
880 ret = NHLT_LINK_DMIC;
881 break;
882
883 case SKL_DEVICE_I2S:
884 ret = NHLT_LINK_SSP;
885 break;
886
887 case SKL_DEVICE_HDALINK:
888 ret = NHLT_LINK_HDA;
889 break;
890
891 default:
892 ret = NHLT_LINK_INVALID;
893 break;
894 }
895
896 return ret;
897}
898
899/*
900 * Fill the BE gateway parameters
901 * The BE gateway expects a blob of parameters which are kept in the ACPI
902 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
903 * The port can have multiple settings so pick based on the PCM
904 * parameters
905 */
906static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
907 struct skl_module_cfg *mconfig,
908 struct skl_pipe_params *params)
909{
910 struct skl_pipe *pipe = mconfig->pipe;
911 struct nhlt_specific_cfg *cfg;
912 struct skl *skl = get_skl_ctx(dai->dev);
913 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
914
915 memcpy(pipe->p_params, params, sizeof(*params));
916
Jeeja KPb30c2752015-10-27 09:22:48 +0900917 if (link_type == NHLT_LINK_HDA)
918 return 0;
919
Vinod Koulcfb0a872015-10-07 11:31:55 +0100920 /* update the blob based on virtual bus_id*/
921 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
922 params->s_fmt, params->ch,
923 params->s_freq, params->stream);
924 if (cfg) {
925 mconfig->formats_config.caps_size = cfg->size;
Jeeja KPbc032812015-10-22 23:22:35 +0530926 mconfig->formats_config.caps = (u32 *) &cfg->caps;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100927 } else {
928 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
929 mconfig->vbus_id, link_type,
930 params->stream);
931 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
932 params->ch, params->s_freq, params->s_fmt);
933 return -EINVAL;
934 }
935
936 return 0;
937}
938
939static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
940 struct snd_soc_dapm_widget *w,
941 struct skl_pipe_params *params)
942{
943 struct snd_soc_dapm_path *p;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530944 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100945
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530946 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100947 if (p->connect && is_skl_dsp_widget_type(p->source) &&
948 p->source->priv) {
949
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530950 if (!p->source->power) {
951 ret = skl_tplg_be_fill_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +0100952 dai, p->source->priv,
953 params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530954 if (ret < 0)
955 return ret;
956 } else {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100957 return -EBUSY;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530958 }
Vinod Koulcfb0a872015-10-07 11:31:55 +0100959 } else {
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530960 ret = skl_tplg_be_set_src_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +0100961 dai, p->source, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530962 if (ret < 0)
963 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100964 }
965 }
966
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530967 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100968}
969
970static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
971 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
972{
973 struct snd_soc_dapm_path *p = NULL;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530974 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100975
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530976 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100977 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
978 p->sink->priv) {
979
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530980 if (!p->sink->power) {
981 ret = skl_tplg_be_fill_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +0100982 dai, p->sink->priv, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530983 if (ret < 0)
984 return ret;
985 } else {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100986 return -EBUSY;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530987 }
Vinod Koulcfb0a872015-10-07 11:31:55 +0100988
989 } else {
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530990 ret = skl_tplg_be_set_sink_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +0100991 dai, p->sink, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530992 if (ret < 0)
993 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100994 }
995 }
996
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530997 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100998}
999
1000/*
1001 * BE hw_params can be a source parameters (capture) or sink parameters
1002 * (playback). Based on sink and source we need to either find the source
1003 * list or the sink list and set the pipeline parameters
1004 */
1005int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1006 struct skl_pipe_params *params)
1007{
1008 struct snd_soc_dapm_widget *w;
1009
1010 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1011 w = dai->playback_widget;
1012
1013 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1014
1015 } else {
1016 w = dai->capture_widget;
1017
1018 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1019 }
1020
1021 return 0;
1022}
Vinod Koul3af36702015-10-07 11:31:56 +01001023
1024static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1025 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1026 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1027 {SKL_PGA_EVENT, skl_tplg_pga_event},
1028};
1029
1030/*
1031 * The topology binary passes the pin info for a module so initialize the pin
1032 * info passed into module instance
1033 */
Jeeja KP6abca1d2015-10-22 23:22:42 +05301034static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1035 struct skl_module_pin *m_pin,
1036 bool is_dynamic, int max_pin)
Vinod Koul3af36702015-10-07 11:31:56 +01001037{
1038 int i;
1039
1040 for (i = 0; i < max_pin; i++) {
Jeeja KP6abca1d2015-10-22 23:22:42 +05301041 m_pin[i].id.module_id = dfw_pin[i].module_id;
1042 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
Vinod Koul3af36702015-10-07 11:31:56 +01001043 m_pin[i].in_use = false;
Jeeja KP6abca1d2015-10-22 23:22:42 +05301044 m_pin[i].is_dynamic = is_dynamic;
Jeeja KP4f745702015-10-27 09:22:49 +09001045 m_pin[i].pin_state = SKL_PIN_UNBIND;
Vinod Koul3af36702015-10-07 11:31:56 +01001046 }
1047}
1048
1049/*
1050 * Add pipeline from topology binary into driver pipeline list
1051 *
1052 * If already added we return that instance
1053 * Otherwise we create a new instance and add into driver list
1054 */
1055static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1056 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1057{
1058 struct skl_pipeline *ppl;
1059 struct skl_pipe *pipe;
1060 struct skl_pipe_params *params;
1061
1062 list_for_each_entry(ppl, &skl->ppl_list, node) {
1063 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1064 return ppl->pipe;
1065 }
1066
1067 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1068 if (!ppl)
1069 return NULL;
1070
1071 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1072 if (!pipe)
1073 return NULL;
1074
1075 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1076 if (!params)
1077 return NULL;
1078
1079 pipe->ppl_id = dfw_pipe->pipe_id;
1080 pipe->memory_pages = dfw_pipe->memory_pages;
1081 pipe->pipe_priority = dfw_pipe->pipe_priority;
1082 pipe->conn_type = dfw_pipe->conn_type;
1083 pipe->state = SKL_PIPE_INVALID;
1084 pipe->p_params = params;
1085 INIT_LIST_HEAD(&pipe->w_list);
1086
1087 ppl->pipe = pipe;
1088 list_add(&ppl->node, &skl->ppl_list);
1089
1090 return ppl->pipe;
1091}
1092
1093/*
1094 * Topology core widget load callback
1095 *
1096 * This is used to save the private data for each widget which gives
1097 * information to the driver about module and pipeline parameters which DSP
1098 * FW expects like ids, resource values, formats etc
1099 */
1100static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001101 struct snd_soc_dapm_widget *w,
1102 struct snd_soc_tplg_dapm_widget *tplg_w)
Vinod Koul3af36702015-10-07 11:31:56 +01001103{
1104 int ret;
1105 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1106 struct skl *skl = ebus_to_skl(ebus);
1107 struct hdac_bus *bus = ebus_to_hbus(ebus);
1108 struct skl_module_cfg *mconfig;
1109 struct skl_pipe *pipe;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001110 struct skl_dfw_module *dfw_config =
1111 (struct skl_dfw_module *)tplg_w->priv.data;
Vinod Koul3af36702015-10-07 11:31:56 +01001112
1113 if (!tplg_w->priv.size)
1114 goto bind_event;
1115
1116 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1117
1118 if (!mconfig)
1119 return -ENOMEM;
1120
1121 w->priv = mconfig;
1122 mconfig->id.module_id = dfw_config->module_id;
1123 mconfig->id.instance_id = dfw_config->instance_id;
1124 mconfig->mcps = dfw_config->max_mcps;
1125 mconfig->ibs = dfw_config->ibs;
1126 mconfig->obs = dfw_config->obs;
1127 mconfig->core_id = dfw_config->core_id;
1128 mconfig->max_in_queue = dfw_config->max_in_queue;
1129 mconfig->max_out_queue = dfw_config->max_out_queue;
1130 mconfig->is_loadable = dfw_config->is_loadable;
1131 mconfig->in_fmt.channels = dfw_config->in_fmt.channels;
1132 mconfig->in_fmt.s_freq = dfw_config->in_fmt.freq;
1133 mconfig->in_fmt.bit_depth = dfw_config->in_fmt.bit_depth;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001134 mconfig->in_fmt.valid_bit_depth =
1135 dfw_config->in_fmt.valid_bit_depth;
Vinod Koul3af36702015-10-07 11:31:56 +01001136 mconfig->in_fmt.ch_cfg = dfw_config->in_fmt.ch_cfg;
1137 mconfig->out_fmt.channels = dfw_config->out_fmt.channels;
1138 mconfig->out_fmt.s_freq = dfw_config->out_fmt.freq;
1139 mconfig->out_fmt.bit_depth = dfw_config->out_fmt.bit_depth;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001140 mconfig->out_fmt.valid_bit_depth =
1141 dfw_config->out_fmt.valid_bit_depth;
Vinod Koul3af36702015-10-07 11:31:56 +01001142 mconfig->out_fmt.ch_cfg = dfw_config->out_fmt.ch_cfg;
1143 mconfig->params_fixup = dfw_config->params_fixup;
1144 mconfig->converter = dfw_config->converter;
1145 mconfig->m_type = dfw_config->module_type;
1146 mconfig->vbus_id = dfw_config->vbus_id;
1147
1148 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1149 if (pipe)
1150 mconfig->pipe = pipe;
1151
1152 mconfig->dev_type = dfw_config->dev_type;
1153 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1154 mconfig->time_slot = dfw_config->time_slot;
1155 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1156
Jeeja KPb663a8c2015-10-07 11:31:57 +01001157 mconfig->m_in_pin = devm_kzalloc(bus->dev,
1158 (mconfig->max_in_queue) *
1159 sizeof(*mconfig->m_in_pin),
1160 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001161 if (!mconfig->m_in_pin)
1162 return -ENOMEM;
1163
Jeeja KP6abca1d2015-10-22 23:22:42 +05301164 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1165 sizeof(*mconfig->m_out_pin),
1166 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001167 if (!mconfig->m_out_pin)
1168 return -ENOMEM;
1169
Jeeja KP6abca1d2015-10-22 23:22:42 +05301170 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1171 dfw_config->is_dynamic_in_pin,
1172 mconfig->max_in_queue);
1173
1174 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1175 dfw_config->is_dynamic_out_pin,
1176 mconfig->max_out_queue);
1177
Vinod Koul3af36702015-10-07 11:31:56 +01001178
1179 if (mconfig->formats_config.caps_size == 0)
1180 goto bind_event;
1181
1182 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001183 mconfig->formats_config.caps_size, GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001184
1185 if (mconfig->formats_config.caps == NULL)
1186 return -ENOMEM;
1187
1188 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001189 dfw_config->caps.caps_size);
Vinod Koul3af36702015-10-07 11:31:56 +01001190
1191bind_event:
1192 if (tplg_w->event_type == 0) {
Vinod Koul3373f712015-10-07 16:39:38 +01001193 dev_dbg(bus->dev, "ASoC: No event handler required\n");
Vinod Koul3af36702015-10-07 11:31:56 +01001194 return 0;
1195 }
1196
1197 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001198 ARRAY_SIZE(skl_tplg_widget_ops),
1199 tplg_w->event_type);
Vinod Koul3af36702015-10-07 11:31:56 +01001200
1201 if (ret) {
1202 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1203 __func__, tplg_w->event_type);
1204 return -EINVAL;
1205 }
1206
1207 return 0;
1208}
1209
1210static struct snd_soc_tplg_ops skl_tplg_ops = {
1211 .widget_load = skl_tplg_widget_load,
1212};
1213
1214/* This will be read from topology manifest, currently defined here */
1215#define SKL_MAX_MCPS 30000000
1216#define SKL_FW_MAX_MEM 1000000
1217
1218/*
1219 * SKL topology init routine
1220 */
1221int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1222{
1223 int ret;
1224 const struct firmware *fw;
1225 struct hdac_bus *bus = ebus_to_hbus(ebus);
1226 struct skl *skl = ebus_to_skl(ebus);
1227
1228 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1229 if (ret < 0) {
Jeeja KPb663a8c2015-10-07 11:31:57 +01001230 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
Vinod Koul3af36702015-10-07 11:31:56 +01001231 "dfw_sst.bin", ret);
1232 return ret;
1233 }
1234
1235 /*
1236 * The complete tplg for SKL is loaded as index 0, we don't use
1237 * any other index
1238 */
Jeeja KPb663a8c2015-10-07 11:31:57 +01001239 ret = snd_soc_tplg_component_load(&platform->component,
1240 &skl_tplg_ops, fw, 0);
Vinod Koul3af36702015-10-07 11:31:56 +01001241 if (ret < 0) {
1242 dev_err(bus->dev, "tplg component load failed%d\n", ret);
1243 return -EINVAL;
1244 }
1245
1246 skl->resource.max_mcps = SKL_MAX_MCPS;
1247 skl->resource.max_mem = SKL_FW_MAX_MEM;
1248
1249 return 0;
1250}