Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/mips/dec/time.c |
| 3 | * |
| 4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds |
| 5 | * Copyright (C) 2000, 2003 Maciej W. Rozycki |
| 6 | * |
| 7 | * This file contains the time handling details for PC-style clocks as |
| 8 | * found in some MIPS systems. |
| 9 | * |
| 10 | */ |
| 11 | #include <linux/bcd.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/mc146818rtc.h> |
| 17 | #include <linux/mm.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/param.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/string.h> |
| 22 | #include <linux/time.h> |
| 23 | #include <linux/types.h> |
| 24 | |
| 25 | #include <asm/bootinfo.h> |
| 26 | #include <asm/cpu.h> |
| 27 | #include <asm/div64.h> |
| 28 | #include <asm/io.h> |
| 29 | #include <asm/irq.h> |
| 30 | #include <asm/mipsregs.h> |
| 31 | #include <asm/sections.h> |
| 32 | #include <asm/time.h> |
| 33 | |
| 34 | #include <asm/dec/interrupts.h> |
| 35 | #include <asm/dec/ioasic.h> |
| 36 | #include <asm/dec/ioasic_addrs.h> |
| 37 | #include <asm/dec/machtype.h> |
| 38 | |
| 39 | |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 40 | /* |
| 41 | * Returns true if a clock update is in progress |
| 42 | */ |
| 43 | static inline unsigned char dec_rtc_is_updating(void) |
| 44 | { |
| 45 | unsigned char uip; |
| 46 | unsigned long flags; |
| 47 | |
| 48 | spin_lock_irqsave(&rtc_lock, flags); |
| 49 | uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP); |
| 50 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 51 | return uip; |
| 52 | } |
| 53 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | static unsigned long dec_rtc_get_time(void) |
| 55 | { |
| 56 | unsigned int year, mon, day, hour, min, sec, real_year; |
| 57 | int i; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 58 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
| 60 | /* The Linux interpretation of the DS1287 clock register contents: |
| 61 | * When the Update-In-Progress (UIP) flag goes from 1 to 0, the |
| 62 | * RTC registers show the second which has precisely just started. |
| 63 | * Let's hope other operating systems interpret the RTC the same way. |
| 64 | */ |
| 65 | /* read RTC exactly on falling edge of update flag */ |
| 66 | for (i = 0; i < 1000000; i++) /* may take up to 1 second... */ |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 67 | if (dec_rtc_is_updating()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | break; |
| 69 | for (i = 0; i < 1000000; i++) /* must try at least 2.228 ms */ |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 70 | if (!dec_rtc_is_updating()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | break; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 72 | spin_lock_irqsave(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | /* Isn't this overkill? UIP above should guarantee consistency */ |
| 74 | do { |
| 75 | sec = CMOS_READ(RTC_SECONDS); |
| 76 | min = CMOS_READ(RTC_MINUTES); |
| 77 | hour = CMOS_READ(RTC_HOURS); |
| 78 | day = CMOS_READ(RTC_DAY_OF_MONTH); |
| 79 | mon = CMOS_READ(RTC_MONTH); |
| 80 | year = CMOS_READ(RTC_YEAR); |
| 81 | } while (sec != CMOS_READ(RTC_SECONDS)); |
| 82 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
| 83 | sec = BCD2BIN(sec); |
| 84 | min = BCD2BIN(min); |
| 85 | hour = BCD2BIN(hour); |
| 86 | day = BCD2BIN(day); |
| 87 | mon = BCD2BIN(mon); |
| 88 | year = BCD2BIN(year); |
| 89 | } |
| 90 | /* |
| 91 | * The PROM will reset the year to either '72 or '73. |
| 92 | * Therefore we store the real year separately, in one |
| 93 | * of unused BBU RAM locations. |
| 94 | */ |
| 95 | real_year = CMOS_READ(RTC_DEC_YEAR); |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 96 | spin_unlock_irqrestore(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | year += real_year - 72 + 2000; |
| 98 | |
| 99 | return mktime(year, mon, day, hour, min, sec); |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * In order to set the CMOS clock precisely, dec_rtc_set_mmss has to |
| 104 | * be called 500 ms after the second nowtime has started, because when |
| 105 | * nowtime is written into the registers of the CMOS clock, it will |
| 106 | * jump to the next second precisely 500 ms later. Check the Dallas |
| 107 | * DS1287 data sheet for details. |
| 108 | */ |
| 109 | static int dec_rtc_set_mmss(unsigned long nowtime) |
| 110 | { |
| 111 | int retval = 0; |
| 112 | int real_seconds, real_minutes, cmos_minutes; |
| 113 | unsigned char save_control, save_freq_select; |
| 114 | |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 115 | /* irq are locally disabled here */ |
| 116 | spin_lock(&rtc_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | /* tell the clock it's being set */ |
| 118 | save_control = CMOS_READ(RTC_CONTROL); |
| 119 | CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL); |
| 120 | |
| 121 | /* stop and reset prescaler */ |
| 122 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 123 | CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT); |
| 124 | |
| 125 | cmos_minutes = CMOS_READ(RTC_MINUTES); |
| 126 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) |
| 127 | cmos_minutes = BCD2BIN(cmos_minutes); |
| 128 | |
| 129 | /* |
| 130 | * since we're only adjusting minutes and seconds, |
| 131 | * don't interfere with hour overflow. This avoids |
| 132 | * messing with unknown time zones but requires your |
| 133 | * RTC not to be off by more than 15 minutes |
| 134 | */ |
| 135 | real_seconds = nowtime % 60; |
| 136 | real_minutes = nowtime / 60; |
| 137 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) |
| 138 | real_minutes += 30; /* correct for half hour time zone */ |
| 139 | real_minutes %= 60; |
| 140 | |
| 141 | if (abs(real_minutes - cmos_minutes) < 30) { |
| 142 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
| 143 | real_seconds = BIN2BCD(real_seconds); |
| 144 | real_minutes = BIN2BCD(real_minutes); |
| 145 | } |
| 146 | CMOS_WRITE(real_seconds, RTC_SECONDS); |
| 147 | CMOS_WRITE(real_minutes, RTC_MINUTES); |
| 148 | } else { |
| 149 | printk(KERN_WARNING |
| 150 | "set_rtc_mmss: can't update from %d to %d\n", |
| 151 | cmos_minutes, real_minutes); |
| 152 | retval = -1; |
| 153 | } |
| 154 | |
| 155 | /* The following flags have to be released exactly in this order, |
| 156 | * otherwise the DS1287 will not reset the oscillator and will not |
| 157 | * update precisely 500 ms later. You won't find this mentioned |
| 158 | * in the Dallas Semiconductor data sheets, but who believes data |
| 159 | * sheets anyway ... -- Markus Kuhn |
| 160 | */ |
| 161 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 162 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 163 | spin_unlock(&rtc_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | |
| 165 | return retval; |
| 166 | } |
| 167 | |
| 168 | |
| 169 | static int dec_timer_state(void) |
| 170 | { |
| 171 | return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; |
| 172 | } |
| 173 | |
| 174 | static void dec_timer_ack(void) |
| 175 | { |
| 176 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ |
| 177 | } |
| 178 | |
| 179 | static unsigned int dec_ioasic_hpt_read(void) |
| 180 | { |
| 181 | /* |
| 182 | * The free-running counter is 32-bit which is good for about |
| 183 | * 2 minutes, 50 seconds at possible count rates of up to 25MHz. |
| 184 | */ |
| 185 | return ioasic_read(IO_REG_FCTR); |
| 186 | } |
| 187 | |
| 188 | static void dec_ioasic_hpt_init(unsigned int count) |
| 189 | { |
| 190 | ioasic_write(IO_REG_FCTR, ioasic_read(IO_REG_FCTR) - count); |
| 191 | } |
| 192 | |
| 193 | |
| 194 | void __init dec_time_init(void) |
| 195 | { |
Yoichi Yuasa | d23ee8f | 2006-03-27 01:16:33 -0800 | [diff] [blame^] | 196 | rtc_mips_get_time = dec_rtc_get_time; |
| 197 | rtc_mips_set_mmss = dec_rtc_set_mmss; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | |
| 199 | mips_timer_state = dec_timer_state; |
| 200 | mips_timer_ack = dec_timer_ack; |
| 201 | |
| 202 | if (!cpu_has_counter && IOASIC) { |
| 203 | /* For pre-R4k systems we use the I/O ASIC's counter. */ |
| 204 | mips_hpt_read = dec_ioasic_hpt_read; |
| 205 | mips_hpt_init = dec_ioasic_hpt_init; |
| 206 | } |
| 207 | |
| 208 | /* Set up the rate of periodic DS1287 interrupts. */ |
| 209 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - LOG_2_HZ), RTC_REG_A); |
| 210 | } |
| 211 | |
| 212 | EXPORT_SYMBOL(do_settimeofday); |
| 213 | |
| 214 | void __init dec_timer_setup(struct irqaction *irq) |
| 215 | { |
| 216 | setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); |
| 217 | |
| 218 | /* Enable periodic DS1287 interrupts. */ |
| 219 | CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B); |
| 220 | } |